1*724ba675SRob Herring// SPDX-License-Identifier: GPL-2.0
2*724ba675SRob Herring/*
3*724ba675SRob Herring * Marvell RD88F6181 A Board descrition
4*724ba675SRob Herring *
5*724ba675SRob Herring * Andrew Lunn <andrew@lunn.ch>
6*724ba675SRob Herring *
7*724ba675SRob Herring * This file contains the definitions for the board with the A0 or
8*724ba675SRob Herring * higher stepping of the SoC. The ethernet switch does not have a
9*724ba675SRob Herring * "wan" port.
10*724ba675SRob Herring */
11*724ba675SRob Herring
12*724ba675SRob Herring/dts-v1/;
13*724ba675SRob Herring#include "kirkwood-rd88f6281.dtsi"
14*724ba675SRob Herring
15*724ba675SRob Herring/ {
16*724ba675SRob Herring	model = "Marvell RD88f6281 Reference design, with A0 or higher SoC";
17*724ba675SRob Herring	compatible = "marvell,rd88f6281-a", "marvell,rd88f6281","marvell,kirkwood-88f6281", "marvell,kirkwood";
18*724ba675SRob Herring
19*724ba675SRob Herring};
20*724ba675SRob Herring
21*724ba675SRob Herring&mdio {
22*724ba675SRob Herring	status = "okay";
23*724ba675SRob Herring
24*724ba675SRob Herring	ethphy1: ethernet-phy@11 {
25*724ba675SRob Herring		 reg = <11>;
26*724ba675SRob Herring	};
27*724ba675SRob Herring};
28*724ba675SRob Herring
29*724ba675SRob Herring&switch {
30*724ba675SRob Herring	reg = <10>;
31*724ba675SRob Herring};
32*724ba675SRob Herring
33*724ba675SRob Herring&eth1 {
34*724ba675SRob Herring	status = "okay";
35*724ba675SRob Herring
36*724ba675SRob Herring	ethernet1-port@0 {
37*724ba675SRob Herring		 phy-handle = <&ethphy1>;
38*724ba675SRob Herring	};
39*724ba675SRob Herring};
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