1*724ba675SRob Herring// SPDX-License-Identifier: GPL-2.0 2*724ba675SRob Herring/* 3*724ba675SRob Herring * kirkwood-pogoplug-series-4.dts - Device tree file for PogoPlug Series 4 4*724ba675SRob Herring * inspired by the board files made by Kevin Mihelich for ArchLinux, 5*724ba675SRob Herring * and their DTS file. 6*724ba675SRob Herring * 7*724ba675SRob Herring * Copyright (C) 2015 Linus Walleij <linus.walleij@linaro.org> 8*724ba675SRob Herring */ 9*724ba675SRob Herring 10*724ba675SRob Herring/dts-v1/; 11*724ba675SRob Herring 12*724ba675SRob Herring#include "kirkwood.dtsi" 13*724ba675SRob Herring#include "kirkwood-6192.dtsi" 14*724ba675SRob Herring#include <dt-bindings/input/linux-event-codes.h> 15*724ba675SRob Herring 16*724ba675SRob Herring/ { 17*724ba675SRob Herring model = "Cloud Engines PogoPlug Series 4"; 18*724ba675SRob Herring compatible = "cloudengines,pogoplugv4", "marvell,kirkwood-88f6192", 19*724ba675SRob Herring "marvell,kirkwood"; 20*724ba675SRob Herring 21*724ba675SRob Herring memory { 22*724ba675SRob Herring device_type = "memory"; 23*724ba675SRob Herring reg = <0x00000000 0x08000000>; 24*724ba675SRob Herring }; 25*724ba675SRob Herring 26*724ba675SRob Herring chosen { 27*724ba675SRob Herring stdout-path = "uart0:115200n8"; 28*724ba675SRob Herring }; 29*724ba675SRob Herring 30*724ba675SRob Herring gpio_keys { 31*724ba675SRob Herring compatible = "gpio-keys"; 32*724ba675SRob Herring #address-cells = <1>; 33*724ba675SRob Herring #size-cells = <0>; 34*724ba675SRob Herring pinctrl-0 = <&pmx_button_eject>; 35*724ba675SRob Herring pinctrl-names = "default"; 36*724ba675SRob Herring 37*724ba675SRob Herring eject { 38*724ba675SRob Herring debounce-interval = <50>; 39*724ba675SRob Herring wakeup-source; 40*724ba675SRob Herring linux,code = <KEY_EJECTCD>; 41*724ba675SRob Herring label = "Eject Button"; 42*724ba675SRob Herring gpios = <&gpio0 29 GPIO_ACTIVE_LOW>; 43*724ba675SRob Herring }; 44*724ba675SRob Herring }; 45*724ba675SRob Herring 46*724ba675SRob Herring gpio-leds { 47*724ba675SRob Herring compatible = "gpio-leds"; 48*724ba675SRob Herring pinctrl-0 = <&pmx_led_green &pmx_led_red>; 49*724ba675SRob Herring pinctrl-names = "default"; 50*724ba675SRob Herring 51*724ba675SRob Herring health { 52*724ba675SRob Herring label = "pogoplugv4:green:health"; 53*724ba675SRob Herring gpios = <&gpio0 22 GPIO_ACTIVE_LOW>; 54*724ba675SRob Herring default-state = "on"; 55*724ba675SRob Herring }; 56*724ba675SRob Herring fault { 57*724ba675SRob Herring label = "pogoplugv4:red:fault"; 58*724ba675SRob Herring gpios = <&gpio0 24 GPIO_ACTIVE_LOW>; 59*724ba675SRob Herring }; 60*724ba675SRob Herring }; 61*724ba675SRob Herring}; 62*724ba675SRob Herring 63*724ba675SRob Herring&pinctrl { 64*724ba675SRob Herring pmx_sata0: pmx-sata0 { 65*724ba675SRob Herring marvell,pins = "mpp21"; 66*724ba675SRob Herring marvell,function = "sata0"; 67*724ba675SRob Herring }; 68*724ba675SRob Herring 69*724ba675SRob Herring pmx_sata1: pmx-sata1 { 70*724ba675SRob Herring marvell,pins = "mpp20"; 71*724ba675SRob Herring marvell,function = "sata1"; 72*724ba675SRob Herring }; 73*724ba675SRob Herring 74*724ba675SRob Herring pmx_sdio_cd: pmx-sdio-cd { 75*724ba675SRob Herring marvell,pins = "mpp27"; 76*724ba675SRob Herring marvell,function = "gpio"; 77*724ba675SRob Herring }; 78*724ba675SRob Herring 79*724ba675SRob Herring pmx_sdio_wp: pmx-sdio-wp { 80*724ba675SRob Herring marvell,pins = "mpp28"; 81*724ba675SRob Herring marvell,function = "gpio"; 82*724ba675SRob Herring }; 83*724ba675SRob Herring 84*724ba675SRob Herring pmx_button_eject: pmx-button-eject { 85*724ba675SRob Herring marvell,pins = "mpp29"; 86*724ba675SRob Herring marvell,function = "gpio"; 87*724ba675SRob Herring }; 88*724ba675SRob Herring 89*724ba675SRob Herring pmx_led_green: pmx-led-green { 90*724ba675SRob Herring marvell,pins = "mpp22"; 91*724ba675SRob Herring marvell,function = "gpio"; 92*724ba675SRob Herring }; 93*724ba675SRob Herring 94*724ba675SRob Herring pmx_led_red: pmx-led-red { 95*724ba675SRob Herring marvell,pins = "mpp24"; 96*724ba675SRob Herring marvell,function = "gpio"; 97*724ba675SRob Herring }; 98*724ba675SRob Herring}; 99*724ba675SRob Herring 100*724ba675SRob Herring&uart0 { 101*724ba675SRob Herring status = "okay"; 102*724ba675SRob Herring}; 103*724ba675SRob Herring 104*724ba675SRob Herring/* 105*724ba675SRob Herring * This PCIE controller has a USB 3.0 XHCI controller at 1,0 106*724ba675SRob Herring */ 107*724ba675SRob Herring&pciec { 108*724ba675SRob Herring status = "okay"; 109*724ba675SRob Herring}; 110*724ba675SRob Herring 111*724ba675SRob Herring&pcie0 { 112*724ba675SRob Herring status = "okay"; 113*724ba675SRob Herring}; 114*724ba675SRob Herring 115*724ba675SRob Herring&sata { 116*724ba675SRob Herring status = "okay"; 117*724ba675SRob Herring pinctrl-0 = <&pmx_sata0 &pmx_sata1>; 118*724ba675SRob Herring pinctrl-names = "default"; 119*724ba675SRob Herring nr-ports = <1>; 120*724ba675SRob Herring}; 121*724ba675SRob Herring 122*724ba675SRob Herring&sdio { 123*724ba675SRob Herring status = "okay"; 124*724ba675SRob Herring pinctrl-0 = <&pmx_sdio &pmx_sdio_cd &pmx_sdio_wp>; 125*724ba675SRob Herring pinctrl-names = "default"; 126*724ba675SRob Herring cd-gpios = <&gpio0 27 GPIO_ACTIVE_LOW>; 127*724ba675SRob Herring wp-gpios = <&gpio0 28 GPIO_ACTIVE_HIGH>; 128*724ba675SRob Herring}; 129*724ba675SRob Herring 130*724ba675SRob Herring&nand { 131*724ba675SRob Herring /* 128 MiB of NAND flash */ 132*724ba675SRob Herring chip-delay = <40>; 133*724ba675SRob Herring status = "okay"; 134*724ba675SRob Herring partitions { 135*724ba675SRob Herring compatible = "fixed-partitions"; 136*724ba675SRob Herring #address-cells = <1>; 137*724ba675SRob Herring #size-cells = <1>; 138*724ba675SRob Herring 139*724ba675SRob Herring partition@0 { 140*724ba675SRob Herring label = "u-boot"; 141*724ba675SRob Herring reg = <0x00000000 0x200000>; 142*724ba675SRob Herring read-only; 143*724ba675SRob Herring }; 144*724ba675SRob Herring 145*724ba675SRob Herring partition@200000 { 146*724ba675SRob Herring label = "uImage"; 147*724ba675SRob Herring reg = <0x00200000 0x300000>; 148*724ba675SRob Herring }; 149*724ba675SRob Herring 150*724ba675SRob Herring partition@500000 { 151*724ba675SRob Herring label = "uImage2"; 152*724ba675SRob Herring reg = <0x00500000 0x300000>; 153*724ba675SRob Herring }; 154*724ba675SRob Herring 155*724ba675SRob Herring partition@800000 { 156*724ba675SRob Herring label = "failsafe"; 157*724ba675SRob Herring reg = <0x00800000 0x800000>; 158*724ba675SRob Herring }; 159*724ba675SRob Herring 160*724ba675SRob Herring partition@1000000 { 161*724ba675SRob Herring label = "root"; 162*724ba675SRob Herring reg = <0x01000000 0x7000000>; 163*724ba675SRob Herring }; 164*724ba675SRob Herring }; 165*724ba675SRob Herring}; 166*724ba675SRob Herring 167*724ba675SRob Herring&mdio { 168*724ba675SRob Herring status = "okay"; 169*724ba675SRob Herring 170*724ba675SRob Herring ethphy0: ethernet-phy@0 { 171*724ba675SRob Herring reg = <0>; 172*724ba675SRob Herring }; 173*724ba675SRob Herring}; 174*724ba675SRob Herring 175*724ba675SRob Herringð0 { 176*724ba675SRob Herring status = "okay"; 177*724ba675SRob Herring ethernet0-port@0 { 178*724ba675SRob Herring phy-handle = <ðphy0>; 179*724ba675SRob Herring }; 180*724ba675SRob Herring}; 181