1*724ba675SRob Herring// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
2*724ba675SRob Herring/*
3*724ba675SRob Herring * Device Tree Include file for Marvell Armada 398 SoC.
4*724ba675SRob Herring *
5*724ba675SRob Herring * Copyright (C) 2015 Marvell
6*724ba675SRob Herring *
7*724ba675SRob Herring * Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
8*724ba675SRob Herring */
9*724ba675SRob Herring
10*724ba675SRob Herring#include "armada-395.dtsi"
11*724ba675SRob Herring
12*724ba675SRob Herring/ {
13*724ba675SRob Herring	compatible = "marvell,armada398", "marvell,armada390";
14*724ba675SRob Herring
15*724ba675SRob Herring	soc {
16*724ba675SRob Herring		internal-regs {
17*724ba675SRob Herring			pinctrl@18000 {
18*724ba675SRob Herring				compatible = "marvell,mv88f6928-pinctrl";
19*724ba675SRob Herring				reg = <0x18000 0x20>;
20*724ba675SRob Herring			};
21*724ba675SRob Herring
22*724ba675SRob Herring			sata@e0000 {
23*724ba675SRob Herring				compatible = "marvell,armada-380-ahci";
24*724ba675SRob Herring				reg = <0xe0000 0x2000>;
25*724ba675SRob Herring				interrupts = <GIC_SPI 28 IRQ_TYPE_LEVEL_HIGH>;
26*724ba675SRob Herring				clocks = <&gateclk 30>;
27*724ba675SRob Herring				status = "disabled";
28*724ba675SRob Herring			};
29*724ba675SRob Herring		};
30*724ba675SRob Herring	};
31*724ba675SRob Herring};
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