1*724ba675SRob Herring// SPDX-License-Identifier: (GPL-2.0 OR MIT)
2*724ba675SRob Herring/*
3*724ba675SRob Herring * Device Tree include file for SolidRun Clearfog 88F6828 based boards
4*724ba675SRob Herring *
5*724ba675SRob Herring *  Copyright (C) 2015 Russell King
6*724ba675SRob Herring */
7*724ba675SRob Herring
8*724ba675SRob Herring#include "armada-388.dtsi"
9*724ba675SRob Herring#include "armada-38x-solidrun-microsom.dtsi"
10*724ba675SRob Herring
11*724ba675SRob Herring/ {
12*724ba675SRob Herring	aliases {
13*724ba675SRob Herring		/* So that mvebu u-boot can update the MAC addresses */
14*724ba675SRob Herring		ethernet1 = &eth0;
15*724ba675SRob Herring		ethernet2 = &eth1;
16*724ba675SRob Herring		ethernet3 = &eth2;
17*724ba675SRob Herring	};
18*724ba675SRob Herring
19*724ba675SRob Herring	chosen {
20*724ba675SRob Herring		stdout-path = "serial0:115200n8";
21*724ba675SRob Herring	};
22*724ba675SRob Herring
23*724ba675SRob Herring	reg_3p3v: regulator-3p3v {
24*724ba675SRob Herring		compatible = "regulator-fixed";
25*724ba675SRob Herring		regulator-name = "3P3V";
26*724ba675SRob Herring		regulator-min-microvolt = <3300000>;
27*724ba675SRob Herring		regulator-max-microvolt = <3300000>;
28*724ba675SRob Herring		regulator-always-on;
29*724ba675SRob Herring	};
30*724ba675SRob Herring
31*724ba675SRob Herring	soc {
32*724ba675SRob Herring		internal-regs {
33*724ba675SRob Herring			sata@a8000 {
34*724ba675SRob Herring				/* pinctrl? */
35*724ba675SRob Herring				status = "okay";
36*724ba675SRob Herring			};
37*724ba675SRob Herring
38*724ba675SRob Herring			sata@e0000 {
39*724ba675SRob Herring				/* pinctrl? */
40*724ba675SRob Herring				status = "okay";
41*724ba675SRob Herring			};
42*724ba675SRob Herring
43*724ba675SRob Herring			sdhci@d8000 {
44*724ba675SRob Herring				bus-width = <4>;
45*724ba675SRob Herring				cd-gpios = <&gpio0 20 GPIO_ACTIVE_LOW>;
46*724ba675SRob Herring				no-1-8-v;
47*724ba675SRob Herring				pinctrl-0 = <&microsom_sdhci_pins
48*724ba675SRob Herring					     &clearfog_sdhci_cd_pins>;
49*724ba675SRob Herring				pinctrl-names = "default";
50*724ba675SRob Herring				status = "okay";
51*724ba675SRob Herring				vmmc-supply = <&reg_3p3v>;
52*724ba675SRob Herring				wp-inverted;
53*724ba675SRob Herring			};
54*724ba675SRob Herring
55*724ba675SRob Herring			usb@58000 {
56*724ba675SRob Herring				/* CON3, nearest  power. */
57*724ba675SRob Herring				status = "okay";
58*724ba675SRob Herring			};
59*724ba675SRob Herring
60*724ba675SRob Herring			usb3@f8000 {
61*724ba675SRob Herring				/* CON7 */
62*724ba675SRob Herring				status = "okay";
63*724ba675SRob Herring			};
64*724ba675SRob Herring		};
65*724ba675SRob Herring
66*724ba675SRob Herring		pcie {
67*724ba675SRob Herring			status = "okay";
68*724ba675SRob Herring			/*
69*724ba675SRob Herring			 * The two PCIe units are accessible through
70*724ba675SRob Herring			 * the mini-PCIe connectors on the board.
71*724ba675SRob Herring			 */
72*724ba675SRob Herring			pcie@2,0 {
73*724ba675SRob Herring				/* Port 1, Lane 0. CON3, nearest power. */
74*724ba675SRob Herring				reset-gpios = <&expander0 1 GPIO_ACTIVE_LOW>;
75*724ba675SRob Herring				status = "okay";
76*724ba675SRob Herring			};
77*724ba675SRob Herring		};
78*724ba675SRob Herring	};
79*724ba675SRob Herring
80*724ba675SRob Herring	sfp: sfp {
81*724ba675SRob Herring		compatible = "sff,sfp";
82*724ba675SRob Herring		i2c-bus = <&i2c1>;
83*724ba675SRob Herring		los-gpio = <&expander0 12 GPIO_ACTIVE_HIGH>;
84*724ba675SRob Herring		mod-def0-gpio = <&expander0 15 GPIO_ACTIVE_LOW>;
85*724ba675SRob Herring		tx-disable-gpio = <&expander0 14 GPIO_ACTIVE_HIGH>;
86*724ba675SRob Herring		tx-fault-gpio = <&expander0 13 GPIO_ACTIVE_HIGH>;
87*724ba675SRob Herring		maximum-power-milliwatt = <2000>;
88*724ba675SRob Herring	};
89*724ba675SRob Herring};
90*724ba675SRob Herring
91*724ba675SRob Herring&eth1 {
92*724ba675SRob Herring	/* ethernet@30000 */
93*724ba675SRob Herring	bm,pool-long = <2>;
94*724ba675SRob Herring	bm,pool-short = <1>;
95*724ba675SRob Herring	buffer-manager = <&bm>;
96*724ba675SRob Herring	phys = <&comphy1 1>;
97*724ba675SRob Herring	phy-mode = "sgmii";
98*724ba675SRob Herring	status = "okay";
99*724ba675SRob Herring};
100*724ba675SRob Herring
101*724ba675SRob Herring&eth2 {
102*724ba675SRob Herring	/* ethernet@34000 */
103*724ba675SRob Herring	bm,pool-long = <3>;
104*724ba675SRob Herring	bm,pool-short = <1>;
105*724ba675SRob Herring	buffer-manager = <&bm>;
106*724ba675SRob Herring	managed = "in-band-status";
107*724ba675SRob Herring	phys = <&comphy5 2>;
108*724ba675SRob Herring	phy-mode = "sgmii";
109*724ba675SRob Herring	sfp = <&sfp>;
110*724ba675SRob Herring	status = "okay";
111*724ba675SRob Herring};
112*724ba675SRob Herring
113*724ba675SRob Herring&i2c0 {
114*724ba675SRob Herring	/*
115*724ba675SRob Herring	 * PCA9655 GPIO expander, up to 1MHz clock.
116*724ba675SRob Herring	 *  0-CON3 CLKREQ#
117*724ba675SRob Herring	 *  1-CON3 PERST#
118*724ba675SRob Herring	 *  2-
119*724ba675SRob Herring	 *  3-CON3 W_DISABLE
120*724ba675SRob Herring	 *  4-
121*724ba675SRob Herring	 *  5-USB3 overcurrent
122*724ba675SRob Herring	 *  6-USB3 power
123*724ba675SRob Herring	 *  7-
124*724ba675SRob Herring	 *  8-JP4 P1
125*724ba675SRob Herring	 *  9-JP4 P4
126*724ba675SRob Herring	 * 10-JP4 P5
127*724ba675SRob Herring	 * 11-m.2 DEVSLP
128*724ba675SRob Herring	 * 12-SFP_LOS
129*724ba675SRob Herring	 * 13-SFP_TX_FAULT
130*724ba675SRob Herring	 * 14-SFP_TX_DISABLE
131*724ba675SRob Herring	 * 15-SFP_MOD_DEF0
132*724ba675SRob Herring	 */
133*724ba675SRob Herring	expander0: gpio-expander@20 {
134*724ba675SRob Herring		/*
135*724ba675SRob Herring		 * This is how it should be:
136*724ba675SRob Herring		 * compatible = "onnn,pca9655", "nxp,pca9555";
137*724ba675SRob Herring		 * but you can't do this because of the way I2C works.
138*724ba675SRob Herring		 */
139*724ba675SRob Herring		compatible = "nxp,pca9555";
140*724ba675SRob Herring		gpio-controller;
141*724ba675SRob Herring		#gpio-cells = <2>;
142*724ba675SRob Herring		reg = <0x20>;
143*724ba675SRob Herring
144*724ba675SRob Herring		pcie1-0-clkreq-hog {
145*724ba675SRob Herring			gpio-hog;
146*724ba675SRob Herring			gpios = <0 GPIO_ACTIVE_LOW>;
147*724ba675SRob Herring			input;
148*724ba675SRob Herring			line-name = "pcie1.0-clkreq";
149*724ba675SRob Herring		};
150*724ba675SRob Herring		pcie1-0-w-disable-hog {
151*724ba675SRob Herring			gpio-hog;
152*724ba675SRob Herring			gpios = <3 GPIO_ACTIVE_LOW>;
153*724ba675SRob Herring			output-low;
154*724ba675SRob Herring			line-name = "pcie1.0-w-disable";
155*724ba675SRob Herring		};
156*724ba675SRob Herring		usb3-ilimit-hog {
157*724ba675SRob Herring			gpio-hog;
158*724ba675SRob Herring			gpios = <5 GPIO_ACTIVE_LOW>;
159*724ba675SRob Herring			input;
160*724ba675SRob Herring			line-name = "usb3-current-limit";
161*724ba675SRob Herring		};
162*724ba675SRob Herring		usb3-power-hog {
163*724ba675SRob Herring			gpio-hog;
164*724ba675SRob Herring			gpios = <6 GPIO_ACTIVE_HIGH>;
165*724ba675SRob Herring			output-high;
166*724ba675SRob Herring			line-name = "usb3-power";
167*724ba675SRob Herring		};
168*724ba675SRob Herring		m2-devslp-hog {
169*724ba675SRob Herring			gpio-hog;
170*724ba675SRob Herring			gpios = <11 GPIO_ACTIVE_HIGH>;
171*724ba675SRob Herring			output-low;
172*724ba675SRob Herring			line-name = "m.2 devslp";
173*724ba675SRob Herring		};
174*724ba675SRob Herring	};
175*724ba675SRob Herring
176*724ba675SRob Herring	/* The MCP3021 supports standard and fast modes */
177*724ba675SRob Herring	mikrobus_adc: mcp3021@4c {
178*724ba675SRob Herring		compatible = "microchip,mcp3021";
179*724ba675SRob Herring		reg = <0x4c>;
180*724ba675SRob Herring	};
181*724ba675SRob Herring
182*724ba675SRob Herring	eeprom@52 {
183*724ba675SRob Herring		compatible = "atmel,24c02";
184*724ba675SRob Herring		reg = <0x52>;
185*724ba675SRob Herring		pagesize = <16>;
186*724ba675SRob Herring	};
187*724ba675SRob Herring};
188*724ba675SRob Herring
189*724ba675SRob Herring&i2c1 {
190*724ba675SRob Herring	/*
191*724ba675SRob Herring	 * Routed to SFP, mikrobus, and PCIe.
192*724ba675SRob Herring	 * SFP limits this to 100kHz, and requires an AT24C01A/02/04 with
193*724ba675SRob Herring	 *  address pins tied low, which takes addresses 0x50 and 0x51.
194*724ba675SRob Herring	 * Mikrobus doesn't specify beyond an I2C bus being present.
195*724ba675SRob Herring	 * PCIe uses ARP to assign addresses, or 0x63-0x64.
196*724ba675SRob Herring	 */
197*724ba675SRob Herring	clock-frequency = <100000>;
198*724ba675SRob Herring	pinctrl-0 = <&clearfog_i2c1_pins>;
199*724ba675SRob Herring	pinctrl-names = "default";
200*724ba675SRob Herring	status = "okay";
201*724ba675SRob Herring};
202*724ba675SRob Herring
203*724ba675SRob Herring&pinctrl {
204*724ba675SRob Herring	clearfog_i2c1_pins: i2c1-pins {
205*724ba675SRob Herring		/* SFP, PCIe, mSATA, mikrobus */
206*724ba675SRob Herring		marvell,pins = "mpp26", "mpp27";
207*724ba675SRob Herring		marvell,function = "i2c1";
208*724ba675SRob Herring	};
209*724ba675SRob Herring	clearfog_sdhci_cd_pins: clearfog-sdhci-cd-pins {
210*724ba675SRob Herring		marvell,pins = "mpp20";
211*724ba675SRob Herring		marvell,function = "gpio";
212*724ba675SRob Herring	};
213*724ba675SRob Herring	mikro_pins: mikro-pins {
214*724ba675SRob Herring		/* int: mpp22 rst: mpp29 */
215*724ba675SRob Herring		marvell,pins = "mpp22", "mpp29";
216*724ba675SRob Herring		marvell,function = "gpio";
217*724ba675SRob Herring	};
218*724ba675SRob Herring	mikro_spi_pins: mikro-spi-pins {
219*724ba675SRob Herring		marvell,pins = "mpp43";
220*724ba675SRob Herring		marvell,function = "spi1";
221*724ba675SRob Herring	};
222*724ba675SRob Herring	mikro_uart_pins: mikro-uart-pins {
223*724ba675SRob Herring		marvell,pins = "mpp24", "mpp25";
224*724ba675SRob Herring		marvell,function = "ua1";
225*724ba675SRob Herring	};
226*724ba675SRob Herring};
227*724ba675SRob Herring
228*724ba675SRob Herring&spi1 {
229*724ba675SRob Herring	/*
230*724ba675SRob Herring	 * Add SPI CS pins for clearfog:
231*724ba675SRob Herring	 * CS0: W25Q32
232*724ba675SRob Herring	 * CS1: PIC microcontroller (Pro models)
233*724ba675SRob Herring	 * CS2: mikrobus
234*724ba675SRob Herring	 */
235*724ba675SRob Herring	pinctrl-0 = <&spi1_pins &mikro_spi_pins>;
236*724ba675SRob Herring	pinctrl-names = "default";
237*724ba675SRob Herring	status = "okay";
238*724ba675SRob Herring};
239*724ba675SRob Herring
240*724ba675SRob Herring&uart1 {
241*724ba675SRob Herring	/* mikrobus uart */
242*724ba675SRob Herring	pinctrl-0 = <&mikro_uart_pins>;
243*724ba675SRob Herring	pinctrl-names = "default";
244*724ba675SRob Herring	status = "okay";
245*724ba675SRob Herring};
246