1*724ba675SRob Herring// SPDX-License-Identifier: (GPL-2.0 OR MIT)
2*724ba675SRob Herring
3*724ba675SRob Herring#include "armada-385-clearfog-gtr.dtsi"
4*724ba675SRob Herring
5*724ba675SRob Herring/ {
6*724ba675SRob Herring	model = "SolidRun Clearfog GTR S4";
7*724ba675SRob Herring};
8*724ba675SRob Herring
9*724ba675SRob Herring&sfp0 {
10*724ba675SRob Herring	tx-fault-gpio = <&gpio0 24 GPIO_ACTIVE_HIGH>;
11*724ba675SRob Herring};
12*724ba675SRob Herring
13*724ba675SRob Herring&mdio {
14*724ba675SRob Herring	switch0: switch0@4 {
15*724ba675SRob Herring		compatible = "marvell,mv88e6085";
16*724ba675SRob Herring		reg = <4>;
17*724ba675SRob Herring		pinctrl-names = "default";
18*724ba675SRob Herring		pinctrl-0 = <&cf_gtr_switch_reset_pins>;
19*724ba675SRob Herring		reset-gpios = <&gpio0 18 GPIO_ACTIVE_LOW>;
20*724ba675SRob Herring
21*724ba675SRob Herring		ports {
22*724ba675SRob Herring			#address-cells = <1>;
23*724ba675SRob Herring			#size-cells = <0>;
24*724ba675SRob Herring
25*724ba675SRob Herring			port@1 {
26*724ba675SRob Herring				reg = <1>;
27*724ba675SRob Herring				label = "lan2";
28*724ba675SRob Herring				phy-handle = <&switch0phy0>;
29*724ba675SRob Herring			};
30*724ba675SRob Herring
31*724ba675SRob Herring			port@2 {
32*724ba675SRob Herring				reg = <2>;
33*724ba675SRob Herring				label = "lan1";
34*724ba675SRob Herring				phy-handle = <&switch0phy1>;
35*724ba675SRob Herring			};
36*724ba675SRob Herring
37*724ba675SRob Herring			port@3 {
38*724ba675SRob Herring				reg = <3>;
39*724ba675SRob Herring				label = "lan4";
40*724ba675SRob Herring				phy-handle = <&switch0phy2>;
41*724ba675SRob Herring			};
42*724ba675SRob Herring
43*724ba675SRob Herring			port@4 {
44*724ba675SRob Herring				reg = <4>;
45*724ba675SRob Herring				label = "lan3";
46*724ba675SRob Herring				phy-handle = <&switch0phy3>;
47*724ba675SRob Herring			};
48*724ba675SRob Herring
49*724ba675SRob Herring			port@5 {
50*724ba675SRob Herring				reg = <5>;
51*724ba675SRob Herring				phy-mode = "2500base-x";
52*724ba675SRob Herring				ethernet = <&eth1>;
53*724ba675SRob Herring
54*724ba675SRob Herring				fixed-link {
55*724ba675SRob Herring					speed = <2500>;
56*724ba675SRob Herring					full-duplex;
57*724ba675SRob Herring				};
58*724ba675SRob Herring			};
59*724ba675SRob Herring
60*724ba675SRob Herring		};
61*724ba675SRob Herring
62*724ba675SRob Herring		mdio {
63*724ba675SRob Herring			#address-cells = <1>;
64*724ba675SRob Herring			#size-cells = <0>;
65*724ba675SRob Herring
66*724ba675SRob Herring			switch0phy0: switch0phy0@11 {
67*724ba675SRob Herring				reg = <0x11>;
68*724ba675SRob Herring			};
69*724ba675SRob Herring
70*724ba675SRob Herring			switch0phy1: switch0phy1@12 {
71*724ba675SRob Herring				reg = <0x12>;
72*724ba675SRob Herring			};
73*724ba675SRob Herring
74*724ba675SRob Herring			switch0phy2: switch0phy2@13 {
75*724ba675SRob Herring				reg = <0x13>;
76*724ba675SRob Herring			};
77*724ba675SRob Herring
78*724ba675SRob Herring			switch0phy3: switch0phy3@14 {
79*724ba675SRob Herring				reg = <0x14>;
80*724ba675SRob Herring			};
81*724ba675SRob Herring		};
82*724ba675SRob Herring
83*724ba675SRob Herring	};
84*724ba675SRob Herring};
85