1*724ba675SRob Herring// SPDX-License-Identifier: (GPL-2.0+ OR MIT) 2*724ba675SRob Herring/* 3*724ba675SRob Herring * Device Tree file for Marvell Armada 370 evaluation board 4*724ba675SRob Herring * (DB-88F6710-BP-DDR3) 5*724ba675SRob Herring * 6*724ba675SRob Herring * Copyright (C) 2012 Marvell 7*724ba675SRob Herring * 8*724ba675SRob Herring * Lior Amsalem <alior@marvell.com> 9*724ba675SRob Herring * Gregory CLEMENT <gregory.clement@free-electrons.com> 10*724ba675SRob Herring * Thomas Petazzoni <thomas.petazzoni@free-electrons.com> 11*724ba675SRob Herring * 12*724ba675SRob Herring * Note: this Device Tree assumes that the bootloader has remapped the 13*724ba675SRob Herring * internal registers to 0xf1000000 (instead of the default 14*724ba675SRob Herring * 0xd0000000). The 0xf1000000 is the default used by the recent, 15*724ba675SRob Herring * DT-capable, U-Boot bootloaders provided by Marvell. Some earlier 16*724ba675SRob Herring * boards were delivered with an older version of the bootloader that 17*724ba675SRob Herring * left internal registers mapped at 0xd0000000. If you are in this 18*724ba675SRob Herring * situation, you should either update your bootloader (preferred 19*724ba675SRob Herring * solution) or the below Device Tree should be adjusted. 20*724ba675SRob Herring */ 21*724ba675SRob Herring 22*724ba675SRob Herring/dts-v1/; 23*724ba675SRob Herring#include "armada-370.dtsi" 24*724ba675SRob Herring 25*724ba675SRob Herring/ { 26*724ba675SRob Herring model = "Marvell Armada 370 Evaluation Board"; 27*724ba675SRob Herring compatible = "marvell,a370-db", "marvell,armada370", "marvell,armada-370-xp"; 28*724ba675SRob Herring 29*724ba675SRob Herring chosen { 30*724ba675SRob Herring stdout-path = "serial0:115200n8"; 31*724ba675SRob Herring }; 32*724ba675SRob Herring 33*724ba675SRob Herring memory@0 { 34*724ba675SRob Herring device_type = "memory"; 35*724ba675SRob Herring reg = <0x00000000 0x40000000>; /* 1 GB */ 36*724ba675SRob Herring }; 37*724ba675SRob Herring 38*724ba675SRob Herring soc { 39*724ba675SRob Herring ranges = <MBUS_ID(0xf0, 0x01) 0 0xf1000000 0x100000 40*724ba675SRob Herring MBUS_ID(0x01, 0xe0) 0 0xfff00000 0x100000 41*724ba675SRob Herring MBUS_ID(0x09, 0x01) 0 0xf1100000 0x10000>; 42*724ba675SRob Herring 43*724ba675SRob Herring internal-regs { 44*724ba675SRob Herring serial@12000 { 45*724ba675SRob Herring status = "okay"; 46*724ba675SRob Herring }; 47*724ba675SRob Herring sata@a0000 { 48*724ba675SRob Herring nr-ports = <2>; 49*724ba675SRob Herring status = "okay"; 50*724ba675SRob Herring }; 51*724ba675SRob Herring 52*724ba675SRob Herring ethernet@70000 { 53*724ba675SRob Herring pinctrl-0 = <&ge0_rgmii_pins>; 54*724ba675SRob Herring pinctrl-names = "default"; 55*724ba675SRob Herring status = "okay"; 56*724ba675SRob Herring phy = <&phy0>; 57*724ba675SRob Herring phy-mode = "rgmii-id"; 58*724ba675SRob Herring }; 59*724ba675SRob Herring ethernet@74000 { 60*724ba675SRob Herring pinctrl-0 = <&ge1_rgmii_pins>; 61*724ba675SRob Herring pinctrl-names = "default"; 62*724ba675SRob Herring status = "okay"; 63*724ba675SRob Herring phy = <&phy1>; 64*724ba675SRob Herring phy-mode = "rgmii-id"; 65*724ba675SRob Herring }; 66*724ba675SRob Herring 67*724ba675SRob Herring i2c@11000 { 68*724ba675SRob Herring pinctrl-0 = <&i2c0_pins>; 69*724ba675SRob Herring pinctrl-names = "default"; 70*724ba675SRob Herring clock-frequency = <100000>; 71*724ba675SRob Herring status = "okay"; 72*724ba675SRob Herring audio_codec: audio-codec@4a { 73*724ba675SRob Herring #sound-dai-cells = <0>; 74*724ba675SRob Herring compatible = "cirrus,cs42l51"; 75*724ba675SRob Herring reg = <0x4a>; 76*724ba675SRob Herring }; 77*724ba675SRob Herring }; 78*724ba675SRob Herring 79*724ba675SRob Herring audio-controller@30000 { 80*724ba675SRob Herring pinctrl-0 = <&i2s_pins2>; 81*724ba675SRob Herring pinctrl-names = "default"; 82*724ba675SRob Herring status = "okay"; 83*724ba675SRob Herring }; 84*724ba675SRob Herring 85*724ba675SRob Herring mvsdio@d4000 { 86*724ba675SRob Herring pinctrl-0 = <&sdio_pins1>; 87*724ba675SRob Herring pinctrl-names = "default"; 88*724ba675SRob Herring /* 89*724ba675SRob Herring * This device is disabled by default, because 90*724ba675SRob Herring * using the SD card connector requires 91*724ba675SRob Herring * changing the default CON40 connector 92*724ba675SRob Herring * "DB-88F6710_MPP_2xRGMII_DEVICE_Jumper" to a 93*724ba675SRob Herring * different connector 94*724ba675SRob Herring * "DB-88F6710_MPP_RGMII_SD_Jumper". 95*724ba675SRob Herring */ 96*724ba675SRob Herring status = "disabled"; 97*724ba675SRob Herring /* No CD or WP GPIOs */ 98*724ba675SRob Herring broken-cd; 99*724ba675SRob Herring }; 100*724ba675SRob Herring 101*724ba675SRob Herring usb@50000 { 102*724ba675SRob Herring status = "okay"; 103*724ba675SRob Herring }; 104*724ba675SRob Herring 105*724ba675SRob Herring usb@51000 { 106*724ba675SRob Herring status = "okay"; 107*724ba675SRob Herring }; 108*724ba675SRob Herring }; 109*724ba675SRob Herring }; 110*724ba675SRob Herring 111*724ba675SRob Herring sound { 112*724ba675SRob Herring compatible = "simple-audio-card"; 113*724ba675SRob Herring simple-audio-card,name = "Armada 370 DB Audio"; 114*724ba675SRob Herring simple-audio-card,mclk-fs = <256>; 115*724ba675SRob Herring simple-audio-card,widgets = 116*724ba675SRob Herring "Headphone", "Out Jack", 117*724ba675SRob Herring "Line", "In Jack"; 118*724ba675SRob Herring simple-audio-card,routing = 119*724ba675SRob Herring "Out Jack", "HPL", 120*724ba675SRob Herring "Out Jack", "HPR", 121*724ba675SRob Herring "AIN1L", "In Jack", 122*724ba675SRob Herring "AIN1L", "In Jack"; 123*724ba675SRob Herring status = "okay"; 124*724ba675SRob Herring 125*724ba675SRob Herring simple-audio-card,dai-link@0 { 126*724ba675SRob Herring format = "i2s"; 127*724ba675SRob Herring cpu { 128*724ba675SRob Herring sound-dai = <&audio_controller 0>; 129*724ba675SRob Herring }; 130*724ba675SRob Herring 131*724ba675SRob Herring codec { 132*724ba675SRob Herring sound-dai = <&audio_codec>; 133*724ba675SRob Herring }; 134*724ba675SRob Herring }; 135*724ba675SRob Herring 136*724ba675SRob Herring simple-audio-card,dai-link@1 { 137*724ba675SRob Herring format = "i2s"; 138*724ba675SRob Herring cpu { 139*724ba675SRob Herring sound-dai = <&audio_controller 1>; 140*724ba675SRob Herring }; 141*724ba675SRob Herring 142*724ba675SRob Herring codec { 143*724ba675SRob Herring sound-dai = <&spdif_out>; 144*724ba675SRob Herring }; 145*724ba675SRob Herring }; 146*724ba675SRob Herring 147*724ba675SRob Herring simple-audio-card,dai-link@2 { 148*724ba675SRob Herring format = "i2s"; 149*724ba675SRob Herring cpu { 150*724ba675SRob Herring sound-dai = <&audio_controller 1>; 151*724ba675SRob Herring }; 152*724ba675SRob Herring 153*724ba675SRob Herring codec { 154*724ba675SRob Herring sound-dai = <&spdif_in>; 155*724ba675SRob Herring }; 156*724ba675SRob Herring }; 157*724ba675SRob Herring }; 158*724ba675SRob Herring 159*724ba675SRob Herring spdif_out: spdif-out { 160*724ba675SRob Herring #sound-dai-cells = <0>; 161*724ba675SRob Herring compatible = "linux,spdif-dit"; 162*724ba675SRob Herring }; 163*724ba675SRob Herring 164*724ba675SRob Herring spdif_in: spdif-in { 165*724ba675SRob Herring #sound-dai-cells = <0>; 166*724ba675SRob Herring compatible = "linux,spdif-dir"; 167*724ba675SRob Herring }; 168*724ba675SRob Herring}; 169*724ba675SRob Herring 170*724ba675SRob Herring&pciec { 171*724ba675SRob Herring status = "okay"; 172*724ba675SRob Herring /* 173*724ba675SRob Herring * The two PCIe units are accessible through 174*724ba675SRob Herring * both standard PCIe slots and mini-PCIe 175*724ba675SRob Herring * slots on the board. 176*724ba675SRob Herring */ 177*724ba675SRob Herring pcie@1,0 { 178*724ba675SRob Herring /* Port 0, Lane 0 */ 179*724ba675SRob Herring status = "okay"; 180*724ba675SRob Herring }; 181*724ba675SRob Herring 182*724ba675SRob Herring pcie@2,0 { 183*724ba675SRob Herring /* Port 1, Lane 0 */ 184*724ba675SRob Herring status = "okay"; 185*724ba675SRob Herring }; 186*724ba675SRob Herring}; 187*724ba675SRob Herring 188*724ba675SRob Herring&mdio { 189*724ba675SRob Herring pinctrl-0 = <&mdio_pins>; 190*724ba675SRob Herring pinctrl-names = "default"; 191*724ba675SRob Herring phy0: ethernet-phy@0 { 192*724ba675SRob Herring reg = <0>; 193*724ba675SRob Herring }; 194*724ba675SRob Herring 195*724ba675SRob Herring phy1: ethernet-phy@1 { 196*724ba675SRob Herring reg = <1>; 197*724ba675SRob Herring }; 198*724ba675SRob Herring}; 199*724ba675SRob Herring 200*724ba675SRob Herring 201*724ba675SRob Herring&spi0 { 202*724ba675SRob Herring pinctrl-0 = <&spi0_pins2>; 203*724ba675SRob Herring pinctrl-names = "default"; 204*724ba675SRob Herring status = "okay"; 205*724ba675SRob Herring 206*724ba675SRob Herring flash@0 { 207*724ba675SRob Herring #address-cells = <1>; 208*724ba675SRob Herring #size-cells = <1>; 209*724ba675SRob Herring compatible = "mx25l25635e", "jedec,spi-nor"; 210*724ba675SRob Herring reg = <0>; /* Chip select 0 */ 211*724ba675SRob Herring spi-max-frequency = <50000000>; 212*724ba675SRob Herring }; 213*724ba675SRob Herring}; 214*724ba675SRob Herring 215*724ba675SRob Herring&nand_controller { 216*724ba675SRob Herring status = "okay"; 217*724ba675SRob Herring 218*724ba675SRob Herring nand@0 { 219*724ba675SRob Herring reg = <0>; 220*724ba675SRob Herring label = "pxa3xx_nand-0"; 221*724ba675SRob Herring nand-rb = <0>; 222*724ba675SRob Herring marvell,nand-keep-config; 223*724ba675SRob Herring nand-on-flash-bbt; 224*724ba675SRob Herring 225*724ba675SRob Herring partitions { 226*724ba675SRob Herring compatible = "fixed-partitions"; 227*724ba675SRob Herring #address-cells = <1>; 228*724ba675SRob Herring #size-cells = <1>; 229*724ba675SRob Herring 230*724ba675SRob Herring partition@0 { 231*724ba675SRob Herring label = "U-Boot"; 232*724ba675SRob Herring reg = <0 0x800000>; 233*724ba675SRob Herring }; 234*724ba675SRob Herring partition@800000 { 235*724ba675SRob Herring label = "Linux"; 236*724ba675SRob Herring reg = <0x800000 0x800000>; 237*724ba675SRob Herring }; 238*724ba675SRob Herring partition@1000000 { 239*724ba675SRob Herring label = "Filesystem"; 240*724ba675SRob Herring reg = <0x1000000 0x3f000000>; 241*724ba675SRob Herring }; 242*724ba675SRob Herring }; 243*724ba675SRob Herring }; 244*724ba675SRob Herring}; 245