1*724ba675SRob Herring// SPDX-License-Identifier: GPL-2.0
2*724ba675SRob Herring/*
3*724ba675SRob Herring * Device Tree file for HPE GXP
4*724ba675SRob Herring */
5*724ba675SRob Herring
6*724ba675SRob Herring/dts-v1/;
7*724ba675SRob Herring/ {
8*724ba675SRob Herring	model = "Hewlett Packard Enterprise GXP BMC";
9*724ba675SRob Herring	compatible = "hpe,gxp";
10*724ba675SRob Herring	#address-cells = <1>;
11*724ba675SRob Herring	#size-cells = <1>;
12*724ba675SRob Herring
13*724ba675SRob Herring	cpus {
14*724ba675SRob Herring		#address-cells = <1>;
15*724ba675SRob Herring		#size-cells = <0>;
16*724ba675SRob Herring
17*724ba675SRob Herring		cpu@0 {
18*724ba675SRob Herring			compatible = "arm,cortex-a9";
19*724ba675SRob Herring			reg = <0>;
20*724ba675SRob Herring			device_type = "cpu";
21*724ba675SRob Herring			next-level-cache = <&L2>;
22*724ba675SRob Herring		};
23*724ba675SRob Herring	};
24*724ba675SRob Herring
25*724ba675SRob Herring	clocks {
26*724ba675SRob Herring		pll: clock-0 {
27*724ba675SRob Herring			compatible = "fixed-clock";
28*724ba675SRob Herring			#clock-cells = <0>;
29*724ba675SRob Herring			clock-frequency = <1600000000>;
30*724ba675SRob Herring		};
31*724ba675SRob Herring
32*724ba675SRob Herring		iopclk: clock-1 {
33*724ba675SRob Herring			compatible = "fixed-factor-clock";
34*724ba675SRob Herring			#clock-cells = <0>;
35*724ba675SRob Herring			clock-div = <4>;
36*724ba675SRob Herring			clock-mult = <1>;
37*724ba675SRob Herring			clocks = <&pll>;
38*724ba675SRob Herring		};
39*724ba675SRob Herring	};
40*724ba675SRob Herring
41*724ba675SRob Herring	axi {
42*724ba675SRob Herring		compatible = "simple-bus";
43*724ba675SRob Herring		#address-cells = <1>;
44*724ba675SRob Herring		#size-cells = <1>;
45*724ba675SRob Herring		ranges;
46*724ba675SRob Herring		dma-ranges;
47*724ba675SRob Herring
48*724ba675SRob Herring		L2: cache-controller@b0040000 {
49*724ba675SRob Herring			compatible = "arm,pl310-cache";
50*724ba675SRob Herring			reg = <0xb0040000 0x1000>;
51*724ba675SRob Herring			cache-unified;
52*724ba675SRob Herring			cache-level = <2>;
53*724ba675SRob Herring		};
54*724ba675SRob Herring
55*724ba675SRob Herring		ahb@c0000000 {
56*724ba675SRob Herring			compatible = "simple-bus";
57*724ba675SRob Herring			#address-cells = <1>;
58*724ba675SRob Herring			#size-cells = <1>;
59*724ba675SRob Herring			ranges = <0x0 0xc0000000 0x30000000>;
60*724ba675SRob Herring			dma-ranges;
61*724ba675SRob Herring
62*724ba675SRob Herring			vic0: interrupt-controller@eff0000 {
63*724ba675SRob Herring				compatible = "arm,pl192-vic";
64*724ba675SRob Herring				reg = <0xeff0000 0x1000>;
65*724ba675SRob Herring				interrupt-controller;
66*724ba675SRob Herring				#interrupt-cells = <1>;
67*724ba675SRob Herring			};
68*724ba675SRob Herring
69*724ba675SRob Herring			vic1: interrupt-controller@80f00000 {
70*724ba675SRob Herring				compatible = "arm,pl192-vic";
71*724ba675SRob Herring				reg = <0x80f00000 0x1000>;
72*724ba675SRob Herring				interrupt-controller;
73*724ba675SRob Herring				#interrupt-cells = <1>;
74*724ba675SRob Herring			};
75*724ba675SRob Herring
76*724ba675SRob Herring			uarta: serial@e0 {
77*724ba675SRob Herring				compatible = "ns16550a";
78*724ba675SRob Herring				reg = <0xe0 0x8>;
79*724ba675SRob Herring				interrupts = <17>;
80*724ba675SRob Herring				interrupt-parent = <&vic0>;
81*724ba675SRob Herring				clock-frequency = <1846153>;
82*724ba675SRob Herring				reg-shift = <0>;
83*724ba675SRob Herring			};
84*724ba675SRob Herring
85*724ba675SRob Herring			uartb: serial@e8 {
86*724ba675SRob Herring				compatible = "ns16550a";
87*724ba675SRob Herring				reg = <0xe8 0x8>;
88*724ba675SRob Herring				interrupts = <18>;
89*724ba675SRob Herring				interrupt-parent = <&vic0>;
90*724ba675SRob Herring				clock-frequency = <1846153>;
91*724ba675SRob Herring				reg-shift = <0>;
92*724ba675SRob Herring			};
93*724ba675SRob Herring
94*724ba675SRob Herring			uartc: serial@f0 {
95*724ba675SRob Herring				compatible = "ns16550a";
96*724ba675SRob Herring				reg = <0xf0 0x8>;
97*724ba675SRob Herring				interrupts = <19>;
98*724ba675SRob Herring				interrupt-parent = <&vic0>;
99*724ba675SRob Herring				clock-frequency = <1846153>;
100*724ba675SRob Herring				reg-shift = <0>;
101*724ba675SRob Herring			};
102*724ba675SRob Herring
103*724ba675SRob Herring			usb0: usb@efe0000 {
104*724ba675SRob Herring				compatible = "hpe,gxp-ehci", "generic-ehci";
105*724ba675SRob Herring				reg = <0xefe0000 0x100>;
106*724ba675SRob Herring				interrupts = <7>;
107*724ba675SRob Herring				interrupt-parent = <&vic0>;
108*724ba675SRob Herring			};
109*724ba675SRob Herring
110*724ba675SRob Herring			st: timer@80 {
111*724ba675SRob Herring				compatible = "hpe,gxp-timer";
112*724ba675SRob Herring				reg = <0x80 0x16>;
113*724ba675SRob Herring				interrupts = <0>;
114*724ba675SRob Herring				interrupt-parent = <&vic0>;
115*724ba675SRob Herring				clocks = <&iopclk>;
116*724ba675SRob Herring				clock-names = "iop";
117*724ba675SRob Herring			};
118*724ba675SRob Herring
119*724ba675SRob Herring			usb1: usb@efe0100 {
120*724ba675SRob Herring				compatible = "hpe,gxp-ohci", "generic-ohci";
121*724ba675SRob Herring				reg = <0xefe0100 0x110>;
122*724ba675SRob Herring				interrupts = <6>;
123*724ba675SRob Herring				interrupt-parent = <&vic0>;
124*724ba675SRob Herring			};
125*724ba675SRob Herring		};
126*724ba675SRob Herring	};
127*724ba675SRob Herring};
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