1*724ba675SRob Herring/* 2*724ba675SRob Herring * Device Tree file for D-Link DIR-685 Xtreme N Storage Router 3*724ba675SRob Herring */ 4*724ba675SRob Herring 5*724ba675SRob Herring/dts-v1/; 6*724ba675SRob Herring 7*724ba675SRob Herring#include "gemini.dtsi" 8*724ba675SRob Herring#include <dt-bindings/input/input.h> 9*724ba675SRob Herring 10*724ba675SRob Herring/ { 11*724ba675SRob Herring model = "D-Link DIR-685 Xtreme N Storage Router"; 12*724ba675SRob Herring compatible = "dlink,dir-685", "cortina,gemini"; 13*724ba675SRob Herring #address-cells = <1>; 14*724ba675SRob Herring #size-cells = <1>; 15*724ba675SRob Herring 16*724ba675SRob Herring memory@0 { 17*724ba675SRob Herring /* 128 MB SDRAM in 2 x Hynix HY5DU121622DTP-D43 */ 18*724ba675SRob Herring device_type = "memory"; 19*724ba675SRob Herring reg = <0x00000000 0x8000000>; 20*724ba675SRob Herring }; 21*724ba675SRob Herring 22*724ba675SRob Herring chosen { 23*724ba675SRob Herring bootargs = "console=ttyS0,19200n8 root=/dev/sda1 rw rootwait consoleblank=300"; 24*724ba675SRob Herring stdout-path = "uart0:19200n8"; 25*724ba675SRob Herring }; 26*724ba675SRob Herring 27*724ba675SRob Herring gpio_keys { 28*724ba675SRob Herring compatible = "gpio-keys"; 29*724ba675SRob Herring 30*724ba675SRob Herring button-esc { 31*724ba675SRob Herring debounce-interval = <100>; 32*724ba675SRob Herring wakeup-source; 33*724ba675SRob Herring linux,code = <KEY_ESC>; 34*724ba675SRob Herring label = "reset"; 35*724ba675SRob Herring /* Collides with LPC_LAD[0], UART DCD, SSP 97RST */ 36*724ba675SRob Herring gpios = <&gpio0 8 GPIO_ACTIVE_LOW>; 37*724ba675SRob Herring }; 38*724ba675SRob Herring button-eject { 39*724ba675SRob Herring debounce-interval = <100>; 40*724ba675SRob Herring wakeup-source; 41*724ba675SRob Herring linux,code = <KEY_EJECTCD>; 42*724ba675SRob Herring label = "unmount"; 43*724ba675SRob Herring /* Collides with LPC LFRAME, UART RTS, SSP TXD */ 44*724ba675SRob Herring gpios = <&gpio0 13 GPIO_ACTIVE_LOW>; 45*724ba675SRob Herring }; 46*724ba675SRob Herring }; 47*724ba675SRob Herring 48*724ba675SRob Herring vdisp: regulator { 49*724ba675SRob Herring compatible = "regulator-fixed"; 50*724ba675SRob Herring regulator-name = "display-power"; 51*724ba675SRob Herring regulator-min-microvolt = <3600000>; 52*724ba675SRob Herring regulator-max-microvolt = <3600000>; 53*724ba675SRob Herring /* Collides with LCD E */ 54*724ba675SRob Herring gpio = <&gpio0 16 GPIO_ACTIVE_HIGH>; 55*724ba675SRob Herring enable-active-high; 56*724ba675SRob Herring }; 57*724ba675SRob Herring 58*724ba675SRob Herring spi { 59*724ba675SRob Herring compatible = "spi-gpio"; 60*724ba675SRob Herring #address-cells = <1>; 61*724ba675SRob Herring #size-cells = <0>; 62*724ba675SRob Herring 63*724ba675SRob Herring /* Collides with IDE pins, that's cool (we do not use them) */ 64*724ba675SRob Herring sck-gpios = <&gpio1 5 GPIO_ACTIVE_HIGH>; 65*724ba675SRob Herring miso-gpios = <&gpio1 8 GPIO_ACTIVE_HIGH>; 66*724ba675SRob Herring mosi-gpios = <&gpio1 7 GPIO_ACTIVE_HIGH>; 67*724ba675SRob Herring cs-gpios = <&gpio0 20 GPIO_ACTIVE_LOW>; 68*724ba675SRob Herring num-chipselects = <1>; 69*724ba675SRob Herring 70*724ba675SRob Herring panel: display@0 { 71*724ba675SRob Herring compatible = "dlink,dir-685-panel", "ilitek,ili9322"; 72*724ba675SRob Herring reg = <0>; 73*724ba675SRob Herring /* 50 ns min period = 20 MHz */ 74*724ba675SRob Herring spi-max-frequency = <20000000>; 75*724ba675SRob Herring vcc-supply = <&vdisp>; 76*724ba675SRob Herring iovcc-supply = <&vdisp>; 77*724ba675SRob Herring vci-supply = <&vdisp>; 78*724ba675SRob Herring 79*724ba675SRob Herring port { 80*724ba675SRob Herring panel_in: endpoint { 81*724ba675SRob Herring remote-endpoint = <&display_out>; 82*724ba675SRob Herring }; 83*724ba675SRob Herring }; 84*724ba675SRob Herring }; 85*724ba675SRob Herring }; 86*724ba675SRob Herring 87*724ba675SRob Herring leds { 88*724ba675SRob Herring compatible = "gpio-leds"; 89*724ba675SRob Herring led-wps { 90*724ba675SRob Herring label = "dir685:blue:WPS"; 91*724ba675SRob Herring /* Collides with ICE */ 92*724ba675SRob Herring gpios = <&gpio0 7 GPIO_ACTIVE_LOW>; 93*724ba675SRob Herring default-state = "on"; 94*724ba675SRob Herring linux,default-trigger = "heartbeat"; 95*724ba675SRob Herring }; 96*724ba675SRob Herring /* 97*724ba675SRob Herring * These two LEDs are on the side of the device. 98*724ba675SRob Herring * For electrical reasons, both LEDs cannot be active 99*724ba675SRob Herring * at the same time so only blue or orange can be on at 100*724ba675SRob Herring * one time. Enabling both makes the LED go dark. 101*724ba675SRob Herring * The LEDs both sit inside the unmount button and the 102*724ba675SRob Herring * label on the case says "unmount". 103*724ba675SRob Herring */ 104*724ba675SRob Herring led-blue-hd { 105*724ba675SRob Herring label = "dir685:blue:HD"; 106*724ba675SRob Herring /* Collides with LPC_SERIRQ, UART DTR, SSP FSC pins */ 107*724ba675SRob Herring gpios = <&gpio0 11 GPIO_ACTIVE_HIGH>; 108*724ba675SRob Herring default-state = "off"; 109*724ba675SRob Herring linux,default-trigger = "disk-read"; 110*724ba675SRob Herring }; 111*724ba675SRob Herring led-orange-hd { 112*724ba675SRob Herring label = "dir685:orange:HD"; 113*724ba675SRob Herring /* Collides with LPC_LAD[2], UART DSR, SSP ECLK pins */ 114*724ba675SRob Herring gpios = <&gpio0 12 GPIO_ACTIVE_HIGH>; 115*724ba675SRob Herring default-state = "off"; 116*724ba675SRob Herring linux,default-trigger = "disk-write"; 117*724ba675SRob Herring }; 118*724ba675SRob Herring }; 119*724ba675SRob Herring 120*724ba675SRob Herring /* 121*724ba675SRob Herring * This is a Sunon Maglev GM0502PFV2-8 cooling fan @10000 RPM. 122*724ba675SRob Herring * sensor. It is turned on when the temperature exceeds 46 degrees 123*724ba675SRob Herring * and turned off when the temperatures goes below 41 degrees 124*724ba675SRob Herring * (celsius). 125*724ba675SRob Herring */ 126*724ba675SRob Herring fan0: gpio-fan { 127*724ba675SRob Herring compatible = "gpio-fan"; 128*724ba675SRob Herring /* Collides with IDE */ 129*724ba675SRob Herring gpios = <&gpio1 6 GPIO_ACTIVE_HIGH>; 130*724ba675SRob Herring gpio-fan,speed-map = <0 0>, <10000 1>; 131*724ba675SRob Herring #cooling-cells = <2>; 132*724ba675SRob Herring }; 133*724ba675SRob Herring 134*724ba675SRob Herring thermal-zones { 135*724ba675SRob Herring chassis-thermal { 136*724ba675SRob Herring /* Poll every 20 seconds */ 137*724ba675SRob Herring polling-delay = <20000>; 138*724ba675SRob Herring /* Poll every 2nd second when cooling */ 139*724ba675SRob Herring polling-delay-passive = <2000>; 140*724ba675SRob Herring /* Use the thermal sensor in the hard drive */ 141*724ba675SRob Herring thermal-sensors = <&drive0>; 142*724ba675SRob Herring 143*724ba675SRob Herring /* Tripping points from the fan.script in the rootfs */ 144*724ba675SRob Herring trips { 145*724ba675SRob Herring alert: chassis-alert { 146*724ba675SRob Herring /* At 43 degrees turn on the fan */ 147*724ba675SRob Herring temperature = <43000>; 148*724ba675SRob Herring hysteresis = <3000>; 149*724ba675SRob Herring type = "active"; 150*724ba675SRob Herring }; 151*724ba675SRob Herring crit: chassis-crit { 152*724ba675SRob Herring /* Just shut down at 60 degrees */ 153*724ba675SRob Herring temperature = <60000>; 154*724ba675SRob Herring hysteresis = <2000>; 155*724ba675SRob Herring type = "critical"; 156*724ba675SRob Herring }; 157*724ba675SRob Herring }; 158*724ba675SRob Herring 159*724ba675SRob Herring cooling-maps { 160*724ba675SRob Herring map0 { 161*724ba675SRob Herring trip = <&alert>; 162*724ba675SRob Herring cooling-device = <&fan0 1 1>; 163*724ba675SRob Herring }; 164*724ba675SRob Herring }; 165*724ba675SRob Herring }; 166*724ba675SRob Herring }; 167*724ba675SRob Herring 168*724ba675SRob Herring /* 169*724ba675SRob Herring * The touchpad input is connected to a GPIO bit-banged 170*724ba675SRob Herring * I2C bus. 171*724ba675SRob Herring */ 172*724ba675SRob Herring i2c { 173*724ba675SRob Herring compatible = "i2c-gpio"; 174*724ba675SRob Herring /* Collides with ICE */ 175*724ba675SRob Herring sda-gpios = <&gpio0 5 (GPIO_ACTIVE_HIGH|GPIO_OPEN_DRAIN)>; 176*724ba675SRob Herring scl-gpios = <&gpio0 6 (GPIO_ACTIVE_HIGH|GPIO_OPEN_DRAIN)>; 177*724ba675SRob Herring #address-cells = <1>; 178*724ba675SRob Herring #size-cells = <0>; 179*724ba675SRob Herring 180*724ba675SRob Herring touchkeys@26 { 181*724ba675SRob Herring compatible = "dlink,dir685-touchkeys"; 182*724ba675SRob Herring reg = <0x26>; 183*724ba675SRob Herring interrupt-parent = <&gpio0>; 184*724ba675SRob Herring /* Collides with NAND flash */ 185*724ba675SRob Herring interrupts = <17 IRQ_TYPE_EDGE_FALLING>; 186*724ba675SRob Herring }; 187*724ba675SRob Herring }; 188*724ba675SRob Herring 189*724ba675SRob Herring /* This is a RealTek RTL8366RB switch and PHY using SMI over GPIO */ 190*724ba675SRob Herring switch { 191*724ba675SRob Herring compatible = "realtek,rtl8366rb"; 192*724ba675SRob Herring /* 22 = MDIO (has input reads), 21 = MDC (clock, output only) */ 193*724ba675SRob Herring mdc-gpios = <&gpio0 21 GPIO_ACTIVE_HIGH>; 194*724ba675SRob Herring mdio-gpios = <&gpio0 22 GPIO_ACTIVE_HIGH>; 195*724ba675SRob Herring reset-gpios = <&gpio0 14 GPIO_ACTIVE_LOW>; 196*724ba675SRob Herring realtek,disable-leds; 197*724ba675SRob Herring 198*724ba675SRob Herring switch_intc: interrupt-controller { 199*724ba675SRob Herring /* GPIO 15 provides the interrupt */ 200*724ba675SRob Herring interrupt-parent = <&gpio0>; 201*724ba675SRob Herring interrupts = <15 IRQ_TYPE_LEVEL_LOW>; 202*724ba675SRob Herring interrupt-controller; 203*724ba675SRob Herring #address-cells = <0>; 204*724ba675SRob Herring #interrupt-cells = <1>; 205*724ba675SRob Herring }; 206*724ba675SRob Herring 207*724ba675SRob Herring ports { 208*724ba675SRob Herring #address-cells = <1>; 209*724ba675SRob Herring #size-cells = <0>; 210*724ba675SRob Herring 211*724ba675SRob Herring port@0 { 212*724ba675SRob Herring reg = <0>; 213*724ba675SRob Herring label = "lan0"; 214*724ba675SRob Herring phy-handle = <&phy0>; 215*724ba675SRob Herring }; 216*724ba675SRob Herring port@1 { 217*724ba675SRob Herring reg = <1>; 218*724ba675SRob Herring label = "lan1"; 219*724ba675SRob Herring phy-handle = <&phy1>; 220*724ba675SRob Herring }; 221*724ba675SRob Herring port@2 { 222*724ba675SRob Herring reg = <2>; 223*724ba675SRob Herring label = "lan2"; 224*724ba675SRob Herring phy-handle = <&phy2>; 225*724ba675SRob Herring }; 226*724ba675SRob Herring port@3 { 227*724ba675SRob Herring reg = <3>; 228*724ba675SRob Herring label = "lan3"; 229*724ba675SRob Herring phy-handle = <&phy3>; 230*724ba675SRob Herring }; 231*724ba675SRob Herring port@4 { 232*724ba675SRob Herring reg = <4>; 233*724ba675SRob Herring label = "wan"; 234*724ba675SRob Herring phy-handle = <&phy4>; 235*724ba675SRob Herring }; 236*724ba675SRob Herring rtl8366rb_cpu_port: port@5 { 237*724ba675SRob Herring reg = <5>; 238*724ba675SRob Herring label = "cpu"; 239*724ba675SRob Herring ethernet = <&gmac0>; 240*724ba675SRob Herring phy-mode = "rgmii"; 241*724ba675SRob Herring fixed-link { 242*724ba675SRob Herring speed = <1000>; 243*724ba675SRob Herring full-duplex; 244*724ba675SRob Herring pause; 245*724ba675SRob Herring }; 246*724ba675SRob Herring }; 247*724ba675SRob Herring 248*724ba675SRob Herring }; 249*724ba675SRob Herring 250*724ba675SRob Herring mdio { 251*724ba675SRob Herring compatible = "realtek,smi-mdio"; 252*724ba675SRob Herring #address-cells = <1>; 253*724ba675SRob Herring #size-cells = <0>; 254*724ba675SRob Herring 255*724ba675SRob Herring phy0: phy@0 { 256*724ba675SRob Herring reg = <0>; 257*724ba675SRob Herring interrupt-parent = <&switch_intc>; 258*724ba675SRob Herring interrupts = <0>; 259*724ba675SRob Herring }; 260*724ba675SRob Herring phy1: phy@1 { 261*724ba675SRob Herring reg = <1>; 262*724ba675SRob Herring interrupt-parent = <&switch_intc>; 263*724ba675SRob Herring interrupts = <1>; 264*724ba675SRob Herring }; 265*724ba675SRob Herring phy2: phy@2 { 266*724ba675SRob Herring reg = <2>; 267*724ba675SRob Herring interrupt-parent = <&switch_intc>; 268*724ba675SRob Herring interrupts = <2>; 269*724ba675SRob Herring }; 270*724ba675SRob Herring phy3: phy@3 { 271*724ba675SRob Herring reg = <3>; 272*724ba675SRob Herring interrupt-parent = <&switch_intc>; 273*724ba675SRob Herring interrupts = <3>; 274*724ba675SRob Herring }; 275*724ba675SRob Herring phy4: phy@4 { 276*724ba675SRob Herring reg = <4>; 277*724ba675SRob Herring interrupt-parent = <&switch_intc>; 278*724ba675SRob Herring interrupts = <12>; 279*724ba675SRob Herring }; 280*724ba675SRob Herring }; 281*724ba675SRob Herring }; 282*724ba675SRob Herring 283*724ba675SRob Herring soc { 284*724ba675SRob Herring flash@30000000 { 285*724ba675SRob Herring /* 286*724ba675SRob Herring * Flash access collides with the Chip Enable signal for 287*724ba675SRob Herring * the display panel, that reuse the parallel flash Chip 288*724ba675SRob Herring * Select 1 (CS1). We switch the pin control state so we 289*724ba675SRob Herring * enable these pins for flash access only when we need 290*724ba675SRob Herring * then, and when disabled they can be used for GPIO which 291*724ba675SRob Herring * is what the display panel needs. 292*724ba675SRob Herring */ 293*724ba675SRob Herring status = "okay"; 294*724ba675SRob Herring pinctrl-names = "enabled", "disabled"; 295*724ba675SRob Herring pinctrl-0 = <&pflash_default_pins>; 296*724ba675SRob Herring pinctrl-1 = <&pflash_disabled_pins>; 297*724ba675SRob Herring 298*724ba675SRob Herring /* 32MB of flash */ 299*724ba675SRob Herring reg = <0x30000000 0x02000000>; 300*724ba675SRob Herring 301*724ba675SRob Herring partitions { 302*724ba675SRob Herring compatible = "fixed-partitions"; 303*724ba675SRob Herring #address-cells = <1>; 304*724ba675SRob Herring #size-cells = <1>; 305*724ba675SRob Herring 306*724ba675SRob Herring /* 307*724ba675SRob Herring * This "RedBoot" is the Storlink derivative. 308*724ba675SRob Herring */ 309*724ba675SRob Herring partition@0 { 310*724ba675SRob Herring label = "RedBoot"; 311*724ba675SRob Herring reg = <0x00000000 0x00040000>; 312*724ba675SRob Herring read-only; 313*724ba675SRob Herring }; 314*724ba675SRob Herring /* 315*724ba675SRob Herring * This firmware image contains the kernel catenated 316*724ba675SRob Herring * with the squashfs root filesystem. For some reason 317*724ba675SRob Herring * this is called "upgrade" on the vendor system. 318*724ba675SRob Herring */ 319*724ba675SRob Herring partition@40000 { 320*724ba675SRob Herring label = "upgrade"; 321*724ba675SRob Herring reg = <0x00040000 0x01f40000>; 322*724ba675SRob Herring read-only; 323*724ba675SRob Herring }; 324*724ba675SRob Herring /* RGDB, Residental Gateway Database? */ 325*724ba675SRob Herring partition@1f80000 { 326*724ba675SRob Herring label = "rgdb"; 327*724ba675SRob Herring reg = <0x01f80000 0x00040000>; 328*724ba675SRob Herring read-only; 329*724ba675SRob Herring }; 330*724ba675SRob Herring /* 331*724ba675SRob Herring * This partition contains MAC addresses for WAN, 332*724ba675SRob Herring * WLAN and LAN, and the country code (for wireless 333*724ba675SRob Herring * I guess). 334*724ba675SRob Herring */ 335*724ba675SRob Herring partition@1fc0000 { 336*724ba675SRob Herring label = "nvram"; 337*724ba675SRob Herring reg = <0x01fc0000 0x00020000>; 338*724ba675SRob Herring read-only; 339*724ba675SRob Herring }; 340*724ba675SRob Herring partition@1fe0000 { 341*724ba675SRob Herring label = "LangPack"; 342*724ba675SRob Herring reg = <0x01fe0000 0x00020000>; 343*724ba675SRob Herring read-only; 344*724ba675SRob Herring }; 345*724ba675SRob Herring }; 346*724ba675SRob Herring }; 347*724ba675SRob Herring 348*724ba675SRob Herring syscon: syscon@40000000 { 349*724ba675SRob Herring pinctrl { 350*724ba675SRob Herring /* 351*724ba675SRob Herring * gpio0bgrp cover line 5, 6 used by TK I2C 352*724ba675SRob Herring * gpio0bgrp cover line 7 used by WPS LED 353*724ba675SRob Herring * gpio0cgrp cover line 8, 13 used by keys 354*724ba675SRob Herring * and 11, 12 used by the HD LEDs 355*724ba675SRob Herring * and line 14, 15 used by RTL8366 356*724ba675SRob Herring * RESET and phy ready 357*724ba675SRob Herring * gpio0egrp cover line 16 used by VDISP 358*724ba675SRob Herring * gpio0fgrp cover line 17 used by TK IRQ 359*724ba675SRob Herring * gpio0ggrp cover line 20 used by panel CS 360*724ba675SRob Herring * gpio0hgrp cover line 21,22 used by RTL8366RB MDIO 361*724ba675SRob Herring */ 362*724ba675SRob Herring gpio0_default_pins: pinctrl-gpio0 { 363*724ba675SRob Herring mux { 364*724ba675SRob Herring function = "gpio0"; 365*724ba675SRob Herring groups = "gpio0bgrp", 366*724ba675SRob Herring "gpio0cgrp", 367*724ba675SRob Herring "gpio0egrp", 368*724ba675SRob Herring "gpio0fgrp", 369*724ba675SRob Herring "gpio0hgrp"; 370*724ba675SRob Herring }; 371*724ba675SRob Herring }; 372*724ba675SRob Herring /* 373*724ba675SRob Herring * gpio1bgrp cover line 5,8,7 used by panel SPI 374*724ba675SRob Herring * also line 6 used by the fan 375*724ba675SRob Herring * 376*724ba675SRob Herring */ 377*724ba675SRob Herring gpio1_default_pins: pinctrl-gpio1 { 378*724ba675SRob Herring mux { 379*724ba675SRob Herring function = "gpio1"; 380*724ba675SRob Herring groups = "gpio1bgrp"; 381*724ba675SRob Herring }; 382*724ba675SRob Herring }; 383*724ba675SRob Herring /* 384*724ba675SRob Herring * These GPIO groups will be mapped in over some 385*724ba675SRob Herring * of the flash pins when the flash is not in 386*724ba675SRob Herring * active use. 387*724ba675SRob Herring */ 388*724ba675SRob Herring pflash_disabled_pins: pinctrl-pflash-disabled { 389*724ba675SRob Herring mux { 390*724ba675SRob Herring function = "gpio0"; 391*724ba675SRob Herring groups = "gpio0ggrp", "gpio0igrp", "gpio0jgrp", 392*724ba675SRob Herring "gpio0kgrp"; 393*724ba675SRob Herring }; 394*724ba675SRob Herring }; 395*724ba675SRob Herring pinctrl-gmii { 396*724ba675SRob Herring mux { 397*724ba675SRob Herring function = "gmii"; 398*724ba675SRob Herring groups = "gmii_gmac0_grp"; 399*724ba675SRob Herring }; 400*724ba675SRob Herring conf0 { 401*724ba675SRob Herring pins = "V8 GMAC0 RXDV", "T10 GMAC1 RXDV", 402*724ba675SRob Herring "Y7 GMAC0 RXC", "Y11 GMAC1 RXC", 403*724ba675SRob Herring "T8 GMAC0 TXEN", "W11 GMAC1 TXEN", 404*724ba675SRob Herring "U8 GMAC0 TXC", "V11 GMAC1 TXC", 405*724ba675SRob Herring "W8 GMAC0 RXD0", "V9 GMAC0 RXD1", 406*724ba675SRob Herring "Y8 GMAC0 RXD2", "U9 GMAC0 RXD3", 407*724ba675SRob Herring "T7 GMAC0 TXD0", "U6 GMAC0 TXD1", 408*724ba675SRob Herring "V7 GMAC0 TXD2", "U7 GMAC0 TXD3", 409*724ba675SRob Herring "Y12 GMAC1 RXD0", "V12 GMAC1 RXD1", 410*724ba675SRob Herring "T11 GMAC1 RXD2", "W12 GMAC1 RXD3", 411*724ba675SRob Herring "U10 GMAC1 TXD0", "Y10 GMAC1 TXD1", 412*724ba675SRob Herring "W10 GMAC1 TXD2", "T9 GMAC1 TXD3"; 413*724ba675SRob Herring skew-delay = <7>; 414*724ba675SRob Herring }; 415*724ba675SRob Herring /* Set up drive strength on GMAC0 to 16 mA */ 416*724ba675SRob Herring conf1 { 417*724ba675SRob Herring groups = "gmii_gmac0_grp"; 418*724ba675SRob Herring drive-strength = <16>; 419*724ba675SRob Herring }; 420*724ba675SRob Herring }; 421*724ba675SRob Herring }; 422*724ba675SRob Herring }; 423*724ba675SRob Herring 424*724ba675SRob Herring sata: sata@46000000 { 425*724ba675SRob Herring cortina,gemini-ata-muxmode = <0>; 426*724ba675SRob Herring cortina,gemini-enable-sata-bridge; 427*724ba675SRob Herring status = "okay"; 428*724ba675SRob Herring }; 429*724ba675SRob Herring 430*724ba675SRob Herring gpio0: gpio@4d000000 { 431*724ba675SRob Herring pinctrl-names = "default"; 432*724ba675SRob Herring pinctrl-0 = <&gpio0_default_pins>; 433*724ba675SRob Herring }; 434*724ba675SRob Herring 435*724ba675SRob Herring gpio1: gpio@4e000000 { 436*724ba675SRob Herring pinctrl-names = "default"; 437*724ba675SRob Herring pinctrl-0 = <&gpio1_default_pins>; 438*724ba675SRob Herring }; 439*724ba675SRob Herring 440*724ba675SRob Herring pci@50000000 { 441*724ba675SRob Herring status = "okay"; 442*724ba675SRob Herring }; 443*724ba675SRob Herring 444*724ba675SRob Herring ethernet@60000000 { 445*724ba675SRob Herring status = "okay"; 446*724ba675SRob Herring 447*724ba675SRob Herring ethernet-port@0 { 448*724ba675SRob Herring phy-mode = "rgmii"; 449*724ba675SRob Herring fixed-link { 450*724ba675SRob Herring speed = <1000>; 451*724ba675SRob Herring full-duplex; 452*724ba675SRob Herring pause; 453*724ba675SRob Herring }; 454*724ba675SRob Herring }; 455*724ba675SRob Herring ethernet-port@1 { 456*724ba675SRob Herring /* Not used in this platform */ 457*724ba675SRob Herring }; 458*724ba675SRob Herring }; 459*724ba675SRob Herring 460*724ba675SRob Herring ide@63000000 { 461*724ba675SRob Herring status = "okay"; 462*724ba675SRob Herring 463*724ba675SRob Herring /* 464*724ba675SRob Herring * This drive may have a temperature sensor with a 465*724ba675SRob Herring * thermal zone we can use for thermal control of the 466*724ba675SRob Herring * chassis temperature using the fan. 467*724ba675SRob Herring */ 468*724ba675SRob Herring drive0: ide-port@0 { 469*724ba675SRob Herring reg = <0>; 470*724ba675SRob Herring #thermal-sensor-cells = <0>; 471*724ba675SRob Herring }; 472*724ba675SRob Herring }; 473*724ba675SRob Herring 474*724ba675SRob Herring display-controller@6a000000 { 475*724ba675SRob Herring status = "okay"; 476*724ba675SRob Herring 477*724ba675SRob Herring port { 478*724ba675SRob Herring display_out: endpoint { 479*724ba675SRob Herring remote-endpoint = <&panel_in>; 480*724ba675SRob Herring }; 481*724ba675SRob Herring }; 482*724ba675SRob Herring }; 483*724ba675SRob Herring 484*724ba675SRob Herring usb@68000000 { 485*724ba675SRob Herring status = "okay"; 486*724ba675SRob Herring }; 487*724ba675SRob Herring 488*724ba675SRob Herring usb@69000000 { 489*724ba675SRob Herring status = "okay"; 490*724ba675SRob Herring }; 491*724ba675SRob Herring }; 492*724ba675SRob Herring}; 493