1724ba675SRob Herring// SPDX-License-Identifier: GPL-2.0-or-later OR MIT 2724ba675SRob Herring/* 3724ba675SRob Herring * Copyright (C) 2016 Rafał Miłecki <rafal@milecki.pl> 4724ba675SRob Herring */ 5724ba675SRob Herring 6724ba675SRob Herring#include <dt-bindings/gpio/gpio.h> 7724ba675SRob Herring#include <dt-bindings/input/input.h> 8724ba675SRob Herring#include <dt-bindings/interrupt-controller/irq.h> 9724ba675SRob Herring#include <dt-bindings/interrupt-controller/arm-gic.h> 10724ba675SRob Herring 11724ba675SRob Herring/ { 12724ba675SRob Herring #address-cells = <1>; 13724ba675SRob Herring #size-cells = <1>; 14724ba675SRob Herring interrupt-parent = <&gic>; 15724ba675SRob Herring 16724ba675SRob Herring aliases { 17724ba675SRob Herring serial0 = &uart0; 18724ba675SRob Herring }; 19724ba675SRob Herring 20724ba675SRob Herring chosen { 21724ba675SRob Herring stdout-path = "serial0:115200n8"; 22724ba675SRob Herring }; 23724ba675SRob Herring 24724ba675SRob Herring cpus { 25724ba675SRob Herring #address-cells = <1>; 26724ba675SRob Herring #size-cells = <0>; 27724ba675SRob Herring 28724ba675SRob Herring cpu@0 { 29724ba675SRob Herring device_type = "cpu"; 30724ba675SRob Herring compatible = "arm,cortex-a7"; 31724ba675SRob Herring reg = <0x0>; 32724ba675SRob Herring }; 33724ba675SRob Herring }; 34724ba675SRob Herring 35724ba675SRob Herring mpcore@18310000 { 36724ba675SRob Herring compatible = "simple-bus"; 37724ba675SRob Herring ranges = <0x00000000 0x18310000 0x00008000>; 38724ba675SRob Herring #address-cells = <1>; 39724ba675SRob Herring #size-cells = <1>; 40724ba675SRob Herring 41724ba675SRob Herring gic: interrupt-controller@1000 { 42724ba675SRob Herring compatible = "arm,cortex-a7-gic"; 43724ba675SRob Herring #interrupt-cells = <3>; 44724ba675SRob Herring #address-cells = <0>; 45724ba675SRob Herring interrupt-controller; 46724ba675SRob Herring reg = <0x1000 0x1000>, 47724ba675SRob Herring <0x2000 0x0100>; 48724ba675SRob Herring }; 49724ba675SRob Herring }; 50724ba675SRob Herring 51724ba675SRob Herring timer { 52724ba675SRob Herring compatible = "arm,armv7-timer"; 53724ba675SRob Herring interrupts = <GIC_PPI 13 IRQ_TYPE_LEVEL_LOW>, 54724ba675SRob Herring <GIC_PPI 14 IRQ_TYPE_LEVEL_LOW>, 55724ba675SRob Herring <GIC_PPI 11 IRQ_TYPE_LEVEL_LOW>, 56724ba675SRob Herring <GIC_PPI 10 IRQ_TYPE_LEVEL_LOW>; 57724ba675SRob Herring }; 58724ba675SRob Herring 59724ba675SRob Herring clocks { 60724ba675SRob Herring #address-cells = <1>; 61724ba675SRob Herring #size-cells = <1>; 62724ba675SRob Herring ranges; 63724ba675SRob Herring 64724ba675SRob Herring alp: oscillator { 65724ba675SRob Herring #clock-cells = <0>; 66724ba675SRob Herring compatible = "fixed-clock"; 67724ba675SRob Herring clock-frequency = <40000000>; 68724ba675SRob Herring }; 69724ba675SRob Herring }; 70724ba675SRob Herring 71724ba675SRob Herring axi@18000000 { 72724ba675SRob Herring compatible = "brcm,bus-axi"; 73724ba675SRob Herring reg = <0x18000000 0x1000>; 74724ba675SRob Herring ranges = <0x00000000 0x18000000 0x00100000>; 75724ba675SRob Herring #address-cells = <1>; 76724ba675SRob Herring #size-cells = <1>; 77724ba675SRob Herring 78724ba675SRob Herring #interrupt-cells = <1>; 79724ba675SRob Herring interrupt-map-mask = <0x000fffff 0xffff>; 80724ba675SRob Herring interrupt-map = 81724ba675SRob Herring /* ChipCommon */ 82724ba675SRob Herring <0x00000000 0 &gic GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>, 83724ba675SRob Herring 84724ba675SRob Herring /* IEEE 802.11 0 */ 85724ba675SRob Herring <0x00001000 0 &gic GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>, 86724ba675SRob Herring 87724ba675SRob Herring /* PCIe Controller 0 */ 88724ba675SRob Herring <0x00002000 0 &gic GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>, 89724ba675SRob Herring <0x00002000 1 &gic GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>, 90724ba675SRob Herring <0x00002000 2 &gic GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>, 91724ba675SRob Herring <0x00002000 3 &gic GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>, 92724ba675SRob Herring <0x00002000 4 &gic GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>, 93724ba675SRob Herring <0x00002000 5 &gic GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>, 94724ba675SRob Herring 95724ba675SRob Herring /* USB 2.0 Controller */ 96724ba675SRob Herring <0x00004000 0 &gic GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>, 97724ba675SRob Herring 98724ba675SRob Herring /* Ethernet Controller 0 */ 99724ba675SRob Herring <0x00005000 0 &gic GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>, 100724ba675SRob Herring 101724ba675SRob Herring /* IEEE 802.11 1 */ 102724ba675SRob Herring <0x0000a000 0 &gic GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>, 103724ba675SRob Herring 104724ba675SRob Herring /* Ethernet Controller 1 */ 105724ba675SRob Herring <0x0000b000 0 &gic GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>; 106724ba675SRob Herring 107724ba675SRob Herring chipcommon: chipcommon@0 { 108724ba675SRob Herring compatible = "simple-bus"; 109724ba675SRob Herring reg = <0x00000000 0x1000>; 110724ba675SRob Herring ranges; 111724ba675SRob Herring 112724ba675SRob Herring #address-cells = <1>; 113724ba675SRob Herring #size-cells = <1>; 114724ba675SRob Herring 115724ba675SRob Herring gpio-controller; 116724ba675SRob Herring #gpio-cells = <2>; 117724ba675SRob Herring 118724ba675SRob Herring uart0: serial@300 { 119724ba675SRob Herring compatible = "ns16550a"; 120724ba675SRob Herring reg = <0x0300 0x100>; 121724ba675SRob Herring interrupt-parent = <&gic>; 122724ba675SRob Herring interrupts = <GIC_PPI 16 IRQ_TYPE_LEVEL_HIGH>; 123724ba675SRob Herring clocks = <&alp>; 124724ba675SRob Herring status = "okay"; 125724ba675SRob Herring }; 126724ba675SRob Herring }; 127724ba675SRob Herring 128724ba675SRob Herring pcie0: pcie@2000 { 129724ba675SRob Herring reg = <0x00002000 0x1000>; 1303392ef36SRafał Miłecki 1313392ef36SRafał Miłecki #address-cells = <3>; 1323392ef36SRafał Miłecki #size-cells = <2>; 133724ba675SRob Herring }; 134724ba675SRob Herring 135724ba675SRob Herring usb2: usb2@4000 { 136724ba675SRob Herring reg = <0x4000 0x1000>; 137724ba675SRob Herring ranges; 138724ba675SRob Herring #address-cells = <1>; 139724ba675SRob Herring #size-cells = <1>; 140724ba675SRob Herring 141724ba675SRob Herring ehci: usb@4000 { 142724ba675SRob Herring compatible = "generic-ehci"; 143724ba675SRob Herring reg = <0x4000 0x1000>; 144724ba675SRob Herring interrupt-parent = <&gic>; 145724ba675SRob Herring interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>; 146724ba675SRob Herring 147724ba675SRob Herring #address-cells = <1>; 148724ba675SRob Herring #size-cells = <0>; 149724ba675SRob Herring 150724ba675SRob Herring ehci_port1: port@1 { 151724ba675SRob Herring reg = <1>; 152724ba675SRob Herring #trigger-source-cells = <0>; 153724ba675SRob Herring }; 154724ba675SRob Herring 155724ba675SRob Herring ehci_port2: port@2 { 156724ba675SRob Herring reg = <2>; 157724ba675SRob Herring #trigger-source-cells = <0>; 158724ba675SRob Herring }; 159724ba675SRob Herring }; 160724ba675SRob Herring 161724ba675SRob Herring ohci: usb@d000 { 162724ba675SRob Herring compatible = "generic-ohci"; 163724ba675SRob Herring reg = <0xd000 0x1000>; 164724ba675SRob Herring interrupt-parent = <&gic>; 165724ba675SRob Herring interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>; 166724ba675SRob Herring 167724ba675SRob Herring #address-cells = <1>; 168724ba675SRob Herring #size-cells = <0>; 169724ba675SRob Herring 170724ba675SRob Herring ohci_port1: port@1 { 171724ba675SRob Herring reg = <1>; 172724ba675SRob Herring #trigger-source-cells = <0>; 173724ba675SRob Herring }; 174724ba675SRob Herring 175724ba675SRob Herring ohci_port2: port@2 { 176724ba675SRob Herring reg = <2>; 177724ba675SRob Herring #trigger-source-cells = <0>; 178724ba675SRob Herring }; 179724ba675SRob Herring }; 180724ba675SRob Herring }; 181724ba675SRob Herring 182724ba675SRob Herring gmac0: ethernet@5000 { 183724ba675SRob Herring reg = <0x5000 0x1000>; 184724ba675SRob Herring 185724ba675SRob Herring mdio { 186724ba675SRob Herring #address-cells = <1>; 187724ba675SRob Herring #size-cells = <0>; 188724ba675SRob Herring 189724ba675SRob Herring switch: switch@1e { 190724ba675SRob Herring compatible = "brcm,bcm53125"; 191724ba675SRob Herring reg = <0x1e>; 192724ba675SRob Herring 193724ba675SRob Herring status = "disabled"; 194724ba675SRob Herring 195724ba675SRob Herring ports { 196724ba675SRob Herring #address-cells = <1>; 197724ba675SRob Herring #size-cells = <0>; 1988d6b61ecSRafał Miłecki 1998d6b61ecSRafał Miłecki port@0 { 2008d6b61ecSRafał Miłecki reg = <0>; 2018d6b61ecSRafał Miłecki }; 2028d6b61ecSRafał Miłecki 2038d6b61ecSRafał Miłecki port@1 { 2048d6b61ecSRafał Miłecki reg = <1>; 2058d6b61ecSRafał Miłecki }; 2068d6b61ecSRafał Miłecki 2078d6b61ecSRafał Miłecki port@2 { 2088d6b61ecSRafał Miłecki reg = <2>; 2098d6b61ecSRafał Miłecki }; 2108d6b61ecSRafał Miłecki 2118d6b61ecSRafał Miłecki port@3 { 2128d6b61ecSRafał Miłecki reg = <3>; 2138d6b61ecSRafał Miłecki }; 2148d6b61ecSRafał Miłecki 2158d6b61ecSRafał Miłecki port@4 { 2168d6b61ecSRafał Miłecki reg = <4>; 2178d6b61ecSRafał Miłecki }; 2188d6b61ecSRafał Miłecki 219*d95b1caeSRafał Miłecki port@5 { 220*d95b1caeSRafał Miłecki reg = <5>; 221*d95b1caeSRafał Miłecki ethernet = <&gmac1>; 222*d95b1caeSRafał Miłecki 223*d95b1caeSRafał Miłecki fixed-link { 224*d95b1caeSRafał Miłecki speed = <1000>; 225*d95b1caeSRafał Miłecki full-duplex; 226*d95b1caeSRafał Miłecki }; 227*d95b1caeSRafał Miłecki }; 228*d95b1caeSRafał Miłecki 2298d6b61ecSRafał Miłecki port@8 { 2308d6b61ecSRafał Miłecki reg = <8>; 2318d6b61ecSRafał Miłecki ethernet = <&gmac0>; 2328d6b61ecSRafał Miłecki }; 233724ba675SRob Herring }; 234724ba675SRob Herring }; 235724ba675SRob Herring }; 236724ba675SRob Herring }; 237724ba675SRob Herring 238724ba675SRob Herring gmac1: ethernet@b000 { 239724ba675SRob Herring reg = <0xb000 0x1000>; 240724ba675SRob Herring }; 241724ba675SRob Herring 242724ba675SRob Herring pmu@12000 { 243724ba675SRob Herring compatible = "simple-mfd", "syscon"; 244724ba675SRob Herring reg = <0x00012000 0x00001000>; 245724ba675SRob Herring 246724ba675SRob Herring ilp: ilp { 247724ba675SRob Herring compatible = "brcm,bcm53573-ilp"; 248724ba675SRob Herring clocks = <&alp>; 249724ba675SRob Herring #clock-cells = <0>; 250724ba675SRob Herring clock-output-names = "ilp"; 251724ba675SRob Herring }; 252724ba675SRob Herring }; 253724ba675SRob Herring }; 254724ba675SRob Herring}; 255