1*724ba675SRob Herring// SPDX-License-Identifier: GPL-2.0-or-later OR MIT 2*724ba675SRob Herring/* 3*724ba675SRob Herring * Copyright (C) 2016 Rafał Miłecki <rafal@milecki.pl> 4*724ba675SRob Herring */ 5*724ba675SRob Herring 6*724ba675SRob Herring#include <dt-bindings/gpio/gpio.h> 7*724ba675SRob Herring#include <dt-bindings/input/input.h> 8*724ba675SRob Herring#include <dt-bindings/interrupt-controller/irq.h> 9*724ba675SRob Herring#include <dt-bindings/interrupt-controller/arm-gic.h> 10*724ba675SRob Herring 11*724ba675SRob Herring/ { 12*724ba675SRob Herring #address-cells = <1>; 13*724ba675SRob Herring #size-cells = <1>; 14*724ba675SRob Herring interrupt-parent = <&gic>; 15*724ba675SRob Herring 16*724ba675SRob Herring aliases { 17*724ba675SRob Herring serial0 = &uart0; 18*724ba675SRob Herring }; 19*724ba675SRob Herring 20*724ba675SRob Herring chosen { 21*724ba675SRob Herring stdout-path = "serial0:115200n8"; 22*724ba675SRob Herring }; 23*724ba675SRob Herring 24*724ba675SRob Herring cpus { 25*724ba675SRob Herring #address-cells = <1>; 26*724ba675SRob Herring #size-cells = <0>; 27*724ba675SRob Herring 28*724ba675SRob Herring cpu@0 { 29*724ba675SRob Herring device_type = "cpu"; 30*724ba675SRob Herring compatible = "arm,cortex-a7"; 31*724ba675SRob Herring reg = <0x0>; 32*724ba675SRob Herring }; 33*724ba675SRob Herring }; 34*724ba675SRob Herring 35*724ba675SRob Herring mpcore@18310000 { 36*724ba675SRob Herring compatible = "simple-bus"; 37*724ba675SRob Herring ranges = <0x00000000 0x18310000 0x00008000>; 38*724ba675SRob Herring #address-cells = <1>; 39*724ba675SRob Herring #size-cells = <1>; 40*724ba675SRob Herring 41*724ba675SRob Herring gic: interrupt-controller@1000 { 42*724ba675SRob Herring compatible = "arm,cortex-a7-gic"; 43*724ba675SRob Herring #interrupt-cells = <3>; 44*724ba675SRob Herring #address-cells = <0>; 45*724ba675SRob Herring interrupt-controller; 46*724ba675SRob Herring reg = <0x1000 0x1000>, 47*724ba675SRob Herring <0x2000 0x0100>; 48*724ba675SRob Herring }; 49*724ba675SRob Herring }; 50*724ba675SRob Herring 51*724ba675SRob Herring timer { 52*724ba675SRob Herring compatible = "arm,armv7-timer"; 53*724ba675SRob Herring interrupts = <GIC_PPI 13 IRQ_TYPE_LEVEL_LOW>, 54*724ba675SRob Herring <GIC_PPI 14 IRQ_TYPE_LEVEL_LOW>, 55*724ba675SRob Herring <GIC_PPI 11 IRQ_TYPE_LEVEL_LOW>, 56*724ba675SRob Herring <GIC_PPI 10 IRQ_TYPE_LEVEL_LOW>; 57*724ba675SRob Herring }; 58*724ba675SRob Herring 59*724ba675SRob Herring clocks { 60*724ba675SRob Herring #address-cells = <1>; 61*724ba675SRob Herring #size-cells = <1>; 62*724ba675SRob Herring ranges; 63*724ba675SRob Herring 64*724ba675SRob Herring alp: oscillator { 65*724ba675SRob Herring #clock-cells = <0>; 66*724ba675SRob Herring compatible = "fixed-clock"; 67*724ba675SRob Herring clock-frequency = <40000000>; 68*724ba675SRob Herring }; 69*724ba675SRob Herring }; 70*724ba675SRob Herring 71*724ba675SRob Herring axi@18000000 { 72*724ba675SRob Herring compatible = "brcm,bus-axi"; 73*724ba675SRob Herring reg = <0x18000000 0x1000>; 74*724ba675SRob Herring ranges = <0x00000000 0x18000000 0x00100000>; 75*724ba675SRob Herring #address-cells = <1>; 76*724ba675SRob Herring #size-cells = <1>; 77*724ba675SRob Herring 78*724ba675SRob Herring #interrupt-cells = <1>; 79*724ba675SRob Herring interrupt-map-mask = <0x000fffff 0xffff>; 80*724ba675SRob Herring interrupt-map = 81*724ba675SRob Herring /* ChipCommon */ 82*724ba675SRob Herring <0x00000000 0 &gic GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>, 83*724ba675SRob Herring 84*724ba675SRob Herring /* IEEE 802.11 0 */ 85*724ba675SRob Herring <0x00001000 0 &gic GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>, 86*724ba675SRob Herring 87*724ba675SRob Herring /* PCIe Controller 0 */ 88*724ba675SRob Herring <0x00002000 0 &gic GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>, 89*724ba675SRob Herring <0x00002000 1 &gic GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>, 90*724ba675SRob Herring <0x00002000 2 &gic GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>, 91*724ba675SRob Herring <0x00002000 3 &gic GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>, 92*724ba675SRob Herring <0x00002000 4 &gic GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>, 93*724ba675SRob Herring <0x00002000 5 &gic GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>, 94*724ba675SRob Herring 95*724ba675SRob Herring /* USB 2.0 Controller */ 96*724ba675SRob Herring <0x00004000 0 &gic GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>, 97*724ba675SRob Herring 98*724ba675SRob Herring /* Ethernet Controller 0 */ 99*724ba675SRob Herring <0x00005000 0 &gic GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>, 100*724ba675SRob Herring 101*724ba675SRob Herring /* IEEE 802.11 1 */ 102*724ba675SRob Herring <0x0000a000 0 &gic GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>, 103*724ba675SRob Herring 104*724ba675SRob Herring /* Ethernet Controller 1 */ 105*724ba675SRob Herring <0x0000b000 0 &gic GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>; 106*724ba675SRob Herring 107*724ba675SRob Herring chipcommon: chipcommon@0 { 108*724ba675SRob Herring compatible = "simple-bus"; 109*724ba675SRob Herring reg = <0x00000000 0x1000>; 110*724ba675SRob Herring ranges; 111*724ba675SRob Herring 112*724ba675SRob Herring #address-cells = <1>; 113*724ba675SRob Herring #size-cells = <1>; 114*724ba675SRob Herring 115*724ba675SRob Herring gpio-controller; 116*724ba675SRob Herring #gpio-cells = <2>; 117*724ba675SRob Herring 118*724ba675SRob Herring uart0: serial@300 { 119*724ba675SRob Herring compatible = "ns16550a"; 120*724ba675SRob Herring reg = <0x0300 0x100>; 121*724ba675SRob Herring interrupt-parent = <&gic>; 122*724ba675SRob Herring interrupts = <GIC_PPI 16 IRQ_TYPE_LEVEL_HIGH>; 123*724ba675SRob Herring clocks = <&alp>; 124*724ba675SRob Herring status = "okay"; 125*724ba675SRob Herring }; 126*724ba675SRob Herring }; 127*724ba675SRob Herring 128*724ba675SRob Herring pcie0: pcie@2000 { 129*724ba675SRob Herring reg = <0x00002000 0x1000>; 130*724ba675SRob Herring }; 131*724ba675SRob Herring 132*724ba675SRob Herring usb2: usb2@4000 { 133*724ba675SRob Herring reg = <0x4000 0x1000>; 134*724ba675SRob Herring ranges; 135*724ba675SRob Herring #address-cells = <1>; 136*724ba675SRob Herring #size-cells = <1>; 137*724ba675SRob Herring 138*724ba675SRob Herring ehci: usb@4000 { 139*724ba675SRob Herring compatible = "generic-ehci"; 140*724ba675SRob Herring reg = <0x4000 0x1000>; 141*724ba675SRob Herring interrupt-parent = <&gic>; 142*724ba675SRob Herring interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>; 143*724ba675SRob Herring 144*724ba675SRob Herring #address-cells = <1>; 145*724ba675SRob Herring #size-cells = <0>; 146*724ba675SRob Herring 147*724ba675SRob Herring ehci_port1: port@1 { 148*724ba675SRob Herring reg = <1>; 149*724ba675SRob Herring #trigger-source-cells = <0>; 150*724ba675SRob Herring }; 151*724ba675SRob Herring 152*724ba675SRob Herring ehci_port2: port@2 { 153*724ba675SRob Herring reg = <2>; 154*724ba675SRob Herring #trigger-source-cells = <0>; 155*724ba675SRob Herring }; 156*724ba675SRob Herring }; 157*724ba675SRob Herring 158*724ba675SRob Herring ohci: usb@d000 { 159*724ba675SRob Herring #usb-cells = <0>; 160*724ba675SRob Herring 161*724ba675SRob Herring compatible = "generic-ohci"; 162*724ba675SRob Herring reg = <0xd000 0x1000>; 163*724ba675SRob Herring interrupt-parent = <&gic>; 164*724ba675SRob Herring interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>; 165*724ba675SRob Herring 166*724ba675SRob Herring #address-cells = <1>; 167*724ba675SRob Herring #size-cells = <0>; 168*724ba675SRob Herring 169*724ba675SRob Herring ohci_port1: port@1 { 170*724ba675SRob Herring reg = <1>; 171*724ba675SRob Herring #trigger-source-cells = <0>; 172*724ba675SRob Herring }; 173*724ba675SRob Herring 174*724ba675SRob Herring ohci_port2: port@2 { 175*724ba675SRob Herring reg = <2>; 176*724ba675SRob Herring #trigger-source-cells = <0>; 177*724ba675SRob Herring }; 178*724ba675SRob Herring }; 179*724ba675SRob Herring }; 180*724ba675SRob Herring 181*724ba675SRob Herring gmac0: ethernet@5000 { 182*724ba675SRob Herring reg = <0x5000 0x1000>; 183*724ba675SRob Herring 184*724ba675SRob Herring mdio { 185*724ba675SRob Herring #address-cells = <1>; 186*724ba675SRob Herring #size-cells = <0>; 187*724ba675SRob Herring 188*724ba675SRob Herring switch: switch@1e { 189*724ba675SRob Herring compatible = "brcm,bcm53125"; 190*724ba675SRob Herring reg = <0x1e>; 191*724ba675SRob Herring 192*724ba675SRob Herring status = "disabled"; 193*724ba675SRob Herring 194*724ba675SRob Herring /* ports are defined in board DTS */ 195*724ba675SRob Herring ports { 196*724ba675SRob Herring #address-cells = <1>; 197*724ba675SRob Herring #size-cells = <0>; 198*724ba675SRob Herring }; 199*724ba675SRob Herring }; 200*724ba675SRob Herring }; 201*724ba675SRob Herring }; 202*724ba675SRob Herring 203*724ba675SRob Herring gmac1: ethernet@b000 { 204*724ba675SRob Herring reg = <0xb000 0x1000>; 205*724ba675SRob Herring }; 206*724ba675SRob Herring 207*724ba675SRob Herring pmu@12000 { 208*724ba675SRob Herring compatible = "simple-mfd", "syscon"; 209*724ba675SRob Herring reg = <0x00012000 0x00001000>; 210*724ba675SRob Herring 211*724ba675SRob Herring ilp: ilp { 212*724ba675SRob Herring compatible = "brcm,bcm53573-ilp"; 213*724ba675SRob Herring clocks = <&alp>; 214*724ba675SRob Herring #clock-cells = <0>; 215*724ba675SRob Herring clock-output-names = "ilp"; 216*724ba675SRob Herring }; 217*724ba675SRob Herring }; 218*724ba675SRob Herring }; 219*724ba675SRob Herring}; 220