1*724ba675SRob Herring// SPDX-License-Identifier: GPL-2.0 2*724ba675SRob Herring 3*724ba675SRob Herring/* This include file covers the common peripherals and configuration between 4*724ba675SRob Herring * bcm2835, bcm2836 and bcm2837 implementations. 5*724ba675SRob Herring */ 6*724ba675SRob Herring 7*724ba675SRob Herring/ { 8*724ba675SRob Herring interrupt-parent = <&intc>; 9*724ba675SRob Herring 10*724ba675SRob Herring soc { 11*724ba675SRob Herring dma: dma@7e007000 { 12*724ba675SRob Herring compatible = "brcm,bcm2835-dma"; 13*724ba675SRob Herring reg = <0x7e007000 0xf00>; 14*724ba675SRob Herring interrupts = <1 16>, 15*724ba675SRob Herring <1 17>, 16*724ba675SRob Herring <1 18>, 17*724ba675SRob Herring <1 19>, 18*724ba675SRob Herring <1 20>, 19*724ba675SRob Herring <1 21>, 20*724ba675SRob Herring <1 22>, 21*724ba675SRob Herring <1 23>, 22*724ba675SRob Herring <1 24>, 23*724ba675SRob Herring <1 25>, 24*724ba675SRob Herring <1 26>, 25*724ba675SRob Herring /* dma channel 11-14 share one irq */ 26*724ba675SRob Herring <1 27>, 27*724ba675SRob Herring <1 27>, 28*724ba675SRob Herring <1 27>, 29*724ba675SRob Herring <1 27>, 30*724ba675SRob Herring /* unused shared irq for all channels */ 31*724ba675SRob Herring <1 28>; 32*724ba675SRob Herring interrupt-names = "dma0", 33*724ba675SRob Herring "dma1", 34*724ba675SRob Herring "dma2", 35*724ba675SRob Herring "dma3", 36*724ba675SRob Herring "dma4", 37*724ba675SRob Herring "dma5", 38*724ba675SRob Herring "dma6", 39*724ba675SRob Herring "dma7", 40*724ba675SRob Herring "dma8", 41*724ba675SRob Herring "dma9", 42*724ba675SRob Herring "dma10", 43*724ba675SRob Herring "dma11", 44*724ba675SRob Herring "dma12", 45*724ba675SRob Herring "dma13", 46*724ba675SRob Herring "dma14", 47*724ba675SRob Herring "dma-shared-all"; 48*724ba675SRob Herring #dma-cells = <1>; 49*724ba675SRob Herring brcm,dma-channel-mask = <0x7f35>; 50*724ba675SRob Herring }; 51*724ba675SRob Herring 52*724ba675SRob Herring intc: interrupt-controller@7e00b200 { 53*724ba675SRob Herring compatible = "brcm,bcm2835-armctrl-ic"; 54*724ba675SRob Herring reg = <0x7e00b200 0x200>; 55*724ba675SRob Herring interrupt-controller; 56*724ba675SRob Herring #interrupt-cells = <2>; 57*724ba675SRob Herring }; 58*724ba675SRob Herring 59*724ba675SRob Herring pm: watchdog@7e100000 { 60*724ba675SRob Herring compatible = "brcm,bcm2835-pm", "brcm,bcm2835-pm-wdt"; 61*724ba675SRob Herring #power-domain-cells = <1>; 62*724ba675SRob Herring #reset-cells = <1>; 63*724ba675SRob Herring reg = <0x7e100000 0x114>, 64*724ba675SRob Herring <0x7e00a000 0x24>; 65*724ba675SRob Herring reg-names = "pm", "asb"; 66*724ba675SRob Herring clocks = <&clocks BCM2835_CLOCK_V3D>, 67*724ba675SRob Herring <&clocks BCM2835_CLOCK_PERI_IMAGE>, 68*724ba675SRob Herring <&clocks BCM2835_CLOCK_H264>, 69*724ba675SRob Herring <&clocks BCM2835_CLOCK_ISP>; 70*724ba675SRob Herring clock-names = "v3d", "peri_image", "h264", "isp"; 71*724ba675SRob Herring system-power-controller; 72*724ba675SRob Herring }; 73*724ba675SRob Herring 74*724ba675SRob Herring rng@7e104000 { 75*724ba675SRob Herring compatible = "brcm,bcm2835-rng"; 76*724ba675SRob Herring reg = <0x7e104000 0x10>; 77*724ba675SRob Herring interrupts = <2 29>; 78*724ba675SRob Herring }; 79*724ba675SRob Herring 80*724ba675SRob Herring pixelvalve@7e206000 { 81*724ba675SRob Herring compatible = "brcm,bcm2835-pixelvalve0"; 82*724ba675SRob Herring reg = <0x7e206000 0x100>; 83*724ba675SRob Herring interrupts = <2 13>; /* pwa0 */ 84*724ba675SRob Herring }; 85*724ba675SRob Herring 86*724ba675SRob Herring pixelvalve@7e207000 { 87*724ba675SRob Herring compatible = "brcm,bcm2835-pixelvalve1"; 88*724ba675SRob Herring reg = <0x7e207000 0x100>; 89*724ba675SRob Herring interrupts = <2 14>; /* pwa1 */ 90*724ba675SRob Herring }; 91*724ba675SRob Herring 92*724ba675SRob Herring thermal: thermal@7e212000 { 93*724ba675SRob Herring compatible = "brcm,bcm2835-thermal"; 94*724ba675SRob Herring reg = <0x7e212000 0x8>; 95*724ba675SRob Herring clocks = <&clocks BCM2835_CLOCK_TSENS>; 96*724ba675SRob Herring #thermal-sensor-cells = <0>; 97*724ba675SRob Herring status = "disabled"; 98*724ba675SRob Herring }; 99*724ba675SRob Herring 100*724ba675SRob Herring i2c2: i2c@7e805000 { 101*724ba675SRob Herring compatible = "brcm,bcm2835-i2c"; 102*724ba675SRob Herring reg = <0x7e805000 0x1000>; 103*724ba675SRob Herring interrupts = <2 21>; 104*724ba675SRob Herring clocks = <&clocks BCM2835_CLOCK_VPU>; 105*724ba675SRob Herring #address-cells = <1>; 106*724ba675SRob Herring #size-cells = <0>; 107*724ba675SRob Herring status = "okay"; 108*724ba675SRob Herring }; 109*724ba675SRob Herring 110*724ba675SRob Herring vec: vec@7e806000 { 111*724ba675SRob Herring compatible = "brcm,bcm2835-vec"; 112*724ba675SRob Herring reg = <0x7e806000 0x1000>; 113*724ba675SRob Herring clocks = <&clocks BCM2835_CLOCK_VEC>; 114*724ba675SRob Herring interrupts = <2 27>; 115*724ba675SRob Herring status = "disabled"; 116*724ba675SRob Herring }; 117*724ba675SRob Herring 118*724ba675SRob Herring pixelvalve@7e807000 { 119*724ba675SRob Herring compatible = "brcm,bcm2835-pixelvalve2"; 120*724ba675SRob Herring reg = <0x7e807000 0x100>; 121*724ba675SRob Herring interrupts = <2 10>; /* pixelvalve */ 122*724ba675SRob Herring }; 123*724ba675SRob Herring 124*724ba675SRob Herring hdmi: hdmi@7e902000 { 125*724ba675SRob Herring compatible = "brcm,bcm2835-hdmi"; 126*724ba675SRob Herring reg = <0x7e902000 0x600>, 127*724ba675SRob Herring <0x7e808000 0x100>; 128*724ba675SRob Herring interrupts = <2 8>, <2 9>; 129*724ba675SRob Herring ddc = <&i2c2>; 130*724ba675SRob Herring clocks = <&clocks BCM2835_PLLH_PIX>, 131*724ba675SRob Herring <&clocks BCM2835_CLOCK_HSM>; 132*724ba675SRob Herring clock-names = "pixel", "hdmi"; 133*724ba675SRob Herring dmas = <&dma 17>; 134*724ba675SRob Herring dma-names = "audio-rx"; 135*724ba675SRob Herring status = "disabled"; 136*724ba675SRob Herring }; 137*724ba675SRob Herring 138*724ba675SRob Herring v3d: v3d@7ec00000 { 139*724ba675SRob Herring compatible = "brcm,bcm2835-v3d"; 140*724ba675SRob Herring reg = <0x7ec00000 0x1000>; 141*724ba675SRob Herring interrupts = <1 10>; 142*724ba675SRob Herring }; 143*724ba675SRob Herring 144*724ba675SRob Herring vc4: gpu { 145*724ba675SRob Herring compatible = "brcm,bcm2835-vc4"; 146*724ba675SRob Herring }; 147*724ba675SRob Herring }; 148*724ba675SRob Herring}; 149*724ba675SRob Herring 150*724ba675SRob Herring&cpu_thermal { 151*724ba675SRob Herring thermal-sensors = <&thermal>; 152*724ba675SRob Herring}; 153*724ba675SRob Herring 154*724ba675SRob Herring&gpio { 155*724ba675SRob Herring i2c_slave_gpio18: i2c-slave-gpio18 { 156*724ba675SRob Herring brcm,pins = <18 19 20 21>; 157*724ba675SRob Herring brcm,function = <BCM2835_FSEL_ALT3>; 158*724ba675SRob Herring }; 159*724ba675SRob Herring 160*724ba675SRob Herring jtag_gpio4: jtag-gpio4 { 161*724ba675SRob Herring brcm,pins = <4 5 6 12 13>; 162*724ba675SRob Herring brcm,function = <BCM2835_FSEL_ALT5>; 163*724ba675SRob Herring }; 164*724ba675SRob Herring 165*724ba675SRob Herring pwm0_gpio12: pwm0-gpio12 { 166*724ba675SRob Herring brcm,pins = <12>; 167*724ba675SRob Herring brcm,function = <BCM2835_FSEL_ALT0>; 168*724ba675SRob Herring }; 169*724ba675SRob Herring pwm0_gpio18: pwm0-gpio18 { 170*724ba675SRob Herring brcm,pins = <18>; 171*724ba675SRob Herring brcm,function = <BCM2835_FSEL_ALT5>; 172*724ba675SRob Herring }; 173*724ba675SRob Herring pwm0_gpio40: pwm0-gpio40 { 174*724ba675SRob Herring brcm,pins = <40>; 175*724ba675SRob Herring brcm,function = <BCM2835_FSEL_ALT0>; 176*724ba675SRob Herring }; 177*724ba675SRob Herring pwm1_gpio13: pwm1-gpio13 { 178*724ba675SRob Herring brcm,pins = <13>; 179*724ba675SRob Herring brcm,function = <BCM2835_FSEL_ALT0>; 180*724ba675SRob Herring }; 181*724ba675SRob Herring pwm1_gpio19: pwm1-gpio19 { 182*724ba675SRob Herring brcm,pins = <19>; 183*724ba675SRob Herring brcm,function = <BCM2835_FSEL_ALT5>; 184*724ba675SRob Herring }; 185*724ba675SRob Herring pwm1_gpio41: pwm1-gpio41 { 186*724ba675SRob Herring brcm,pins = <41>; 187*724ba675SRob Herring brcm,function = <BCM2835_FSEL_ALT0>; 188*724ba675SRob Herring }; 189*724ba675SRob Herring pwm1_gpio45: pwm1-gpio45 { 190*724ba675SRob Herring brcm,pins = <45>; 191*724ba675SRob Herring brcm,function = <BCM2835_FSEL_ALT0>; 192*724ba675SRob Herring }; 193*724ba675SRob Herring}; 194*724ba675SRob Herring 195*724ba675SRob Herring&i2s { 196*724ba675SRob Herring dmas = <&dma 2>, <&dma 3>; 197*724ba675SRob Herring dma-names = "tx", "rx"; 198*724ba675SRob Herring}; 199*724ba675SRob Herring 200*724ba675SRob Herring&sdhost { 201*724ba675SRob Herring dmas = <&dma 13>; 202*724ba675SRob Herring dma-names = "rx-tx"; 203*724ba675SRob Herring}; 204*724ba675SRob Herring 205*724ba675SRob Herring&spi { 206*724ba675SRob Herring dmas = <&dma 6>, <&dma 7>; 207*724ba675SRob Herring dma-names = "tx", "rx"; 208*724ba675SRob Herring}; 209