1724ba675SRob Herring// SPDX-License-Identifier: GPL-2.0 2724ba675SRob Herring#include "bcm283x.dtsi" 3724ba675SRob Herring 4724ba675SRob Herring#include <dt-bindings/interrupt-controller/arm-gic.h> 5724ba675SRob Herring#include <dt-bindings/soc/bcm2835-pm.h> 6724ba675SRob Herring 7724ba675SRob Herring/ { 8724ba675SRob Herring compatible = "brcm,bcm2711"; 9724ba675SRob Herring 10724ba675SRob Herring #address-cells = <2>; 11724ba675SRob Herring #size-cells = <1>; 12724ba675SRob Herring 13724ba675SRob Herring interrupt-parent = <&gicv2>; 14724ba675SRob Herring 15724ba675SRob Herring vc4: gpu { 16724ba675SRob Herring compatible = "brcm,bcm2711-vc5"; 17724ba675SRob Herring status = "disabled"; 18724ba675SRob Herring }; 19724ba675SRob Herring 20724ba675SRob Herring clk_27MHz: clk-27M { 21724ba675SRob Herring #clock-cells = <0>; 22724ba675SRob Herring compatible = "fixed-clock"; 23724ba675SRob Herring clock-frequency = <27000000>; 24724ba675SRob Herring clock-output-names = "27MHz-clock"; 25724ba675SRob Herring }; 26724ba675SRob Herring 27724ba675SRob Herring clk_108MHz: clk-108M { 28724ba675SRob Herring #clock-cells = <0>; 29724ba675SRob Herring compatible = "fixed-clock"; 30724ba675SRob Herring clock-frequency = <108000000>; 31724ba675SRob Herring clock-output-names = "108MHz-clock"; 32724ba675SRob Herring }; 33724ba675SRob Herring 34724ba675SRob Herring soc { 35724ba675SRob Herring /* 36724ba675SRob Herring * Defined ranges: 37724ba675SRob Herring * Common BCM283x peripherals 38724ba675SRob Herring * BCM2711-specific peripherals 39724ba675SRob Herring * ARM-local peripherals 40724ba675SRob Herring */ 41724ba675SRob Herring ranges = <0x7e000000 0x0 0xfe000000 0x01800000>, 42724ba675SRob Herring <0x7c000000 0x0 0xfc000000 0x02000000>, 43724ba675SRob Herring <0x40000000 0x0 0xff800000 0x00800000>; 44724ba675SRob Herring /* Emulate a contiguous 30-bit address range for DMA */ 45724ba675SRob Herring dma-ranges = <0xc0000000 0x0 0x00000000 0x40000000>; 46724ba675SRob Herring 47724ba675SRob Herring /* 48724ba675SRob Herring * This node is the provider for the enable-method for 49724ba675SRob Herring * bringing up secondary cores. 50724ba675SRob Herring */ 51724ba675SRob Herring local_intc: interrupt-controller@40000000 { 52724ba675SRob Herring compatible = "brcm,bcm2836-l1-intc"; 53724ba675SRob Herring reg = <0x40000000 0x100>; 54724ba675SRob Herring }; 55724ba675SRob Herring 56724ba675SRob Herring gicv2: interrupt-controller@40041000 { 57724ba675SRob Herring interrupt-controller; 58724ba675SRob Herring #interrupt-cells = <3>; 59724ba675SRob Herring compatible = "arm,gic-400"; 60724ba675SRob Herring reg = <0x40041000 0x1000>, 61724ba675SRob Herring <0x40042000 0x2000>, 62724ba675SRob Herring <0x40044000 0x2000>, 63724ba675SRob Herring <0x40046000 0x2000>; 64724ba675SRob Herring interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(4) | 65724ba675SRob Herring IRQ_TYPE_LEVEL_HIGH)>; 66724ba675SRob Herring }; 67724ba675SRob Herring 68724ba675SRob Herring avs_monitor: avs-monitor@7d5d2000 { 69724ba675SRob Herring compatible = "brcm,bcm2711-avs-monitor", 70724ba675SRob Herring "syscon", "simple-mfd"; 71724ba675SRob Herring reg = <0x7d5d2000 0xf00>; 72724ba675SRob Herring 73724ba675SRob Herring thermal: thermal { 74724ba675SRob Herring compatible = "brcm,bcm2711-thermal"; 75724ba675SRob Herring #thermal-sensor-cells = <0>; 76724ba675SRob Herring }; 77724ba675SRob Herring }; 78724ba675SRob Herring 793450f9f5SStefan Wahren dma: dma-controller@7e007000 { 80724ba675SRob Herring compatible = "brcm,bcm2835-dma"; 81724ba675SRob Herring reg = <0x7e007000 0xb00>; 82724ba675SRob Herring interrupts = <GIC_SPI 80 IRQ_TYPE_LEVEL_HIGH>, 83724ba675SRob Herring <GIC_SPI 81 IRQ_TYPE_LEVEL_HIGH>, 84724ba675SRob Herring <GIC_SPI 82 IRQ_TYPE_LEVEL_HIGH>, 85724ba675SRob Herring <GIC_SPI 83 IRQ_TYPE_LEVEL_HIGH>, 86724ba675SRob Herring <GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>, 87724ba675SRob Herring <GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>, 88724ba675SRob Herring <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>, 89724ba675SRob Herring /* DMA lite 7 - 10 */ 90724ba675SRob Herring <GIC_SPI 87 IRQ_TYPE_LEVEL_HIGH>, 91724ba675SRob Herring <GIC_SPI 87 IRQ_TYPE_LEVEL_HIGH>, 92724ba675SRob Herring <GIC_SPI 88 IRQ_TYPE_LEVEL_HIGH>, 93724ba675SRob Herring <GIC_SPI 88 IRQ_TYPE_LEVEL_HIGH>; 94724ba675SRob Herring interrupt-names = "dma0", 95724ba675SRob Herring "dma1", 96724ba675SRob Herring "dma2", 97724ba675SRob Herring "dma3", 98724ba675SRob Herring "dma4", 99724ba675SRob Herring "dma5", 100724ba675SRob Herring "dma6", 101724ba675SRob Herring "dma7", 102724ba675SRob Herring "dma8", 103724ba675SRob Herring "dma9", 104724ba675SRob Herring "dma10"; 105724ba675SRob Herring #dma-cells = <1>; 106724ba675SRob Herring brcm,dma-channel-mask = <0x07f5>; 107724ba675SRob Herring }; 108724ba675SRob Herring 109724ba675SRob Herring pm: watchdog@7e100000 { 110724ba675SRob Herring compatible = "brcm,bcm2711-pm", "brcm,bcm2835-pm-wdt"; 111724ba675SRob Herring #power-domain-cells = <1>; 112724ba675SRob Herring #reset-cells = <1>; 113724ba675SRob Herring reg = <0x7e100000 0x114>, 114724ba675SRob Herring <0x7e00a000 0x24>, 115724ba675SRob Herring <0x7ec11000 0x20>; 116724ba675SRob Herring reg-names = "pm", "asb", "rpivid_asb"; 117724ba675SRob Herring clocks = <&clocks BCM2835_CLOCK_V3D>, 118724ba675SRob Herring <&clocks BCM2835_CLOCK_PERI_IMAGE>, 119724ba675SRob Herring <&clocks BCM2835_CLOCK_H264>, 120724ba675SRob Herring <&clocks BCM2835_CLOCK_ISP>; 121724ba675SRob Herring clock-names = "v3d", "peri_image", "h264", "isp"; 122724ba675SRob Herring system-power-controller; 123724ba675SRob Herring }; 124724ba675SRob Herring 125724ba675SRob Herring rng@7e104000 { 126724ba675SRob Herring compatible = "brcm,bcm2711-rng200"; 127724ba675SRob Herring reg = <0x7e104000 0x28>; 128724ba675SRob Herring }; 129724ba675SRob Herring 130724ba675SRob Herring uart2: serial@7e201400 { 131724ba675SRob Herring compatible = "arm,pl011", "arm,primecell"; 132724ba675SRob Herring reg = <0x7e201400 0x200>; 133724ba675SRob Herring interrupts = <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>; 134724ba675SRob Herring clocks = <&clocks BCM2835_CLOCK_UART>, 135724ba675SRob Herring <&clocks BCM2835_CLOCK_VPU>; 136724ba675SRob Herring clock-names = "uartclk", "apb_pclk"; 137724ba675SRob Herring arm,primecell-periphid = <0x00241011>; 138724ba675SRob Herring status = "disabled"; 139724ba675SRob Herring }; 140724ba675SRob Herring 141724ba675SRob Herring uart3: serial@7e201600 { 142724ba675SRob Herring compatible = "arm,pl011", "arm,primecell"; 143724ba675SRob Herring reg = <0x7e201600 0x200>; 144724ba675SRob Herring interrupts = <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>; 145724ba675SRob Herring clocks = <&clocks BCM2835_CLOCK_UART>, 146724ba675SRob Herring <&clocks BCM2835_CLOCK_VPU>; 147724ba675SRob Herring clock-names = "uartclk", "apb_pclk"; 148724ba675SRob Herring arm,primecell-periphid = <0x00241011>; 149724ba675SRob Herring status = "disabled"; 150724ba675SRob Herring }; 151724ba675SRob Herring 152724ba675SRob Herring uart4: serial@7e201800 { 153724ba675SRob Herring compatible = "arm,pl011", "arm,primecell"; 154724ba675SRob Herring reg = <0x7e201800 0x200>; 155724ba675SRob Herring interrupts = <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>; 156724ba675SRob Herring clocks = <&clocks BCM2835_CLOCK_UART>, 157724ba675SRob Herring <&clocks BCM2835_CLOCK_VPU>; 158724ba675SRob Herring clock-names = "uartclk", "apb_pclk"; 159724ba675SRob Herring arm,primecell-periphid = <0x00241011>; 160724ba675SRob Herring status = "disabled"; 161724ba675SRob Herring }; 162724ba675SRob Herring 163724ba675SRob Herring uart5: serial@7e201a00 { 164724ba675SRob Herring compatible = "arm,pl011", "arm,primecell"; 165724ba675SRob Herring reg = <0x7e201a00 0x200>; 166724ba675SRob Herring interrupts = <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>; 167724ba675SRob Herring clocks = <&clocks BCM2835_CLOCK_UART>, 168724ba675SRob Herring <&clocks BCM2835_CLOCK_VPU>; 169724ba675SRob Herring clock-names = "uartclk", "apb_pclk"; 170724ba675SRob Herring arm,primecell-periphid = <0x00241011>; 171724ba675SRob Herring status = "disabled"; 172724ba675SRob Herring }; 173724ba675SRob Herring 174724ba675SRob Herring spi3: spi@7e204600 { 175724ba675SRob Herring compatible = "brcm,bcm2835-spi"; 176724ba675SRob Herring reg = <0x7e204600 0x0200>; 177724ba675SRob Herring interrupts = <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>; 178724ba675SRob Herring clocks = <&clocks BCM2835_CLOCK_VPU>; 179724ba675SRob Herring #address-cells = <1>; 180724ba675SRob Herring #size-cells = <0>; 181724ba675SRob Herring status = "disabled"; 182724ba675SRob Herring }; 183724ba675SRob Herring 184724ba675SRob Herring spi4: spi@7e204800 { 185724ba675SRob Herring compatible = "brcm,bcm2835-spi"; 186724ba675SRob Herring reg = <0x7e204800 0x0200>; 187724ba675SRob Herring interrupts = <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>; 188724ba675SRob Herring clocks = <&clocks BCM2835_CLOCK_VPU>; 189724ba675SRob Herring #address-cells = <1>; 190724ba675SRob Herring #size-cells = <0>; 191724ba675SRob Herring status = "disabled"; 192724ba675SRob Herring }; 193724ba675SRob Herring 194724ba675SRob Herring spi5: spi@7e204a00 { 195724ba675SRob Herring compatible = "brcm,bcm2835-spi"; 196724ba675SRob Herring reg = <0x7e204a00 0x0200>; 197724ba675SRob Herring interrupts = <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>; 198724ba675SRob Herring clocks = <&clocks BCM2835_CLOCK_VPU>; 199724ba675SRob Herring #address-cells = <1>; 200724ba675SRob Herring #size-cells = <0>; 201724ba675SRob Herring status = "disabled"; 202724ba675SRob Herring }; 203724ba675SRob Herring 204724ba675SRob Herring spi6: spi@7e204c00 { 205724ba675SRob Herring compatible = "brcm,bcm2835-spi"; 206724ba675SRob Herring reg = <0x7e204c00 0x0200>; 207724ba675SRob Herring interrupts = <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>; 208724ba675SRob Herring clocks = <&clocks BCM2835_CLOCK_VPU>; 209724ba675SRob Herring #address-cells = <1>; 210724ba675SRob Herring #size-cells = <0>; 211724ba675SRob Herring status = "disabled"; 212724ba675SRob Herring }; 213724ba675SRob Herring 214724ba675SRob Herring i2c3: i2c@7e205600 { 215724ba675SRob Herring compatible = "brcm,bcm2711-i2c", "brcm,bcm2835-i2c"; 216724ba675SRob Herring reg = <0x7e205600 0x200>; 217724ba675SRob Herring interrupts = <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>; 218724ba675SRob Herring clocks = <&clocks BCM2835_CLOCK_VPU>; 219724ba675SRob Herring #address-cells = <1>; 220724ba675SRob Herring #size-cells = <0>; 221724ba675SRob Herring status = "disabled"; 222724ba675SRob Herring }; 223724ba675SRob Herring 224724ba675SRob Herring i2c4: i2c@7e205800 { 225724ba675SRob Herring compatible = "brcm,bcm2711-i2c", "brcm,bcm2835-i2c"; 226724ba675SRob Herring reg = <0x7e205800 0x200>; 227724ba675SRob Herring interrupts = <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>; 228724ba675SRob Herring clocks = <&clocks BCM2835_CLOCK_VPU>; 229724ba675SRob Herring #address-cells = <1>; 230724ba675SRob Herring #size-cells = <0>; 231724ba675SRob Herring status = "disabled"; 232724ba675SRob Herring }; 233724ba675SRob Herring 234724ba675SRob Herring i2c5: i2c@7e205a00 { 235724ba675SRob Herring compatible = "brcm,bcm2711-i2c", "brcm,bcm2835-i2c"; 236724ba675SRob Herring reg = <0x7e205a00 0x200>; 237724ba675SRob Herring interrupts = <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>; 238724ba675SRob Herring clocks = <&clocks BCM2835_CLOCK_VPU>; 239724ba675SRob Herring #address-cells = <1>; 240724ba675SRob Herring #size-cells = <0>; 241724ba675SRob Herring status = "disabled"; 242724ba675SRob Herring }; 243724ba675SRob Herring 244724ba675SRob Herring i2c6: i2c@7e205c00 { 245724ba675SRob Herring compatible = "brcm,bcm2711-i2c", "brcm,bcm2835-i2c"; 246724ba675SRob Herring reg = <0x7e205c00 0x200>; 247724ba675SRob Herring interrupts = <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>; 248724ba675SRob Herring clocks = <&clocks BCM2835_CLOCK_VPU>; 249724ba675SRob Herring #address-cells = <1>; 250724ba675SRob Herring #size-cells = <0>; 251724ba675SRob Herring status = "disabled"; 252724ba675SRob Herring }; 253724ba675SRob Herring 254724ba675SRob Herring pixelvalve0: pixelvalve@7e206000 { 255724ba675SRob Herring compatible = "brcm,bcm2711-pixelvalve0"; 256724ba675SRob Herring reg = <0x7e206000 0x100>; 257724ba675SRob Herring interrupts = <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>; 258724ba675SRob Herring status = "disabled"; 259724ba675SRob Herring }; 260724ba675SRob Herring 261724ba675SRob Herring pixelvalve1: pixelvalve@7e207000 { 262724ba675SRob Herring compatible = "brcm,bcm2711-pixelvalve1"; 263724ba675SRob Herring reg = <0x7e207000 0x100>; 264724ba675SRob Herring interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>; 265724ba675SRob Herring status = "disabled"; 266724ba675SRob Herring }; 267724ba675SRob Herring 268724ba675SRob Herring pixelvalve2: pixelvalve@7e20a000 { 269724ba675SRob Herring compatible = "brcm,bcm2711-pixelvalve2"; 270724ba675SRob Herring reg = <0x7e20a000 0x100>; 271724ba675SRob Herring interrupts = <GIC_SPI 101 IRQ_TYPE_LEVEL_HIGH>; 272724ba675SRob Herring status = "disabled"; 273724ba675SRob Herring }; 274724ba675SRob Herring 275724ba675SRob Herring pwm1: pwm@7e20c800 { 276724ba675SRob Herring compatible = "brcm,bcm2835-pwm"; 277724ba675SRob Herring reg = <0x7e20c800 0x28>; 278724ba675SRob Herring clocks = <&clocks BCM2835_CLOCK_PWM>; 279724ba675SRob Herring assigned-clocks = <&clocks BCM2835_CLOCK_PWM>; 280724ba675SRob Herring assigned-clock-rates = <10000000>; 281*81b87589SStefan Wahren #pwm-cells = <3>; 282724ba675SRob Herring status = "disabled"; 283724ba675SRob Herring }; 284724ba675SRob Herring 285724ba675SRob Herring pixelvalve4: pixelvalve@7e216000 { 286724ba675SRob Herring compatible = "brcm,bcm2711-pixelvalve4"; 287724ba675SRob Herring reg = <0x7e216000 0x100>; 288724ba675SRob Herring interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>; 289724ba675SRob Herring status = "disabled"; 290724ba675SRob Herring }; 291724ba675SRob Herring 292724ba675SRob Herring hvs: hvs@7e400000 { 293724ba675SRob Herring compatible = "brcm,bcm2711-hvs"; 294724ba675SRob Herring reg = <0x7e400000 0x8000>; 295724ba675SRob Herring interrupts = <GIC_SPI 97 IRQ_TYPE_LEVEL_HIGH>; 296724ba675SRob Herring }; 297724ba675SRob Herring 298724ba675SRob Herring pixelvalve3: pixelvalve@7ec12000 { 299724ba675SRob Herring compatible = "brcm,bcm2711-pixelvalve3"; 300724ba675SRob Herring reg = <0x7ec12000 0x100>; 301724ba675SRob Herring interrupts = <GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH>; 302724ba675SRob Herring status = "disabled"; 303724ba675SRob Herring }; 304724ba675SRob Herring 305724ba675SRob Herring vec: vec@7ec13000 { 306724ba675SRob Herring compatible = "brcm,bcm2711-vec"; 307724ba675SRob Herring reg = <0x7ec13000 0x1000>; 308724ba675SRob Herring clocks = <&clocks BCM2835_CLOCK_VEC>; 309724ba675SRob Herring interrupts = <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>; 310724ba675SRob Herring status = "disabled"; 311724ba675SRob Herring }; 312724ba675SRob Herring 313724ba675SRob Herring dvp: clock@7ef00000 { 314724ba675SRob Herring compatible = "brcm,brcm2711-dvp"; 315724ba675SRob Herring reg = <0x7ef00000 0x10>; 316724ba675SRob Herring clocks = <&clk_108MHz>; 317724ba675SRob Herring #clock-cells = <1>; 318724ba675SRob Herring #reset-cells = <1>; 319724ba675SRob Herring }; 320724ba675SRob Herring 321724ba675SRob Herring aon_intr: interrupt-controller@7ef00100 { 322724ba675SRob Herring compatible = "brcm,bcm2711-l2-intc", "brcm,l2-intc"; 323724ba675SRob Herring reg = <0x7ef00100 0x30>; 324724ba675SRob Herring interrupts = <GIC_SPI 96 IRQ_TYPE_LEVEL_HIGH>; 325724ba675SRob Herring interrupt-controller; 326724ba675SRob Herring #interrupt-cells = <1>; 327724ba675SRob Herring }; 328724ba675SRob Herring 329724ba675SRob Herring hdmi0: hdmi@7ef00700 { 330724ba675SRob Herring compatible = "brcm,bcm2711-hdmi0"; 331724ba675SRob Herring reg = <0x7ef00700 0x300>, 332724ba675SRob Herring <0x7ef00300 0x200>, 333724ba675SRob Herring <0x7ef00f00 0x80>, 334724ba675SRob Herring <0x7ef00f80 0x80>, 335724ba675SRob Herring <0x7ef01b00 0x200>, 336724ba675SRob Herring <0x7ef01f00 0x400>, 337724ba675SRob Herring <0x7ef00200 0x80>, 338724ba675SRob Herring <0x7ef04300 0x100>, 339724ba675SRob Herring <0x7ef20000 0x100>; 340724ba675SRob Herring reg-names = "hdmi", 341724ba675SRob Herring "dvp", 342724ba675SRob Herring "phy", 343724ba675SRob Herring "rm", 344724ba675SRob Herring "packet", 345724ba675SRob Herring "metadata", 346724ba675SRob Herring "csc", 347724ba675SRob Herring "cec", 348724ba675SRob Herring "hd"; 349724ba675SRob Herring clock-names = "hdmi", "bvb", "audio", "cec"; 350724ba675SRob Herring resets = <&dvp 0>; 351724ba675SRob Herring interrupt-parent = <&aon_intr>; 352724ba675SRob Herring interrupts = <0>, <1>, <2>, 353724ba675SRob Herring <3>, <4>, <5>; 354724ba675SRob Herring interrupt-names = "cec-tx", "cec-rx", "cec-low", 355724ba675SRob Herring "wakeup", "hpd-connected", "hpd-removed"; 356724ba675SRob Herring ddc = <&ddc0>; 357724ba675SRob Herring dmas = <&dma 10>; 358724ba675SRob Herring dma-names = "audio-rx"; 359724ba675SRob Herring status = "disabled"; 360724ba675SRob Herring }; 361724ba675SRob Herring 362724ba675SRob Herring ddc0: i2c@7ef04500 { 363724ba675SRob Herring compatible = "brcm,bcm2711-hdmi-i2c"; 364724ba675SRob Herring reg = <0x7ef04500 0x100>, <0x7ef00b00 0x300>; 365724ba675SRob Herring reg-names = "bsc", "auto-i2c"; 366724ba675SRob Herring clock-frequency = <97500>; 367724ba675SRob Herring status = "disabled"; 368724ba675SRob Herring }; 369724ba675SRob Herring 370724ba675SRob Herring hdmi1: hdmi@7ef05700 { 371724ba675SRob Herring compatible = "brcm,bcm2711-hdmi1"; 372724ba675SRob Herring reg = <0x7ef05700 0x300>, 373724ba675SRob Herring <0x7ef05300 0x200>, 374724ba675SRob Herring <0x7ef05f00 0x80>, 375724ba675SRob Herring <0x7ef05f80 0x80>, 376724ba675SRob Herring <0x7ef06b00 0x200>, 377724ba675SRob Herring <0x7ef06f00 0x400>, 378724ba675SRob Herring <0x7ef00280 0x80>, 379724ba675SRob Herring <0x7ef09300 0x100>, 380724ba675SRob Herring <0x7ef20000 0x100>; 381724ba675SRob Herring reg-names = "hdmi", 382724ba675SRob Herring "dvp", 383724ba675SRob Herring "phy", 384724ba675SRob Herring "rm", 385724ba675SRob Herring "packet", 386724ba675SRob Herring "metadata", 387724ba675SRob Herring "csc", 388724ba675SRob Herring "cec", 389724ba675SRob Herring "hd"; 390724ba675SRob Herring ddc = <&ddc1>; 391724ba675SRob Herring clock-names = "hdmi", "bvb", "audio", "cec"; 392724ba675SRob Herring resets = <&dvp 1>; 393724ba675SRob Herring interrupt-parent = <&aon_intr>; 394724ba675SRob Herring interrupts = <8>, <7>, <6>, 395724ba675SRob Herring <9>, <10>, <11>; 396724ba675SRob Herring interrupt-names = "cec-tx", "cec-rx", "cec-low", 397724ba675SRob Herring "wakeup", "hpd-connected", "hpd-removed"; 398724ba675SRob Herring dmas = <&dma 17>; 399724ba675SRob Herring dma-names = "audio-rx"; 400724ba675SRob Herring status = "disabled"; 401724ba675SRob Herring }; 402724ba675SRob Herring 403724ba675SRob Herring ddc1: i2c@7ef09500 { 404724ba675SRob Herring compatible = "brcm,bcm2711-hdmi-i2c"; 405724ba675SRob Herring reg = <0x7ef09500 0x100>, <0x7ef05b00 0x300>; 406724ba675SRob Herring reg-names = "bsc", "auto-i2c"; 407724ba675SRob Herring clock-frequency = <97500>; 408724ba675SRob Herring status = "disabled"; 409724ba675SRob Herring }; 410724ba675SRob Herring }; 411724ba675SRob Herring 412724ba675SRob Herring /* 413724ba675SRob Herring * emmc2 has different DMA constraints based on SoC revisions. It was 414724ba675SRob Herring * moved into its own bus, so as for RPi4's firmware to update them. 415724ba675SRob Herring * The firmware will find whether the emmc2bus alias is defined, and if 416724ba675SRob Herring * so, it'll edit the dma-ranges property below accordingly. 417724ba675SRob Herring */ 418724ba675SRob Herring emmc2bus: emmc2bus { 419724ba675SRob Herring compatible = "simple-bus"; 420724ba675SRob Herring #address-cells = <2>; 421724ba675SRob Herring #size-cells = <1>; 422724ba675SRob Herring 423724ba675SRob Herring ranges = <0x0 0x7e000000 0x0 0xfe000000 0x01800000>; 424724ba675SRob Herring dma-ranges = <0x0 0xc0000000 0x0 0x00000000 0x40000000>; 425724ba675SRob Herring 426724ba675SRob Herring emmc2: mmc@7e340000 { 427724ba675SRob Herring compatible = "brcm,bcm2711-emmc2"; 428724ba675SRob Herring reg = <0x0 0x7e340000 0x100>; 429724ba675SRob Herring interrupts = <GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>; 430724ba675SRob Herring clocks = <&clocks BCM2711_CLOCK_EMMC2>; 431724ba675SRob Herring status = "disabled"; 432724ba675SRob Herring }; 433724ba675SRob Herring }; 434724ba675SRob Herring 435724ba675SRob Herring arm-pmu { 436724ba675SRob Herring compatible = "arm,cortex-a72-pmu", "arm,armv8-pmuv3"; 437724ba675SRob Herring interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>, 438724ba675SRob Herring <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>, 439724ba675SRob Herring <GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH>, 440724ba675SRob Herring <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>; 441724ba675SRob Herring interrupt-affinity = <&cpu0>, <&cpu1>, <&cpu2>, <&cpu3>; 442724ba675SRob Herring }; 443724ba675SRob Herring 444724ba675SRob Herring timer { 445724ba675SRob Herring compatible = "arm,armv8-timer"; 446724ba675SRob Herring interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(4) | 447724ba675SRob Herring IRQ_TYPE_LEVEL_LOW)>, 448724ba675SRob Herring <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(4) | 449724ba675SRob Herring IRQ_TYPE_LEVEL_LOW)>, 450724ba675SRob Herring <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(4) | 451724ba675SRob Herring IRQ_TYPE_LEVEL_LOW)>, 452724ba675SRob Herring <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(4) | 453724ba675SRob Herring IRQ_TYPE_LEVEL_LOW)>; 454724ba675SRob Herring /* This only applies to the ARMv7 stub */ 455724ba675SRob Herring arm,cpu-registers-not-fw-configured; 456724ba675SRob Herring }; 457724ba675SRob Herring 458724ba675SRob Herring cpus: cpus { 459724ba675SRob Herring #address-cells = <1>; 460724ba675SRob Herring #size-cells = <0>; 461724ba675SRob Herring enable-method = "brcm,bcm2836-smp"; // for ARM 32-bit 462724ba675SRob Herring 463724ba675SRob Herring /* Source for d/i-cache-line-size and d/i-cache-sets 464724ba675SRob Herring * https://developer.arm.com/documentation/100095/0003 465724ba675SRob Herring * /Level-1-Memory-System/About-the-L1-memory-system?lang=en 466724ba675SRob Herring * Source for d/i-cache-size 467724ba675SRob Herring * https://www.raspberrypi.com/documentation/computers 468724ba675SRob Herring * /processors.html#bcm2711 469724ba675SRob Herring */ 470724ba675SRob Herring cpu0: cpu@0 { 471724ba675SRob Herring device_type = "cpu"; 472724ba675SRob Herring compatible = "arm,cortex-a72"; 473724ba675SRob Herring reg = <0>; 474724ba675SRob Herring enable-method = "spin-table"; 475724ba675SRob Herring cpu-release-addr = <0x0 0x000000d8>; 476724ba675SRob Herring d-cache-size = <0x8000>; 477724ba675SRob Herring d-cache-line-size = <64>; 478724ba675SRob Herring d-cache-sets = <256>; // 32KiB(size)/64(line-size)=512ways/2-way set 479724ba675SRob Herring i-cache-size = <0xc000>; 480724ba675SRob Herring i-cache-line-size = <64>; 481724ba675SRob Herring i-cache-sets = <256>; // 48KiB(size)/64(line-size)=768ways/3-way set 482724ba675SRob Herring next-level-cache = <&l2>; 483724ba675SRob Herring }; 484724ba675SRob Herring 485724ba675SRob Herring cpu1: cpu@1 { 486724ba675SRob Herring device_type = "cpu"; 487724ba675SRob Herring compatible = "arm,cortex-a72"; 488724ba675SRob Herring reg = <1>; 489724ba675SRob Herring enable-method = "spin-table"; 490724ba675SRob Herring cpu-release-addr = <0x0 0x000000e0>; 491724ba675SRob Herring d-cache-size = <0x8000>; 492724ba675SRob Herring d-cache-line-size = <64>; 493724ba675SRob Herring d-cache-sets = <256>; // 32KiB(size)/64(line-size)=512ways/2-way set 494724ba675SRob Herring i-cache-size = <0xc000>; 495724ba675SRob Herring i-cache-line-size = <64>; 496724ba675SRob Herring i-cache-sets = <256>; // 48KiB(size)/64(line-size)=768ways/3-way set 497724ba675SRob Herring next-level-cache = <&l2>; 498724ba675SRob Herring }; 499724ba675SRob Herring 500724ba675SRob Herring cpu2: cpu@2 { 501724ba675SRob Herring device_type = "cpu"; 502724ba675SRob Herring compatible = "arm,cortex-a72"; 503724ba675SRob Herring reg = <2>; 504724ba675SRob Herring enable-method = "spin-table"; 505724ba675SRob Herring cpu-release-addr = <0x0 0x000000e8>; 506724ba675SRob Herring d-cache-size = <0x8000>; 507724ba675SRob Herring d-cache-line-size = <64>; 508724ba675SRob Herring d-cache-sets = <256>; // 32KiB(size)/64(line-size)=512ways/2-way set 509724ba675SRob Herring i-cache-size = <0xc000>; 510724ba675SRob Herring i-cache-line-size = <64>; 511724ba675SRob Herring i-cache-sets = <256>; // 48KiB(size)/64(line-size)=768ways/3-way set 512724ba675SRob Herring next-level-cache = <&l2>; 513724ba675SRob Herring }; 514724ba675SRob Herring 515724ba675SRob Herring cpu3: cpu@3 { 516724ba675SRob Herring device_type = "cpu"; 517724ba675SRob Herring compatible = "arm,cortex-a72"; 518724ba675SRob Herring reg = <3>; 519724ba675SRob Herring enable-method = "spin-table"; 520724ba675SRob Herring cpu-release-addr = <0x0 0x000000f0>; 521724ba675SRob Herring d-cache-size = <0x8000>; 522724ba675SRob Herring d-cache-line-size = <64>; 523724ba675SRob Herring d-cache-sets = <256>; // 32KiB(size)/64(line-size)=512ways/2-way set 524724ba675SRob Herring i-cache-size = <0xc000>; 525724ba675SRob Herring i-cache-line-size = <64>; 526724ba675SRob Herring i-cache-sets = <256>; // 48KiB(size)/64(line-size)=768ways/3-way set 527724ba675SRob Herring next-level-cache = <&l2>; 528724ba675SRob Herring }; 529724ba675SRob Herring 530724ba675SRob Herring /* Source for d/i-cache-line-size and d/i-cache-sets 531724ba675SRob Herring * https://developer.arm.com/documentation/100095/0003 532724ba675SRob Herring * /Level-2-Memory-System/About-the-L2-memory-system?lang=en 533724ba675SRob Herring * Source for d/i-cache-size 534724ba675SRob Herring * https://www.raspberrypi.com/documentation/computers 535724ba675SRob Herring * /processors.html#bcm2711 536724ba675SRob Herring */ 537724ba675SRob Herring l2: l2-cache0 { 538724ba675SRob Herring compatible = "cache"; 539724ba675SRob Herring cache-unified; 540724ba675SRob Herring cache-size = <0x100000>; 541724ba675SRob Herring cache-line-size = <64>; 542724ba675SRob Herring cache-sets = <1024>; // 1MiB(size)/64(line-size)=16384ways/16-way set 543724ba675SRob Herring cache-level = <2>; 544724ba675SRob Herring }; 545724ba675SRob Herring }; 546724ba675SRob Herring 547724ba675SRob Herring scb { 548724ba675SRob Herring compatible = "simple-bus"; 549724ba675SRob Herring #address-cells = <2>; 550724ba675SRob Herring #size-cells = <1>; 551724ba675SRob Herring 552724ba675SRob Herring ranges = <0x0 0x7c000000 0x0 0xfc000000 0x03800000>, 553724ba675SRob Herring <0x6 0x00000000 0x6 0x00000000 0x40000000>; 554724ba675SRob Herring 555724ba675SRob Herring pcie0: pcie@7d500000 { 556724ba675SRob Herring compatible = "brcm,bcm2711-pcie"; 557724ba675SRob Herring reg = <0x0 0x7d500000 0x9310>; 558724ba675SRob Herring device_type = "pci"; 559724ba675SRob Herring #address-cells = <3>; 560724ba675SRob Herring #interrupt-cells = <1>; 561724ba675SRob Herring #size-cells = <2>; 562724ba675SRob Herring interrupts = <GIC_SPI 147 IRQ_TYPE_LEVEL_HIGH>, 563724ba675SRob Herring <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>; 564724ba675SRob Herring interrupt-names = "pcie", "msi"; 565724ba675SRob Herring interrupt-map-mask = <0x0 0x0 0x0 0x7>; 566724ba675SRob Herring interrupt-map = <0 0 0 1 &gicv2 GIC_SPI 143 567724ba675SRob Herring IRQ_TYPE_LEVEL_HIGH>, 568724ba675SRob Herring <0 0 0 2 &gicv2 GIC_SPI 144 569724ba675SRob Herring IRQ_TYPE_LEVEL_HIGH>, 570724ba675SRob Herring <0 0 0 3 &gicv2 GIC_SPI 145 571724ba675SRob Herring IRQ_TYPE_LEVEL_HIGH>, 572724ba675SRob Herring <0 0 0 4 &gicv2 GIC_SPI 146 573724ba675SRob Herring IRQ_TYPE_LEVEL_HIGH>; 574724ba675SRob Herring msi-controller; 575724ba675SRob Herring msi-parent = <&pcie0>; 576724ba675SRob Herring 577724ba675SRob Herring ranges = <0x02000000 0x0 0xf8000000 0x6 0x00000000 578724ba675SRob Herring 0x0 0x04000000>; 579724ba675SRob Herring /* 580724ba675SRob Herring * The wrapper around the PCIe block has a bug 581724ba675SRob Herring * preventing it from accessing beyond the first 3GB of 582724ba675SRob Herring * memory. 583724ba675SRob Herring */ 584724ba675SRob Herring dma-ranges = <0x02000000 0x0 0x00000000 0x0 0x00000000 585724ba675SRob Herring 0x0 0xc0000000>; 586724ba675SRob Herring brcm,enable-ssc; 587724ba675SRob Herring }; 588724ba675SRob Herring 589724ba675SRob Herring genet: ethernet@7d580000 { 590724ba675SRob Herring compatible = "brcm,bcm2711-genet-v5"; 591724ba675SRob Herring reg = <0x0 0x7d580000 0x10000>; 592724ba675SRob Herring #address-cells = <0x1>; 593724ba675SRob Herring #size-cells = <0x1>; 594724ba675SRob Herring interrupts = <GIC_SPI 157 IRQ_TYPE_LEVEL_HIGH>, 595724ba675SRob Herring <GIC_SPI 158 IRQ_TYPE_LEVEL_HIGH>; 596724ba675SRob Herring status = "disabled"; 597724ba675SRob Herring 598724ba675SRob Herring genet_mdio: mdio@e14 { 599724ba675SRob Herring compatible = "brcm,genet-mdio-v5"; 600724ba675SRob Herring reg = <0xe14 0x8>; 601724ba675SRob Herring reg-names = "mdio"; 602724ba675SRob Herring #address-cells = <0x1>; 603724ba675SRob Herring #size-cells = <0x0>; 604724ba675SRob Herring }; 605724ba675SRob Herring }; 606724ba675SRob Herring 607724ba675SRob Herring v3d: gpu@7ec00000 { 608724ba675SRob Herring compatible = "brcm,2711-v3d"; 609724ba675SRob Herring reg = <0x0 0x7ec00000 0x4000>, 610724ba675SRob Herring <0x0 0x7ec04000 0x4000>; 611724ba675SRob Herring reg-names = "hub", "core0"; 612724ba675SRob Herring 613724ba675SRob Herring power-domains = <&pm BCM2835_POWER_DOMAIN_GRAFX_V3D>; 614724ba675SRob Herring resets = <&pm BCM2835_RESET_V3D>; 615724ba675SRob Herring interrupts = <GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>; 616724ba675SRob Herring }; 617724ba675SRob Herring }; 618724ba675SRob Herring}; 619724ba675SRob Herring 620724ba675SRob Herring&clk_osc { 621724ba675SRob Herring clock-frequency = <54000000>; 622724ba675SRob Herring}; 623724ba675SRob Herring 624724ba675SRob Herring&clocks { 625724ba675SRob Herring compatible = "brcm,bcm2711-cprman"; 626724ba675SRob Herring}; 627724ba675SRob Herring 628724ba675SRob Herring&cpu_thermal { 629724ba675SRob Herring coefficients = <(-487) 410040>; 630724ba675SRob Herring thermal-sensors = <&thermal>; 631724ba675SRob Herring}; 632724ba675SRob Herring 633724ba675SRob Herring&dsi0 { 634724ba675SRob Herring interrupts = <GIC_SPI 100 IRQ_TYPE_LEVEL_HIGH>; 635724ba675SRob Herring}; 636724ba675SRob Herring 637724ba675SRob Herring&dsi1 { 638724ba675SRob Herring interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>; 639724ba675SRob Herring compatible = "brcm,bcm2711-dsi1"; 640724ba675SRob Herring}; 641724ba675SRob Herring 642724ba675SRob Herring&gpio { 643724ba675SRob Herring compatible = "brcm,bcm2711-gpio"; 644724ba675SRob Herring interrupts = <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>, 645724ba675SRob Herring <GIC_SPI 114 IRQ_TYPE_LEVEL_HIGH>, 646724ba675SRob Herring <GIC_SPI 115 IRQ_TYPE_LEVEL_HIGH>, 647724ba675SRob Herring <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>; 648724ba675SRob Herring 649724ba675SRob Herring gpio-ranges = <&gpio 0 0 58>; 650724ba675SRob Herring 651724ba675SRob Herring gpclk0_gpio49: gpclk0-gpio49 { 652724ba675SRob Herring pin-gpclk { 653724ba675SRob Herring pins = "gpio49"; 654724ba675SRob Herring function = "alt1"; 655724ba675SRob Herring bias-disable; 656724ba675SRob Herring }; 657724ba675SRob Herring }; 658724ba675SRob Herring gpclk1_gpio50: gpclk1-gpio50 { 659724ba675SRob Herring pin-gpclk { 660724ba675SRob Herring pins = "gpio50"; 661724ba675SRob Herring function = "alt1"; 662724ba675SRob Herring bias-disable; 663724ba675SRob Herring }; 664724ba675SRob Herring }; 665724ba675SRob Herring gpclk2_gpio51: gpclk2-gpio51 { 666724ba675SRob Herring pin-gpclk { 667724ba675SRob Herring pins = "gpio51"; 668724ba675SRob Herring function = "alt1"; 669724ba675SRob Herring bias-disable; 670724ba675SRob Herring }; 671724ba675SRob Herring }; 672724ba675SRob Herring 673724ba675SRob Herring i2c0_gpio46: i2c0-gpio46 { 674724ba675SRob Herring pin-sda { 675724ba675SRob Herring function = "alt0"; 676724ba675SRob Herring pins = "gpio46"; 677724ba675SRob Herring bias-pull-up; 678724ba675SRob Herring }; 679724ba675SRob Herring pin-scl { 680724ba675SRob Herring function = "alt0"; 681724ba675SRob Herring pins = "gpio47"; 682724ba675SRob Herring bias-disable; 683724ba675SRob Herring }; 684724ba675SRob Herring }; 685724ba675SRob Herring i2c1_gpio46: i2c1-gpio46 { 686724ba675SRob Herring pin-sda { 687724ba675SRob Herring function = "alt1"; 688724ba675SRob Herring pins = "gpio46"; 689724ba675SRob Herring bias-pull-up; 690724ba675SRob Herring }; 691724ba675SRob Herring pin-scl { 692724ba675SRob Herring function = "alt1"; 693724ba675SRob Herring pins = "gpio47"; 694724ba675SRob Herring bias-disable; 695724ba675SRob Herring }; 696724ba675SRob Herring }; 697724ba675SRob Herring i2c3_gpio2: i2c3-gpio2 { 698724ba675SRob Herring pin-sda { 699724ba675SRob Herring function = "alt5"; 700724ba675SRob Herring pins = "gpio2"; 701724ba675SRob Herring bias-pull-up; 702724ba675SRob Herring }; 703724ba675SRob Herring pin-scl { 704724ba675SRob Herring function = "alt5"; 705724ba675SRob Herring pins = "gpio3"; 706724ba675SRob Herring bias-disable; 707724ba675SRob Herring }; 708724ba675SRob Herring }; 709724ba675SRob Herring i2c3_gpio4: i2c3-gpio4 { 710724ba675SRob Herring pin-sda { 711724ba675SRob Herring function = "alt5"; 712724ba675SRob Herring pins = "gpio4"; 713724ba675SRob Herring bias-pull-up; 714724ba675SRob Herring }; 715724ba675SRob Herring pin-scl { 716724ba675SRob Herring function = "alt5"; 717724ba675SRob Herring pins = "gpio5"; 718724ba675SRob Herring bias-disable; 719724ba675SRob Herring }; 720724ba675SRob Herring }; 721724ba675SRob Herring i2c4_gpio6: i2c4-gpio6 { 722724ba675SRob Herring pin-sda { 723724ba675SRob Herring function = "alt5"; 724724ba675SRob Herring pins = "gpio6"; 725724ba675SRob Herring bias-pull-up; 726724ba675SRob Herring }; 727724ba675SRob Herring pin-scl { 728724ba675SRob Herring function = "alt5"; 729724ba675SRob Herring pins = "gpio7"; 730724ba675SRob Herring bias-disable; 731724ba675SRob Herring }; 732724ba675SRob Herring }; 733724ba675SRob Herring i2c4_gpio8: i2c4-gpio8 { 734724ba675SRob Herring pin-sda { 735724ba675SRob Herring function = "alt5"; 736724ba675SRob Herring pins = "gpio8"; 737724ba675SRob Herring bias-pull-up; 738724ba675SRob Herring }; 739724ba675SRob Herring pin-scl { 740724ba675SRob Herring function = "alt5"; 741724ba675SRob Herring pins = "gpio9"; 742724ba675SRob Herring bias-disable; 743724ba675SRob Herring }; 744724ba675SRob Herring }; 745724ba675SRob Herring i2c5_gpio10: i2c5-gpio10 { 746724ba675SRob Herring pin-sda { 747724ba675SRob Herring function = "alt5"; 748724ba675SRob Herring pins = "gpio10"; 749724ba675SRob Herring bias-pull-up; 750724ba675SRob Herring }; 751724ba675SRob Herring pin-scl { 752724ba675SRob Herring function = "alt5"; 753724ba675SRob Herring pins = "gpio11"; 754724ba675SRob Herring bias-disable; 755724ba675SRob Herring }; 756724ba675SRob Herring }; 757724ba675SRob Herring i2c5_gpio12: i2c5-gpio12 { 758724ba675SRob Herring pin-sda { 759724ba675SRob Herring function = "alt5"; 760724ba675SRob Herring pins = "gpio12"; 761724ba675SRob Herring bias-pull-up; 762724ba675SRob Herring }; 763724ba675SRob Herring pin-scl { 764724ba675SRob Herring function = "alt5"; 765724ba675SRob Herring pins = "gpio13"; 766724ba675SRob Herring bias-disable; 767724ba675SRob Herring }; 768724ba675SRob Herring }; 769724ba675SRob Herring i2c6_gpio0: i2c6-gpio0 { 770724ba675SRob Herring pin-sda { 771724ba675SRob Herring function = "alt5"; 772724ba675SRob Herring pins = "gpio0"; 773724ba675SRob Herring bias-pull-up; 774724ba675SRob Herring }; 775724ba675SRob Herring pin-scl { 776724ba675SRob Herring function = "alt5"; 777724ba675SRob Herring pins = "gpio1"; 778724ba675SRob Herring bias-disable; 779724ba675SRob Herring }; 780724ba675SRob Herring }; 781724ba675SRob Herring i2c6_gpio22: i2c6-gpio22 { 782724ba675SRob Herring pin-sda { 783724ba675SRob Herring function = "alt5"; 784724ba675SRob Herring pins = "gpio22"; 785724ba675SRob Herring bias-pull-up; 786724ba675SRob Herring }; 787724ba675SRob Herring pin-scl { 788724ba675SRob Herring function = "alt5"; 789724ba675SRob Herring pins = "gpio23"; 790724ba675SRob Herring bias-disable; 791724ba675SRob Herring }; 792724ba675SRob Herring }; 793724ba675SRob Herring i2c_slave_gpio8: i2c-slave-gpio8 { 794724ba675SRob Herring pins-i2c-slave { 795724ba675SRob Herring pins = "gpio8", 796724ba675SRob Herring "gpio9", 797724ba675SRob Herring "gpio10", 798724ba675SRob Herring "gpio11"; 799724ba675SRob Herring function = "alt3"; 800724ba675SRob Herring }; 801724ba675SRob Herring }; 802724ba675SRob Herring 803724ba675SRob Herring jtag_gpio48: jtag-gpio48 { 804724ba675SRob Herring pins-jtag { 805724ba675SRob Herring pins = "gpio48", 806724ba675SRob Herring "gpio49", 807724ba675SRob Herring "gpio50", 808724ba675SRob Herring "gpio51", 809724ba675SRob Herring "gpio52", 810724ba675SRob Herring "gpio53"; 811724ba675SRob Herring function = "alt4"; 812724ba675SRob Herring }; 813724ba675SRob Herring }; 814724ba675SRob Herring 815724ba675SRob Herring mii_gpio28: mii-gpio28 { 816724ba675SRob Herring pins-mii { 817724ba675SRob Herring pins = "gpio28", 818724ba675SRob Herring "gpio29", 819724ba675SRob Herring "gpio30", 820724ba675SRob Herring "gpio31"; 821724ba675SRob Herring function = "alt4"; 822724ba675SRob Herring }; 823724ba675SRob Herring }; 824724ba675SRob Herring mii_gpio36: mii-gpio36 { 825724ba675SRob Herring pins-mii { 826724ba675SRob Herring pins = "gpio36", 827724ba675SRob Herring "gpio37", 828724ba675SRob Herring "gpio38", 829724ba675SRob Herring "gpio39"; 830724ba675SRob Herring function = "alt5"; 831724ba675SRob Herring }; 832724ba675SRob Herring }; 833724ba675SRob Herring 834724ba675SRob Herring pcm_gpio50: pcm-gpio50 { 835724ba675SRob Herring pins-pcm { 836724ba675SRob Herring pins = "gpio50", 837724ba675SRob Herring "gpio51", 838724ba675SRob Herring "gpio52", 839724ba675SRob Herring "gpio53"; 840724ba675SRob Herring function = "alt2"; 841724ba675SRob Herring }; 842724ba675SRob Herring }; 843724ba675SRob Herring 844724ba675SRob Herring pwm0_0_gpio12: pwm0-0-gpio12 { 845724ba675SRob Herring pin-pwm { 846724ba675SRob Herring pins = "gpio12"; 847724ba675SRob Herring function = "alt0"; 848724ba675SRob Herring bias-disable; 849724ba675SRob Herring }; 850724ba675SRob Herring }; 851724ba675SRob Herring pwm0_0_gpio18: pwm0-0-gpio18 { 852724ba675SRob Herring pin-pwm { 853724ba675SRob Herring pins = "gpio18"; 854724ba675SRob Herring function = "alt5"; 855724ba675SRob Herring bias-disable; 856724ba675SRob Herring }; 857724ba675SRob Herring }; 858724ba675SRob Herring pwm1_0_gpio40: pwm1-0-gpio40 { 859724ba675SRob Herring pin-pwm { 860724ba675SRob Herring pins = "gpio40"; 861724ba675SRob Herring function = "alt0"; 862724ba675SRob Herring bias-disable; 863724ba675SRob Herring }; 864724ba675SRob Herring }; 865724ba675SRob Herring pwm0_1_gpio13: pwm0-1-gpio13 { 866724ba675SRob Herring pin-pwm { 867724ba675SRob Herring pins = "gpio13"; 868724ba675SRob Herring function = "alt0"; 869724ba675SRob Herring bias-disable; 870724ba675SRob Herring }; 871724ba675SRob Herring }; 872724ba675SRob Herring pwm0_1_gpio19: pwm0-1-gpio19 { 873724ba675SRob Herring pin-pwm { 874724ba675SRob Herring pins = "gpio19"; 875724ba675SRob Herring function = "alt5"; 876724ba675SRob Herring bias-disable; 877724ba675SRob Herring }; 878724ba675SRob Herring }; 879724ba675SRob Herring pwm1_1_gpio41: pwm1-1-gpio41 { 880724ba675SRob Herring pin-pwm { 881724ba675SRob Herring pins = "gpio41"; 882724ba675SRob Herring function = "alt0"; 883724ba675SRob Herring bias-disable; 884724ba675SRob Herring }; 885724ba675SRob Herring }; 886724ba675SRob Herring pwm0_1_gpio45: pwm0-1-gpio45 { 887724ba675SRob Herring pin-pwm { 888724ba675SRob Herring pins = "gpio45"; 889724ba675SRob Herring function = "alt0"; 890724ba675SRob Herring bias-disable; 891724ba675SRob Herring }; 892724ba675SRob Herring }; 893724ba675SRob Herring pwm0_0_gpio52: pwm0-0-gpio52 { 894724ba675SRob Herring pin-pwm { 895724ba675SRob Herring pins = "gpio52"; 896724ba675SRob Herring function = "alt1"; 897724ba675SRob Herring bias-disable; 898724ba675SRob Herring }; 899724ba675SRob Herring }; 900724ba675SRob Herring pwm0_1_gpio53: pwm0-1-gpio53 { 901724ba675SRob Herring pin-pwm { 902724ba675SRob Herring pins = "gpio53"; 903724ba675SRob Herring function = "alt1"; 904724ba675SRob Herring bias-disable; 905724ba675SRob Herring }; 906724ba675SRob Herring }; 907724ba675SRob Herring 908724ba675SRob Herring rgmii_gpio35: rgmii-gpio35 { 909724ba675SRob Herring pin-start-stop { 910724ba675SRob Herring pins = "gpio35"; 911724ba675SRob Herring function = "alt4"; 912724ba675SRob Herring }; 913724ba675SRob Herring pin-rx-ok { 914724ba675SRob Herring pins = "gpio36"; 915724ba675SRob Herring function = "alt4"; 916724ba675SRob Herring }; 917724ba675SRob Herring }; 918724ba675SRob Herring rgmii_irq_gpio34: rgmii-irq-gpio34 { 919724ba675SRob Herring pin-irq { 920724ba675SRob Herring pins = "gpio34"; 921724ba675SRob Herring function = "alt5"; 922724ba675SRob Herring }; 923724ba675SRob Herring }; 924724ba675SRob Herring rgmii_irq_gpio39: rgmii-irq-gpio39 { 925724ba675SRob Herring pin-irq { 926724ba675SRob Herring pins = "gpio39"; 927724ba675SRob Herring function = "alt4"; 928724ba675SRob Herring }; 929724ba675SRob Herring }; 930724ba675SRob Herring rgmii_mdio_gpio28: rgmii-mdio-gpio28 { 931724ba675SRob Herring pins-mdio { 932724ba675SRob Herring pins = "gpio28", 933724ba675SRob Herring "gpio29"; 934724ba675SRob Herring function = "alt5"; 935724ba675SRob Herring }; 936724ba675SRob Herring }; 937724ba675SRob Herring rgmii_mdio_gpio37: rgmii-mdio-gpio37 { 938724ba675SRob Herring pins-mdio { 939724ba675SRob Herring pins = "gpio37", 940724ba675SRob Herring "gpio38"; 941724ba675SRob Herring function = "alt4"; 942724ba675SRob Herring }; 943724ba675SRob Herring }; 944724ba675SRob Herring 945724ba675SRob Herring spi0_gpio46: spi0-gpio46 { 946724ba675SRob Herring pins-spi { 947724ba675SRob Herring pins = "gpio46", 948724ba675SRob Herring "gpio47", 949724ba675SRob Herring "gpio48", 950724ba675SRob Herring "gpio49"; 951724ba675SRob Herring function = "alt2"; 952724ba675SRob Herring }; 953724ba675SRob Herring }; 954724ba675SRob Herring spi2_gpio46: spi2-gpio46 { 955724ba675SRob Herring pins-spi { 956724ba675SRob Herring pins = "gpio46", 957724ba675SRob Herring "gpio47", 958724ba675SRob Herring "gpio48", 959724ba675SRob Herring "gpio49", 960724ba675SRob Herring "gpio50"; 961724ba675SRob Herring function = "alt5"; 962724ba675SRob Herring }; 963724ba675SRob Herring }; 964724ba675SRob Herring spi3_gpio0: spi3-gpio0 { 965724ba675SRob Herring pins-spi { 966724ba675SRob Herring pins = "gpio0", 967724ba675SRob Herring "gpio1", 968724ba675SRob Herring "gpio2", 969724ba675SRob Herring "gpio3"; 970724ba675SRob Herring function = "alt3"; 971724ba675SRob Herring }; 972724ba675SRob Herring }; 973724ba675SRob Herring spi4_gpio4: spi4-gpio4 { 974724ba675SRob Herring pins-spi { 975724ba675SRob Herring pins = "gpio4", 976724ba675SRob Herring "gpio5", 977724ba675SRob Herring "gpio6", 978724ba675SRob Herring "gpio7"; 979724ba675SRob Herring function = "alt3"; 980724ba675SRob Herring }; 981724ba675SRob Herring }; 982724ba675SRob Herring spi5_gpio12: spi5-gpio12 { 983724ba675SRob Herring pins-spi { 984724ba675SRob Herring pins = "gpio12", 985724ba675SRob Herring "gpio13", 986724ba675SRob Herring "gpio14", 987724ba675SRob Herring "gpio15"; 988724ba675SRob Herring function = "alt3"; 989724ba675SRob Herring }; 990724ba675SRob Herring }; 991724ba675SRob Herring spi6_gpio18: spi6-gpio18 { 992724ba675SRob Herring pins-spi { 993724ba675SRob Herring pins = "gpio18", 994724ba675SRob Herring "gpio19", 995724ba675SRob Herring "gpio20", 996724ba675SRob Herring "gpio21"; 997724ba675SRob Herring function = "alt3"; 998724ba675SRob Herring }; 999724ba675SRob Herring }; 1000724ba675SRob Herring 1001724ba675SRob Herring uart2_gpio0: uart2-gpio0 { 1002724ba675SRob Herring pin-tx { 1003724ba675SRob Herring pins = "gpio0"; 1004724ba675SRob Herring function = "alt4"; 1005724ba675SRob Herring bias-disable; 1006724ba675SRob Herring }; 1007724ba675SRob Herring pin-rx { 1008724ba675SRob Herring pins = "gpio1"; 1009724ba675SRob Herring function = "alt4"; 1010724ba675SRob Herring bias-pull-up; 1011724ba675SRob Herring }; 1012724ba675SRob Herring }; 1013724ba675SRob Herring uart2_ctsrts_gpio2: uart2-ctsrts-gpio2 { 1014724ba675SRob Herring pin-cts { 1015724ba675SRob Herring pins = "gpio2"; 1016724ba675SRob Herring function = "alt4"; 1017724ba675SRob Herring bias-pull-up; 1018724ba675SRob Herring }; 1019724ba675SRob Herring pin-rts { 1020724ba675SRob Herring pins = "gpio3"; 1021724ba675SRob Herring function = "alt4"; 1022724ba675SRob Herring bias-disable; 1023724ba675SRob Herring }; 1024724ba675SRob Herring }; 1025724ba675SRob Herring uart3_gpio4: uart3-gpio4 { 1026724ba675SRob Herring pin-tx { 1027724ba675SRob Herring pins = "gpio4"; 1028724ba675SRob Herring function = "alt4"; 1029724ba675SRob Herring bias-disable; 1030724ba675SRob Herring }; 1031724ba675SRob Herring pin-rx { 1032724ba675SRob Herring pins = "gpio5"; 1033724ba675SRob Herring function = "alt4"; 1034724ba675SRob Herring bias-pull-up; 1035724ba675SRob Herring }; 1036724ba675SRob Herring }; 1037724ba675SRob Herring uart3_ctsrts_gpio6: uart3-ctsrts-gpio6 { 1038724ba675SRob Herring pin-cts { 1039724ba675SRob Herring pins = "gpio6"; 1040724ba675SRob Herring function = "alt4"; 1041724ba675SRob Herring bias-pull-up; 1042724ba675SRob Herring }; 1043724ba675SRob Herring pin-rts { 1044724ba675SRob Herring pins = "gpio7"; 1045724ba675SRob Herring function = "alt4"; 1046724ba675SRob Herring bias-disable; 1047724ba675SRob Herring }; 1048724ba675SRob Herring }; 1049724ba675SRob Herring uart4_gpio8: uart4-gpio8 { 1050724ba675SRob Herring pin-tx { 1051724ba675SRob Herring pins = "gpio8"; 1052724ba675SRob Herring function = "alt4"; 1053724ba675SRob Herring bias-disable; 1054724ba675SRob Herring }; 1055724ba675SRob Herring pin-rx { 1056724ba675SRob Herring pins = "gpio9"; 1057724ba675SRob Herring function = "alt4"; 1058724ba675SRob Herring bias-pull-up; 1059724ba675SRob Herring }; 1060724ba675SRob Herring }; 1061724ba675SRob Herring uart4_ctsrts_gpio10: uart4-ctsrts-gpio10 { 1062724ba675SRob Herring pin-cts { 1063724ba675SRob Herring pins = "gpio10"; 1064724ba675SRob Herring function = "alt4"; 1065724ba675SRob Herring bias-pull-up; 1066724ba675SRob Herring }; 1067724ba675SRob Herring pin-rts { 1068724ba675SRob Herring pins = "gpio11"; 1069724ba675SRob Herring function = "alt4"; 1070724ba675SRob Herring bias-disable; 1071724ba675SRob Herring }; 1072724ba675SRob Herring }; 1073724ba675SRob Herring uart5_gpio12: uart5-gpio12 { 1074724ba675SRob Herring pin-tx { 1075724ba675SRob Herring pins = "gpio12"; 1076724ba675SRob Herring function = "alt4"; 1077724ba675SRob Herring bias-disable; 1078724ba675SRob Herring }; 1079724ba675SRob Herring pin-rx { 1080724ba675SRob Herring pins = "gpio13"; 1081724ba675SRob Herring function = "alt4"; 1082724ba675SRob Herring bias-pull-up; 1083724ba675SRob Herring }; 1084724ba675SRob Herring }; 1085724ba675SRob Herring uart5_ctsrts_gpio14: uart5-ctsrts-gpio14 { 1086724ba675SRob Herring pin-cts { 1087724ba675SRob Herring pins = "gpio14"; 1088724ba675SRob Herring function = "alt4"; 1089724ba675SRob Herring bias-pull-up; 1090724ba675SRob Herring }; 1091724ba675SRob Herring pin-rts { 1092724ba675SRob Herring pins = "gpio15"; 1093724ba675SRob Herring function = "alt4"; 1094724ba675SRob Herring bias-disable; 1095724ba675SRob Herring }; 1096724ba675SRob Herring }; 1097724ba675SRob Herring}; 1098724ba675SRob Herring 1099724ba675SRob Herring&rmem { 1100724ba675SRob Herring #address-cells = <2>; 1101724ba675SRob Herring}; 1102724ba675SRob Herring 1103724ba675SRob Herring&cma { 1104724ba675SRob Herring /* 1105724ba675SRob Herring * arm64 reserves the CMA by default somewhere in ZONE_DMA32, 1106724ba675SRob Herring * that's not good enough for the BCM2711 as some devices can 1107724ba675SRob Herring * only address the lower 1G of memory (ZONE_DMA). 1108724ba675SRob Herring */ 1109724ba675SRob Herring alloc-ranges = <0x0 0x00000000 0x40000000>; 1110724ba675SRob Herring}; 1111724ba675SRob Herring 1112724ba675SRob Herring&i2c0 { 1113724ba675SRob Herring compatible = "brcm,bcm2711-i2c", "brcm,bcm2835-i2c"; 1114724ba675SRob Herring interrupts = <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>; 1115724ba675SRob Herring}; 1116724ba675SRob Herring 1117724ba675SRob Herring&i2c1 { 1118724ba675SRob Herring compatible = "brcm,bcm2711-i2c", "brcm,bcm2835-i2c"; 1119724ba675SRob Herring interrupts = <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>; 1120724ba675SRob Herring}; 1121724ba675SRob Herring 1122724ba675SRob Herring&mailbox { 1123724ba675SRob Herring interrupts = <GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>; 1124724ba675SRob Herring}; 1125724ba675SRob Herring 1126724ba675SRob Herring&sdhci { 1127724ba675SRob Herring interrupts = <GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>; 1128724ba675SRob Herring}; 1129724ba675SRob Herring 1130724ba675SRob Herring&sdhost { 1131724ba675SRob Herring interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>; 1132724ba675SRob Herring}; 1133724ba675SRob Herring 1134724ba675SRob Herring&spi { 1135724ba675SRob Herring interrupts = <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>; 1136724ba675SRob Herring}; 1137724ba675SRob Herring 1138724ba675SRob Herring&spi1 { 1139724ba675SRob Herring interrupts = <GIC_SPI 93 IRQ_TYPE_LEVEL_HIGH>; 1140724ba675SRob Herring}; 1141724ba675SRob Herring 1142724ba675SRob Herring&spi2 { 1143724ba675SRob Herring interrupts = <GIC_SPI 93 IRQ_TYPE_LEVEL_HIGH>; 1144724ba675SRob Herring}; 1145724ba675SRob Herring 1146724ba675SRob Herring&system_timer { 1147724ba675SRob Herring interrupts = <GIC_SPI 64 IRQ_TYPE_LEVEL_HIGH>, 1148724ba675SRob Herring <GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH>, 1149724ba675SRob Herring <GIC_SPI 66 IRQ_TYPE_LEVEL_HIGH>, 1150724ba675SRob Herring <GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>; 1151724ba675SRob Herring}; 1152724ba675SRob Herring 1153724ba675SRob Herring&txp { 1154724ba675SRob Herring interrupts = <GIC_SPI 75 IRQ_TYPE_LEVEL_HIGH>; 1155724ba675SRob Herring}; 1156724ba675SRob Herring 1157724ba675SRob Herring&uart0 { 1158724ba675SRob Herring interrupts = <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>; 1159724ba675SRob Herring}; 1160724ba675SRob Herring 1161724ba675SRob Herring&uart1 { 1162724ba675SRob Herring interrupts = <GIC_SPI 93 IRQ_TYPE_LEVEL_HIGH>; 1163724ba675SRob Herring}; 1164724ba675SRob Herring 1165724ba675SRob Herring&usb { 1166724ba675SRob Herring interrupts = <GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>; 1167724ba675SRob Herring}; 1168724ba675SRob Herring 1169724ba675SRob Herring&vec { 1170724ba675SRob Herring compatible = "brcm,bcm2711-vec"; 1171724ba675SRob Herring interrupts = <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>; 1172724ba675SRob Herring}; 1173