1*724ba675SRob Herring// SPDX-License-Identifier: GPL-2.0-or-later 2*724ba675SRob Herring// Copyright 2019 IBM Corp. 3*724ba675SRob Herring 4*724ba675SRob Herring/dts-v1/; 5*724ba675SRob Herring 6*724ba675SRob Herring#include "aspeed-g6.dtsi" 7*724ba675SRob Herring#include <dt-bindings/gpio/aspeed-gpio.h> 8*724ba675SRob Herring 9*724ba675SRob Herring/ { 10*724ba675SRob Herring model = "AST2600 EVB"; 11*724ba675SRob Herring compatible = "aspeed,ast2600-evb", "aspeed,ast2600"; 12*724ba675SRob Herring 13*724ba675SRob Herring aliases { 14*724ba675SRob Herring serial4 = &uart5; 15*724ba675SRob Herring }; 16*724ba675SRob Herring 17*724ba675SRob Herring chosen { 18*724ba675SRob Herring bootargs = "console=ttyS4,115200n8"; 19*724ba675SRob Herring }; 20*724ba675SRob Herring 21*724ba675SRob Herring memory@80000000 { 22*724ba675SRob Herring device_type = "memory"; 23*724ba675SRob Herring reg = <0x80000000 0x80000000>; 24*724ba675SRob Herring }; 25*724ba675SRob Herring 26*724ba675SRob Herring reserved-memory { 27*724ba675SRob Herring #address-cells = <1>; 28*724ba675SRob Herring #size-cells = <1>; 29*724ba675SRob Herring ranges; 30*724ba675SRob Herring 31*724ba675SRob Herring video_engine_memory: video { 32*724ba675SRob Herring size = <0x04000000>; 33*724ba675SRob Herring alignment = <0x01000000>; 34*724ba675SRob Herring compatible = "shared-dma-pool"; 35*724ba675SRob Herring reusable; 36*724ba675SRob Herring }; 37*724ba675SRob Herring 38*724ba675SRob Herring gfx_memory: framebuffer { 39*724ba675SRob Herring size = <0x01000000>; 40*724ba675SRob Herring alignment = <0x01000000>; 41*724ba675SRob Herring compatible = "shared-dma-pool"; 42*724ba675SRob Herring reusable; 43*724ba675SRob Herring }; 44*724ba675SRob Herring }; 45*724ba675SRob Herring 46*724ba675SRob Herring vcc_sdhci0: regulator-vcc-sdhci0 { 47*724ba675SRob Herring compatible = "regulator-fixed"; 48*724ba675SRob Herring regulator-name = "SDHCI0 Vcc"; 49*724ba675SRob Herring regulator-min-microvolt = <3300000>; 50*724ba675SRob Herring regulator-max-microvolt = <3300000>; 51*724ba675SRob Herring gpios = <&gpio0 ASPEED_GPIO(V, 0) GPIO_ACTIVE_HIGH>; 52*724ba675SRob Herring enable-active-high; 53*724ba675SRob Herring }; 54*724ba675SRob Herring 55*724ba675SRob Herring vccq_sdhci0: regulator-vccq-sdhci0 { 56*724ba675SRob Herring compatible = "regulator-gpio"; 57*724ba675SRob Herring regulator-name = "SDHCI0 VccQ"; 58*724ba675SRob Herring regulator-min-microvolt = <1800000>; 59*724ba675SRob Herring regulator-max-microvolt = <3300000>; 60*724ba675SRob Herring gpios = <&gpio0 ASPEED_GPIO(V, 1) GPIO_ACTIVE_HIGH>; 61*724ba675SRob Herring gpios-states = <1>; 62*724ba675SRob Herring states = <3300000 1>, 63*724ba675SRob Herring <1800000 0>; 64*724ba675SRob Herring }; 65*724ba675SRob Herring 66*724ba675SRob Herring vcc_sdhci1: regulator-vcc-sdhci1 { 67*724ba675SRob Herring compatible = "regulator-fixed"; 68*724ba675SRob Herring regulator-name = "SDHCI1 Vcc"; 69*724ba675SRob Herring regulator-min-microvolt = <3300000>; 70*724ba675SRob Herring regulator-max-microvolt = <3300000>; 71*724ba675SRob Herring gpios = <&gpio0 ASPEED_GPIO(V, 2) GPIO_ACTIVE_HIGH>; 72*724ba675SRob Herring enable-active-high; 73*724ba675SRob Herring }; 74*724ba675SRob Herring 75*724ba675SRob Herring vccq_sdhci1: regulator-vccq-sdhci1 { 76*724ba675SRob Herring compatible = "regulator-gpio"; 77*724ba675SRob Herring regulator-name = "SDHCI1 VccQ"; 78*724ba675SRob Herring regulator-min-microvolt = <1800000>; 79*724ba675SRob Herring regulator-max-microvolt = <3300000>; 80*724ba675SRob Herring gpios = <&gpio0 ASPEED_GPIO(V, 3) GPIO_ACTIVE_HIGH>; 81*724ba675SRob Herring gpios-states = <1>; 82*724ba675SRob Herring states = <3300000 1>, 83*724ba675SRob Herring <1800000 0>; 84*724ba675SRob Herring }; 85*724ba675SRob Herring}; 86*724ba675SRob Herring 87*724ba675SRob Herring&mdio0 { 88*724ba675SRob Herring status = "okay"; 89*724ba675SRob Herring 90*724ba675SRob Herring ethphy0: ethernet-phy@0 { 91*724ba675SRob Herring compatible = "ethernet-phy-ieee802.3-c22"; 92*724ba675SRob Herring reg = <0>; 93*724ba675SRob Herring }; 94*724ba675SRob Herring}; 95*724ba675SRob Herring 96*724ba675SRob Herring&mdio1 { 97*724ba675SRob Herring status = "okay"; 98*724ba675SRob Herring 99*724ba675SRob Herring ethphy1: ethernet-phy@0 { 100*724ba675SRob Herring compatible = "ethernet-phy-ieee802.3-c22"; 101*724ba675SRob Herring reg = <0>; 102*724ba675SRob Herring }; 103*724ba675SRob Herring}; 104*724ba675SRob Herring 105*724ba675SRob Herring&mdio2 { 106*724ba675SRob Herring status = "okay"; 107*724ba675SRob Herring 108*724ba675SRob Herring ethphy2: ethernet-phy@0 { 109*724ba675SRob Herring compatible = "ethernet-phy-ieee802.3-c22"; 110*724ba675SRob Herring reg = <0>; 111*724ba675SRob Herring }; 112*724ba675SRob Herring}; 113*724ba675SRob Herring 114*724ba675SRob Herring&mdio3 { 115*724ba675SRob Herring status = "okay"; 116*724ba675SRob Herring 117*724ba675SRob Herring ethphy3: ethernet-phy@0 { 118*724ba675SRob Herring compatible = "ethernet-phy-ieee802.3-c22"; 119*724ba675SRob Herring reg = <0>; 120*724ba675SRob Herring }; 121*724ba675SRob Herring}; 122*724ba675SRob Herring 123*724ba675SRob Herring&mac0 { 124*724ba675SRob Herring status = "okay"; 125*724ba675SRob Herring 126*724ba675SRob Herring phy-mode = "rgmii-rxid"; 127*724ba675SRob Herring phy-handle = <ðphy0>; 128*724ba675SRob Herring 129*724ba675SRob Herring pinctrl-names = "default"; 130*724ba675SRob Herring pinctrl-0 = <&pinctrl_rgmii1_default>; 131*724ba675SRob Herring}; 132*724ba675SRob Herring 133*724ba675SRob Herring 134*724ba675SRob Herring&mac1 { 135*724ba675SRob Herring status = "okay"; 136*724ba675SRob Herring 137*724ba675SRob Herring phy-mode = "rgmii-rxid"; 138*724ba675SRob Herring phy-handle = <ðphy1>; 139*724ba675SRob Herring 140*724ba675SRob Herring pinctrl-names = "default"; 141*724ba675SRob Herring pinctrl-0 = <&pinctrl_rgmii2_default>; 142*724ba675SRob Herring}; 143*724ba675SRob Herring 144*724ba675SRob Herring&mac2 { 145*724ba675SRob Herring status = "okay"; 146*724ba675SRob Herring 147*724ba675SRob Herring phy-mode = "rgmii"; 148*724ba675SRob Herring phy-handle = <ðphy2>; 149*724ba675SRob Herring 150*724ba675SRob Herring pinctrl-names = "default"; 151*724ba675SRob Herring pinctrl-0 = <&pinctrl_rgmii3_default>; 152*724ba675SRob Herring}; 153*724ba675SRob Herring 154*724ba675SRob Herring&mac3 { 155*724ba675SRob Herring status = "okay"; 156*724ba675SRob Herring 157*724ba675SRob Herring phy-mode = "rgmii"; 158*724ba675SRob Herring phy-handle = <ðphy3>; 159*724ba675SRob Herring 160*724ba675SRob Herring pinctrl-names = "default"; 161*724ba675SRob Herring pinctrl-0 = <&pinctrl_rgmii4_default>; 162*724ba675SRob Herring}; 163*724ba675SRob Herring 164*724ba675SRob Herring&emmc_controller { 165*724ba675SRob Herring status = "okay"; 166*724ba675SRob Herring}; 167*724ba675SRob Herring 168*724ba675SRob Herring&emmc { 169*724ba675SRob Herring non-removable; 170*724ba675SRob Herring bus-width = <4>; 171*724ba675SRob Herring max-frequency = <100000000>; 172*724ba675SRob Herring clk-phase-mmc-hs200 = <9>, <225>; 173*724ba675SRob Herring}; 174*724ba675SRob Herring 175*724ba675SRob Herring&rtc { 176*724ba675SRob Herring status = "okay"; 177*724ba675SRob Herring}; 178*724ba675SRob Herring 179*724ba675SRob Herring&fmc { 180*724ba675SRob Herring status = "okay"; 181*724ba675SRob Herring flash@0 { 182*724ba675SRob Herring status = "okay"; 183*724ba675SRob Herring m25p,fast-read; 184*724ba675SRob Herring label = "bmc"; 185*724ba675SRob Herring spi-rx-bus-width = <4>; 186*724ba675SRob Herring spi-max-frequency = <50000000>; 187*724ba675SRob Herring#include "openbmc-flash-layout-64.dtsi" 188*724ba675SRob Herring }; 189*724ba675SRob Herring}; 190*724ba675SRob Herring 191*724ba675SRob Herring&spi1 { 192*724ba675SRob Herring status = "okay"; 193*724ba675SRob Herring pinctrl-names = "default"; 194*724ba675SRob Herring pinctrl-0 = <&pinctrl_spi1_default>; 195*724ba675SRob Herring 196*724ba675SRob Herring flash@0 { 197*724ba675SRob Herring status = "okay"; 198*724ba675SRob Herring m25p,fast-read; 199*724ba675SRob Herring label = "pnor"; 200*724ba675SRob Herring spi-rx-bus-width = <4>; 201*724ba675SRob Herring spi-max-frequency = <100000000>; 202*724ba675SRob Herring }; 203*724ba675SRob Herring}; 204*724ba675SRob Herring 205*724ba675SRob Herring&uart5 { 206*724ba675SRob Herring // Workaround for A0 207*724ba675SRob Herring compatible = "snps,dw-apb-uart"; 208*724ba675SRob Herring}; 209*724ba675SRob Herring 210*724ba675SRob Herring&i2c0 { 211*724ba675SRob Herring status = "okay"; 212*724ba675SRob Herring}; 213*724ba675SRob Herring 214*724ba675SRob Herring&i2c1 { 215*724ba675SRob Herring status = "okay"; 216*724ba675SRob Herring}; 217*724ba675SRob Herring 218*724ba675SRob Herring&i2c2 { 219*724ba675SRob Herring status = "okay"; 220*724ba675SRob Herring}; 221*724ba675SRob Herring 222*724ba675SRob Herring&i2c3 { 223*724ba675SRob Herring status = "okay"; 224*724ba675SRob Herring}; 225*724ba675SRob Herring 226*724ba675SRob Herring&i2c4 { 227*724ba675SRob Herring status = "okay"; 228*724ba675SRob Herring}; 229*724ba675SRob Herring 230*724ba675SRob Herring&i2c5 { 231*724ba675SRob Herring status = "okay"; 232*724ba675SRob Herring}; 233*724ba675SRob Herring 234*724ba675SRob Herring&i2c6 { 235*724ba675SRob Herring status = "okay"; 236*724ba675SRob Herring}; 237*724ba675SRob Herring 238*724ba675SRob Herring&i2c7 { 239*724ba675SRob Herring status = "okay"; 240*724ba675SRob Herring 241*724ba675SRob Herring temp@2e { 242*724ba675SRob Herring compatible = "adi,adt7490"; 243*724ba675SRob Herring reg = <0x2e>; 244*724ba675SRob Herring }; 245*724ba675SRob Herring 246*724ba675SRob Herring eeprom@50 { 247*724ba675SRob Herring compatible = "atmel,24c08"; 248*724ba675SRob Herring reg = <0x50>; 249*724ba675SRob Herring pagesize = <16>; 250*724ba675SRob Herring }; 251*724ba675SRob Herring}; 252*724ba675SRob Herring 253*724ba675SRob Herring&i2c8 { 254*724ba675SRob Herring status = "okay"; 255*724ba675SRob Herring 256*724ba675SRob Herring lm75@4d { 257*724ba675SRob Herring compatible = "national,lm75"; 258*724ba675SRob Herring reg = <0x4d>; 259*724ba675SRob Herring }; 260*724ba675SRob Herring}; 261*724ba675SRob Herring 262*724ba675SRob Herring&i2c9 { 263*724ba675SRob Herring status = "okay"; 264*724ba675SRob Herring}; 265*724ba675SRob Herring 266*724ba675SRob Herring&i2c12 { 267*724ba675SRob Herring status = "okay"; 268*724ba675SRob Herring}; 269*724ba675SRob Herring 270*724ba675SRob Herring&i2c13 { 271*724ba675SRob Herring status = "okay"; 272*724ba675SRob Herring}; 273*724ba675SRob Herring 274*724ba675SRob Herring&i2c14 { 275*724ba675SRob Herring status = "okay"; 276*724ba675SRob Herring}; 277*724ba675SRob Herring 278*724ba675SRob Herring&i2c15 { 279*724ba675SRob Herring status = "okay"; 280*724ba675SRob Herring}; 281*724ba675SRob Herring 282*724ba675SRob Herring&fsim0 { 283*724ba675SRob Herring status = "okay"; 284*724ba675SRob Herring}; 285*724ba675SRob Herring 286*724ba675SRob Herring&ehci1 { 287*724ba675SRob Herring status = "okay"; 288*724ba675SRob Herring}; 289*724ba675SRob Herring 290*724ba675SRob Herring&uhci { 291*724ba675SRob Herring status = "okay"; 292*724ba675SRob Herring}; 293*724ba675SRob Herring 294*724ba675SRob Herring&sdc { 295*724ba675SRob Herring status = "okay"; 296*724ba675SRob Herring}; 297*724ba675SRob Herring 298*724ba675SRob Herring/* 299*724ba675SRob Herring * The signal voltage of sdhci0 and sdhci1 on AST2600-A2 EVB is able to be 300*724ba675SRob Herring * toggled by GPIO pins. 301*724ba675SRob Herring * In the reference design, GPIOV0 of AST2600-A2 EVB is connected to the 302*724ba675SRob Herring * power load switch that provides 3.3v to sdhci0 vdd, GPIOV1 is connected to 303*724ba675SRob Herring * a 1.8v and a 3.3v power load switch that provides signal voltage to 304*724ba675SRob Herring * sdhci0 bus. 305*724ba675SRob Herring * If GPIOV0 is active high, sdhci0 is enabled, otherwise, sdhci0 is disabled. 306*724ba675SRob Herring * If GPIOV1 is active high, 3.3v power load switch is enabled, sdhci0 signal 307*724ba675SRob Herring * voltage is 3.3v, otherwise, 1.8v power load switch will be enabled, 308*724ba675SRob Herring * sdhci0 signal voltage becomes 1.8v. 309*724ba675SRob Herring * AST2600-A2 EVB also supports toggling signal voltage for sdhci1. 310*724ba675SRob Herring * The design is the same as sdhci0, it uses GPIOV2 as power-gpio and GPIOV3 311*724ba675SRob Herring * as power-switch-gpio. 312*724ba675SRob Herring */ 313*724ba675SRob Herring&sdhci0 { 314*724ba675SRob Herring status = "okay"; 315*724ba675SRob Herring bus-width = <4>; 316*724ba675SRob Herring max-frequency = <100000000>; 317*724ba675SRob Herring sdhci-drive-type = /bits/ 8 <3>; 318*724ba675SRob Herring sdhci-caps-mask = <0x7 0x0>; 319*724ba675SRob Herring sdhci,wp-inverted; 320*724ba675SRob Herring vmmc-supply = <&vcc_sdhci0>; 321*724ba675SRob Herring vqmmc-supply = <&vccq_sdhci0>; 322*724ba675SRob Herring clk-phase-sd-hs = <7>, <200>; 323*724ba675SRob Herring}; 324*724ba675SRob Herring 325*724ba675SRob Herring&sdhci1 { 326*724ba675SRob Herring status = "okay"; 327*724ba675SRob Herring bus-width = <4>; 328*724ba675SRob Herring max-frequency = <100000000>; 329*724ba675SRob Herring sdhci-drive-type = /bits/ 8 <3>; 330*724ba675SRob Herring sdhci-caps-mask = <0x7 0x0>; 331*724ba675SRob Herring sdhci,wp-inverted; 332*724ba675SRob Herring vmmc-supply = <&vcc_sdhci1>; 333*724ba675SRob Herring vqmmc-supply = <&vccq_sdhci1>; 334*724ba675SRob Herring clk-phase-sd-hs = <7>, <200>; 335*724ba675SRob Herring}; 336*724ba675SRob Herring 337*724ba675SRob Herring&vhub { 338*724ba675SRob Herring status = "okay"; 339*724ba675SRob Herring pinctrl-names = "default"; 340*724ba675SRob Herring}; 341*724ba675SRob Herring 342*724ba675SRob Herring&video { 343*724ba675SRob Herring status = "okay"; 344*724ba675SRob Herring memory-region = <&video_engine_memory>; 345*724ba675SRob Herring}; 346*724ba675SRob Herring 347*724ba675SRob Herring&gfx { 348*724ba675SRob Herring status = "okay"; 349*724ba675SRob Herring memory-region = <&gfx_memory>; 350*724ba675SRob Herring}; 351