1a92a5d0dSMischa Jonker/* 2a92a5d0dSMischa Jonker * Copyright (C) 2013 Synopsys, Inc. (www.synopsys.com) 3a92a5d0dSMischa Jonker * 4a92a5d0dSMischa Jonker * This program is free software; you can redistribute it and/or modify 5a92a5d0dSMischa Jonker * it under the terms of the GNU General Public License version 2 as 6a92a5d0dSMischa Jonker * published by the Free Software Foundation. 7a92a5d0dSMischa Jonker */ 8a92a5d0dSMischa Jonker/dts-v1/; 9a92a5d0dSMischa Jonker 10a92a5d0dSMischa Jonker/include/ "skeleton.dtsi" 11a92a5d0dSMischa Jonker 12a92a5d0dSMischa Jonker/ { 13a92a5d0dSMischa Jonker compatible = "snps,nsimosci"; 146eda477bSMischa Jonker clock-frequency = <20000000>; /* 20 MHZ */ 15a92a5d0dSMischa Jonker #address-cells = <1>; 16a92a5d0dSMischa Jonker #size-cells = <1>; 179ba7648cSVineet Gupta interrupt-parent = <&core_intc>; 18a92a5d0dSMischa Jonker 19a92a5d0dSMischa Jonker chosen { 2061fb4bfcSVineet Gupta /* this is for console on PGU */ 2161fb4bfcSVineet Gupta /* bootargs = "console=tty0 consoleblank=0"; */ 2261fb4bfcSVineet Gupta /* this is for console on serial */ 23e8ef060bSVineet Gupta bootargs = "earlycon=uart8250,mmio32,0xf0000000,115200n8 console=tty0 console=ttyS0,115200n8 consoleblank=0 debug"; 24a92a5d0dSMischa Jonker }; 25a92a5d0dSMischa Jonker 26a92a5d0dSMischa Jonker aliases { 27a92a5d0dSMischa Jonker serial0 = &uart0; 28a92a5d0dSMischa Jonker }; 29a92a5d0dSMischa Jonker 30a92a5d0dSMischa Jonker fpga { 31a92a5d0dSMischa Jonker compatible = "simple-bus"; 32a92a5d0dSMischa Jonker #address-cells = <1>; 33a92a5d0dSMischa Jonker #size-cells = <1>; 34a92a5d0dSMischa Jonker 35a92a5d0dSMischa Jonker /* child and parent address space 1:1 mapped */ 36a92a5d0dSMischa Jonker ranges; 37a92a5d0dSMischa Jonker 38b3d6aba8SVineet Gupta core_clk: core_clk { 39b3d6aba8SVineet Gupta #clock-cells = <0>; 40b3d6aba8SVineet Gupta compatible = "fixed-clock"; 41b3d6aba8SVineet Gupta clock-frequency = <20000000>; 42b3d6aba8SVineet Gupta }; 43b3d6aba8SVineet Gupta 449ba7648cSVineet Gupta core_intc: interrupt-controller { 45a92a5d0dSMischa Jonker compatible = "snps,arc700-intc"; 46a92a5d0dSMischa Jonker interrupt-controller; 47a92a5d0dSMischa Jonker #interrupt-cells = <1>; 48a92a5d0dSMischa Jonker }; 49a92a5d0dSMischa Jonker 50e8ef060bSVineet Gupta uart0: serial@f0000000 { 516eda477bSMischa Jonker compatible = "ns8250"; 52e8ef060bSVineet Gupta reg = <0xf0000000 0x2000>; 53a92a5d0dSMischa Jonker interrupts = <11>; 54a92a5d0dSMischa Jonker clock-frequency = <3686400>; 55a92a5d0dSMischa Jonker baud = <115200>; 56a92a5d0dSMischa Jonker reg-shift = <2>; 57a92a5d0dSMischa Jonker reg-io-width = <4>; 586eda477bSMischa Jonker no-loopback-test = <1>; 59a92a5d0dSMischa Jonker }; 60a92a5d0dSMischa Jonker 61e8ef060bSVineet Gupta pgu0: pgu@f9000000 { 62a92a5d0dSMischa Jonker compatible = "snps,arcpgufb"; 63e8ef060bSVineet Gupta reg = <0xf9000000 0x400>; 64a92a5d0dSMischa Jonker }; 65a92a5d0dSMischa Jonker 66e8ef060bSVineet Gupta ps2: ps2@f9001000 { 67a92a5d0dSMischa Jonker compatible = "snps,arc_ps2"; 68e8ef060bSVineet Gupta reg = <0xf9000400 0x14>; 69a92a5d0dSMischa Jonker interrupts = <13>; 70a92a5d0dSMischa Jonker interrupt-names = "arc_ps2_irq"; 71a92a5d0dSMischa Jonker }; 72a92a5d0dSMischa Jonker 73e8ef060bSVineet Gupta eth0: ethernet@f0003000 { 74df420fd6SLada Trimasova compatible = "ezchip,nps-mgt-enet"; 75e8ef060bSVineet Gupta reg = <0xf0003000 0x44>; 76df420fd6SLada Trimasova interrupts = <7>; 77a92a5d0dSMischa Jonker }; 78a92a5d0dSMischa Jonker }; 79a92a5d0dSMischa Jonker}; 80