1/* 2 * Copyright (C) 2013-15 Synopsys, Inc. (www.synopsys.com) 3 * 4 * This program is free software; you can redistribute it and/or modify 5 * it under the terms of the GNU General Public License version 2 as 6 * published by the Free Software Foundation. 7 */ 8 9/* 10 * Device tree for AXC001 770D/EM6/AS221 CPU card 11 * Note that this file only supports the 770D CPU 12 */ 13 14/include/ "skeleton.dtsi" 15 16/ { 17 compatible = "snps,arc"; 18 clock-frequency = <750000000>; /* 750 MHZ */ 19 #address-cells = <1>; 20 #size-cells = <1>; 21 22 cpu_card { 23 compatible = "simple-bus"; 24 #address-cells = <1>; 25 #size-cells = <1>; 26 27 ranges = <0x00000000 0xf0000000 0x10000000>; 28 29 core_clk: core_clk { 30 #clock-cells = <0>; 31 compatible = "fixed-clock"; 32 clock-frequency = <750000000>; 33 }; 34 35 core_intc: arc700-intc@cpu { 36 compatible = "snps,arc700-intc"; 37 interrupt-controller; 38 #interrupt-cells = <1>; 39 }; 40 41 /* 42 * this GPIO block ORs all interrupts on CPU card (creg,..) 43 * to uplink only 1 IRQ to ARC core intc 44 */ 45 dw-apb-gpio@0x2000 { 46 compatible = "snps,dw-apb-gpio"; 47 reg = < 0x2000 0x80 >; 48 #address-cells = <1>; 49 #size-cells = <0>; 50 51 ictl_intc: gpio-controller@0 { 52 compatible = "snps,dw-apb-gpio-port"; 53 gpio-controller; 54 #gpio-cells = <2>; 55 snps,nr-gpios = <30>; 56 reg = <0>; 57 interrupt-controller; 58 #interrupt-cells = <2>; 59 interrupt-parent = <&core_intc>; 60 interrupts = <15>; 61 }; 62 }; 63 64 debug_uart: dw-apb-uart@0x5000 { 65 compatible = "snps,dw-apb-uart"; 66 reg = <0x5000 0x100>; 67 clock-frequency = <33333000>; 68 interrupt-parent = <&ictl_intc>; 69 interrupts = <19 4>; 70 baud = <115200>; 71 reg-shift = <2>; 72 reg-io-width = <4>; 73 }; 74 75 arcpmu0: pmu { 76 compatible = "snps,arc700-pct"; 77 }; 78 }; 79 80 /* 81 * This INTC is actually connected to DW APB GPIO 82 * which acts as a wire between MB INTC and CPU INTC. 83 * GPIO INTC is configured in platform init code 84 * and here we mimic direct connection from MB INTC to 85 * CPU INTC, thus we set "interrupts = <7>" instead of 86 * "interrupts = <12>" 87 * 88 * This intc actually resides on MB, but we move it here to 89 * avoid duplicating the MB dtsi file given that IRQ from 90 * this intc to cpu intc are different for axs101 and axs103 91 */ 92 mb_intc: dw-apb-ictl@0xe0012000 { 93 #interrupt-cells = <1>; 94 compatible = "snps,dw-apb-ictl"; 95 reg = < 0xe0012000 0x200 >; 96 interrupt-controller; 97 interrupt-parent = <&core_intc>; 98 interrupts = < 7 >; 99 }; 100 101 memory { 102 #address-cells = <1>; 103 #size-cells = <1>; 104 ranges = <0x00000000 0x80000000 0x20000000>; 105 device_type = "memory"; 106 reg = <0x80000000 0x1b000000>; /* (512 - 32) MiB */ 107 }; 108 109 reserved-memory { 110 #address-cells = <1>; 111 #size-cells = <1>; 112 ranges; 113 /* 114 * We just move frame buffer area to the very end of 115 * available DDR. And even though in case of ARC770 there's 116 * no strict requirement for a frame-buffer to be in any 117 * particular location it allows us to use the same 118 * base board's DT node for ARC PGU as for ARc HS38. 119 */ 120 frame_buffer: frame_buffer@9e000000 { 121 compatible = "shared-dma-pool"; 122 reg = <0x9e000000 0x2000000>; 123 no-map; 124 }; 125 }; 126}; 127