1556cc1c5SAlexey Brodkin/* 2556cc1c5SAlexey Brodkin * Copyright (C) 2013-15 Synopsys, Inc. (www.synopsys.com) 3556cc1c5SAlexey Brodkin * 4556cc1c5SAlexey Brodkin * This program is free software; you can redistribute it and/or modify 5556cc1c5SAlexey Brodkin * it under the terms of the GNU General Public License version 2 as 6556cc1c5SAlexey Brodkin * published by the Free Software Foundation. 7556cc1c5SAlexey Brodkin */ 8556cc1c5SAlexey Brodkin 9556cc1c5SAlexey Brodkin/* 10556cc1c5SAlexey Brodkin * Device tree for AXC001 770D/EM6/AS221 CPU card 11556cc1c5SAlexey Brodkin * Note that this file only supports the 770D CPU 12556cc1c5SAlexey Brodkin */ 13556cc1c5SAlexey Brodkin 14556cc1c5SAlexey Brodkin/ { 15556cc1c5SAlexey Brodkin compatible = "snps,arc"; 16556cc1c5SAlexey Brodkin clock-frequency = <750000000>; /* 750 MHZ */ 17556cc1c5SAlexey Brodkin #address-cells = <1>; 18556cc1c5SAlexey Brodkin #size-cells = <1>; 19556cc1c5SAlexey Brodkin 20556cc1c5SAlexey Brodkin cpu_card { 21556cc1c5SAlexey Brodkin compatible = "simple-bus"; 22556cc1c5SAlexey Brodkin #address-cells = <1>; 23556cc1c5SAlexey Brodkin #size-cells = <1>; 24556cc1c5SAlexey Brodkin 25556cc1c5SAlexey Brodkin ranges = <0x00000000 0xf0000000 0x10000000>; 26556cc1c5SAlexey Brodkin 27556cc1c5SAlexey Brodkin cpu_intc: arc700-intc@cpu { 28556cc1c5SAlexey Brodkin compatible = "snps,arc700-intc"; 29556cc1c5SAlexey Brodkin interrupt-controller; 30556cc1c5SAlexey Brodkin #interrupt-cells = <1>; 31556cc1c5SAlexey Brodkin }; 32556cc1c5SAlexey Brodkin 33556cc1c5SAlexey Brodkin /* 34556cc1c5SAlexey Brodkin * this GPIO block ORs all interrupts on CPU card (creg,..) 35556cc1c5SAlexey Brodkin * to uplink only 1 IRQ to ARC core intc 36556cc1c5SAlexey Brodkin */ 37556cc1c5SAlexey Brodkin dw-apb-gpio@0x2000 { 38556cc1c5SAlexey Brodkin compatible = "snps,dw-apb-gpio"; 39556cc1c5SAlexey Brodkin reg = < 0x2000 0x80 >; 40556cc1c5SAlexey Brodkin #address-cells = <1>; 41556cc1c5SAlexey Brodkin #size-cells = <0>; 42556cc1c5SAlexey Brodkin 43556cc1c5SAlexey Brodkin ictl_intc: gpio-controller@0 { 44556cc1c5SAlexey Brodkin compatible = "snps,dw-apb-gpio-port"; 45556cc1c5SAlexey Brodkin gpio-controller; 46556cc1c5SAlexey Brodkin #gpio-cells = <2>; 47556cc1c5SAlexey Brodkin snps,nr-gpios = <30>; 48556cc1c5SAlexey Brodkin reg = <0>; 49556cc1c5SAlexey Brodkin interrupt-controller; 50556cc1c5SAlexey Brodkin #interrupt-cells = <2>; 51556cc1c5SAlexey Brodkin interrupt-parent = <&cpu_intc>; 52556cc1c5SAlexey Brodkin interrupts = <15>; 53556cc1c5SAlexey Brodkin }; 54556cc1c5SAlexey Brodkin }; 55556cc1c5SAlexey Brodkin 56556cc1c5SAlexey Brodkin debug_uart: dw-apb-uart@0x5000 { 57556cc1c5SAlexey Brodkin compatible = "snps,dw-apb-uart"; 58556cc1c5SAlexey Brodkin reg = <0x5000 0x100>; 59556cc1c5SAlexey Brodkin clock-frequency = <33333000>; 60556cc1c5SAlexey Brodkin interrupt-parent = <&ictl_intc>; 61556cc1c5SAlexey Brodkin interrupts = <19 4>; 62556cc1c5SAlexey Brodkin baud = <115200>; 63556cc1c5SAlexey Brodkin reg-shift = <2>; 64556cc1c5SAlexey Brodkin reg-io-width = <4>; 65556cc1c5SAlexey Brodkin }; 66556cc1c5SAlexey Brodkin 67556cc1c5SAlexey Brodkin arcpmu0: pmu { 68556cc1c5SAlexey Brodkin compatible = "snps,arc700-pct"; 69556cc1c5SAlexey Brodkin }; 70556cc1c5SAlexey Brodkin }; 71556cc1c5SAlexey Brodkin 72e0183f52SAlexey Brodkin /* 73e0183f52SAlexey Brodkin * This INTC is actually connected to DW APB GPIO 74e0183f52SAlexey Brodkin * which acts as a wire between MB INTC and CPU INTC. 75e0183f52SAlexey Brodkin * GPIO INTC is configured in platform init code 76e0183f52SAlexey Brodkin * and here we mimic direct connection from MB INTC to 77e0183f52SAlexey Brodkin * CPU INTC, thus we set "interrupts = <7>" instead of 78e0183f52SAlexey Brodkin * "interrupts = <12>" 79e0183f52SAlexey Brodkin * 80e0183f52SAlexey Brodkin * This intc actually resides on MB, but we move it here to 81e0183f52SAlexey Brodkin * avoid duplicating the MB dtsi file given that IRQ from 82e0183f52SAlexey Brodkin * this intc to cpu intc are different for axs101 and axs103 83e0183f52SAlexey Brodkin */ 84e0183f52SAlexey Brodkin mb_intc: dw-apb-ictl@0xe0012000 { 85e0183f52SAlexey Brodkin #interrupt-cells = <1>; 86e0183f52SAlexey Brodkin compatible = "snps,dw-apb-ictl"; 87e0183f52SAlexey Brodkin reg = < 0xe0012000 0x200 >; 88e0183f52SAlexey Brodkin interrupt-controller; 89e0183f52SAlexey Brodkin interrupt-parent = <&cpu_intc>; 90e0183f52SAlexey Brodkin interrupts = < 7 >; 91e0183f52SAlexey Brodkin }; 92e0183f52SAlexey Brodkin 93556cc1c5SAlexey Brodkin memory { 94556cc1c5SAlexey Brodkin #address-cells = <1>; 95556cc1c5SAlexey Brodkin #size-cells = <1>; 96556cc1c5SAlexey Brodkin ranges = <0x00000000 0x80000000 0x40000000>; 97556cc1c5SAlexey Brodkin device_type = "memory"; 98556cc1c5SAlexey Brodkin reg = <0x00000000 0x20000000>; /* 512MiB */ 99556cc1c5SAlexey Brodkin }; 100556cc1c5SAlexey Brodkin}; 101