1556cc1c5SAlexey Brodkin/* 2556cc1c5SAlexey Brodkin * Copyright (C) 2013-15 Synopsys, Inc. (www.synopsys.com) 3556cc1c5SAlexey Brodkin * 4556cc1c5SAlexey Brodkin * This program is free software; you can redistribute it and/or modify 5556cc1c5SAlexey Brodkin * it under the terms of the GNU General Public License version 2 as 6556cc1c5SAlexey Brodkin * published by the Free Software Foundation. 7556cc1c5SAlexey Brodkin */ 8556cc1c5SAlexey Brodkin 9556cc1c5SAlexey Brodkin/* 10556cc1c5SAlexey Brodkin * Device tree for AXC001 770D/EM6/AS221 CPU card 11556cc1c5SAlexey Brodkin * Note that this file only supports the 770D CPU 12556cc1c5SAlexey Brodkin */ 13556cc1c5SAlexey Brodkin 142e8cd938SVineet Gupta/include/ "skeleton.dtsi" 152e8cd938SVineet Gupta 16556cc1c5SAlexey Brodkin/ { 17556cc1c5SAlexey Brodkin compatible = "snps,arc"; 18556cc1c5SAlexey Brodkin clock-frequency = <750000000>; /* 750 MHZ */ 19556cc1c5SAlexey Brodkin #address-cells = <1>; 20556cc1c5SAlexey Brodkin #size-cells = <1>; 21556cc1c5SAlexey Brodkin 22556cc1c5SAlexey Brodkin cpu_card { 23556cc1c5SAlexey Brodkin compatible = "simple-bus"; 24556cc1c5SAlexey Brodkin #address-cells = <1>; 25556cc1c5SAlexey Brodkin #size-cells = <1>; 26556cc1c5SAlexey Brodkin 27556cc1c5SAlexey Brodkin ranges = <0x00000000 0xf0000000 0x10000000>; 28556cc1c5SAlexey Brodkin 299ba7648cSVineet Gupta core_intc: arc700-intc@cpu { 30556cc1c5SAlexey Brodkin compatible = "snps,arc700-intc"; 31556cc1c5SAlexey Brodkin interrupt-controller; 32556cc1c5SAlexey Brodkin #interrupt-cells = <1>; 33556cc1c5SAlexey Brodkin }; 34556cc1c5SAlexey Brodkin 35556cc1c5SAlexey Brodkin /* 36556cc1c5SAlexey Brodkin * this GPIO block ORs all interrupts on CPU card (creg,..) 37556cc1c5SAlexey Brodkin * to uplink only 1 IRQ to ARC core intc 38556cc1c5SAlexey Brodkin */ 39556cc1c5SAlexey Brodkin dw-apb-gpio@0x2000 { 40556cc1c5SAlexey Brodkin compatible = "snps,dw-apb-gpio"; 41556cc1c5SAlexey Brodkin reg = < 0x2000 0x80 >; 42556cc1c5SAlexey Brodkin #address-cells = <1>; 43556cc1c5SAlexey Brodkin #size-cells = <0>; 44556cc1c5SAlexey Brodkin 45556cc1c5SAlexey Brodkin ictl_intc: gpio-controller@0 { 46556cc1c5SAlexey Brodkin compatible = "snps,dw-apb-gpio-port"; 47556cc1c5SAlexey Brodkin gpio-controller; 48556cc1c5SAlexey Brodkin #gpio-cells = <2>; 49556cc1c5SAlexey Brodkin snps,nr-gpios = <30>; 50556cc1c5SAlexey Brodkin reg = <0>; 51556cc1c5SAlexey Brodkin interrupt-controller; 52556cc1c5SAlexey Brodkin #interrupt-cells = <2>; 539ba7648cSVineet Gupta interrupt-parent = <&core_intc>; 54556cc1c5SAlexey Brodkin interrupts = <15>; 55556cc1c5SAlexey Brodkin }; 56556cc1c5SAlexey Brodkin }; 57556cc1c5SAlexey Brodkin 58556cc1c5SAlexey Brodkin debug_uart: dw-apb-uart@0x5000 { 59556cc1c5SAlexey Brodkin compatible = "snps,dw-apb-uart"; 60556cc1c5SAlexey Brodkin reg = <0x5000 0x100>; 61556cc1c5SAlexey Brodkin clock-frequency = <33333000>; 62556cc1c5SAlexey Brodkin interrupt-parent = <&ictl_intc>; 63556cc1c5SAlexey Brodkin interrupts = <19 4>; 64556cc1c5SAlexey Brodkin baud = <115200>; 65556cc1c5SAlexey Brodkin reg-shift = <2>; 66556cc1c5SAlexey Brodkin reg-io-width = <4>; 67556cc1c5SAlexey Brodkin }; 68556cc1c5SAlexey Brodkin 69556cc1c5SAlexey Brodkin arcpmu0: pmu { 70556cc1c5SAlexey Brodkin compatible = "snps,arc700-pct"; 71556cc1c5SAlexey Brodkin }; 72556cc1c5SAlexey Brodkin }; 73556cc1c5SAlexey Brodkin 74e0183f52SAlexey Brodkin /* 75e0183f52SAlexey Brodkin * This INTC is actually connected to DW APB GPIO 76e0183f52SAlexey Brodkin * which acts as a wire between MB INTC and CPU INTC. 77e0183f52SAlexey Brodkin * GPIO INTC is configured in platform init code 78e0183f52SAlexey Brodkin * and here we mimic direct connection from MB INTC to 79e0183f52SAlexey Brodkin * CPU INTC, thus we set "interrupts = <7>" instead of 80e0183f52SAlexey Brodkin * "interrupts = <12>" 81e0183f52SAlexey Brodkin * 82e0183f52SAlexey Brodkin * This intc actually resides on MB, but we move it here to 83e0183f52SAlexey Brodkin * avoid duplicating the MB dtsi file given that IRQ from 84e0183f52SAlexey Brodkin * this intc to cpu intc are different for axs101 and axs103 85e0183f52SAlexey Brodkin */ 86e0183f52SAlexey Brodkin mb_intc: dw-apb-ictl@0xe0012000 { 87e0183f52SAlexey Brodkin #interrupt-cells = <1>; 88e0183f52SAlexey Brodkin compatible = "snps,dw-apb-ictl"; 89e0183f52SAlexey Brodkin reg = < 0xe0012000 0x200 >; 90e0183f52SAlexey Brodkin interrupt-controller; 919ba7648cSVineet Gupta interrupt-parent = <&core_intc>; 92e0183f52SAlexey Brodkin interrupts = < 7 >; 93e0183f52SAlexey Brodkin }; 94e0183f52SAlexey Brodkin 95556cc1c5SAlexey Brodkin memory { 96556cc1c5SAlexey Brodkin #address-cells = <1>; 97556cc1c5SAlexey Brodkin #size-cells = <1>; 98556cc1c5SAlexey Brodkin ranges = <0x00000000 0x80000000 0x40000000>; 99556cc1c5SAlexey Brodkin device_type = "memory"; 100f759ee57SVineet Gupta reg = <0x80000000 0x20000000>; /* 512MiB */ 101556cc1c5SAlexey Brodkin }; 102556cc1c5SAlexey Brodkin}; 103