1/* 2 * Abilis Systems TB10X SOC device tree 3 * 4 * Copyright (C) Abilis Systems 2013 5 * 6 * Author: Christian Ruppert <christian.ruppert@abilis.com> 7 * 8 * This program is free software; you can redistribute it and/or modify 9 * it under the terms of the GNU General Public License version 2 as 10 * published by the Free Software Foundation. 11 * 12 * This program is distributed in the hope that it will be useful, 13 * but WITHOUT ANY WARRANTY; without even the implied warranty of 14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 15 * GNU General Public License for more details. 16 * 17 * You should have received a copy of the GNU General Public License 18 * along with this program; if not, write to the Free Software 19 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA 20 */ 21 22 23/ { 24 compatible = "abilis,arc-tb10x"; 25 #address-cells = <1>; 26 #size-cells = <1>; 27 28 cpus { 29 #address-cells = <1>; 30 #size-cells = <0>; 31 cpu@0 { 32 device_type = "cpu"; 33 compatible = "snps,arc770d"; 34 reg = <0>; 35 }; 36 }; 37 38 /* TIMER0 with interrupt for clockevent */ 39 timer0 { 40 compatible = "snps,arc-timer"; 41 interrupts = <3>; 42 interrupt-parent = <&intc>; 43 clocks = <&cpu_clk>; 44 }; 45 46 /* TIMER1 for free running clocksource */ 47 timer1 { 48 compatible = "snps,arc-timer"; 49 clocks = <&cpu_clk>; 50 }; 51 52 soc100 { 53 #address-cells = <1>; 54 #size-cells = <1>; 55 device_type = "soc"; 56 ranges = <0xfe000000 0xfe000000 0x02000000 57 0x000F0000 0x000F0000 0x00010000>; 58 compatible = "abilis,tb10x", "simple-bus"; 59 60 pll0: oscillator { 61 compatible = "fixed-clock"; 62 #clock-cells = <0>; 63 clock-output-names = "pll0"; 64 }; 65 cpu_clk: clkdiv_cpu { 66 compatible = "fixed-factor-clock"; 67 #clock-cells = <0>; 68 clocks = <&pll0>; 69 clock-output-names = "cpu_clk"; 70 }; 71 ahb_clk: clkdiv_ahb { 72 compatible = "fixed-factor-clock"; 73 #clock-cells = <0>; 74 clocks = <&pll0>; 75 clock-output-names = "ahb_clk"; 76 }; 77 78 iomux: iomux@FF10601c { 79 compatible = "abilis,tb10x-iomux"; 80 #gpio-range-cells = <3>; 81 reg = <0xFF10601c 0x4>; 82 }; 83 84 intc: interrupt-controller { 85 compatible = "snps,arc700-intc"; 86 interrupt-controller; 87 #interrupt-cells = <1>; 88 }; 89 tb10x_ictl: pic@fe002000 { 90 compatible = "abilis,tb10x-ictl"; 91 reg = <0xFE002000 0x20>; 92 interrupt-controller; 93 #interrupt-cells = <2>; 94 interrupt-parent = <&intc>; 95 interrupts = <5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 96 20 21 22 23 24 25 26 27 28 29 30 31>; 97 }; 98 99 uart@FF100000 { 100 compatible = "snps,dw-apb-uart"; 101 reg = <0xFF100000 0x100>; 102 clock-frequency = <166666666>; 103 interrupts = <25 8>; 104 reg-shift = <2>; 105 reg-io-width = <4>; 106 interrupt-parent = <&tb10x_ictl>; 107 }; 108 ethernet@FE100000 { 109 compatible = "snps,dwmac-3.70a","snps,dwmac"; 110 reg = <0xFE100000 0x1058>; 111 interrupt-parent = <&tb10x_ictl>; 112 interrupts = <6 8>; 113 interrupt-names = "macirq"; 114 clocks = <&ahb_clk>; 115 clock-names = "stmmaceth"; 116 }; 117 dma@FE000000 { 118 compatible = "snps,dma-spear1340"; 119 reg = <0xFE000000 0x400>; 120 interrupt-parent = <&tb10x_ictl>; 121 interrupts = <14 8>; 122 dma-channels = <6>; 123 dma-requests = <0>; 124 dma-masters = <1>; 125 #dma-cells = <3>; 126 chan_allocation_order = <0>; 127 chan_priority = <1>; 128 block_size = <0x7ff>; 129 data_width = <2>; 130 clocks = <&ahb_clk>; 131 clock-names = "hclk"; 132 }; 133 134 i2c0: i2c@FF120000 { 135 #address-cells = <1>; 136 #size-cells = <0>; 137 compatible = "snps,designware-i2c"; 138 reg = <0xFF120000 0x1000>; 139 interrupt-parent = <&tb10x_ictl>; 140 interrupts = <12 8>; 141 clocks = <&ahb_clk>; 142 }; 143 i2c1: i2c@FF121000 { 144 #address-cells = <1>; 145 #size-cells = <0>; 146 compatible = "snps,designware-i2c"; 147 reg = <0xFF121000 0x1000>; 148 interrupt-parent = <&tb10x_ictl>; 149 interrupts = <12 8>; 150 clocks = <&ahb_clk>; 151 }; 152 i2c2: i2c@FF122000 { 153 #address-cells = <1>; 154 #size-cells = <0>; 155 compatible = "snps,designware-i2c"; 156 reg = <0xFF122000 0x1000>; 157 interrupt-parent = <&tb10x_ictl>; 158 interrupts = <12 8>; 159 clocks = <&ahb_clk>; 160 }; 161 i2c3: i2c@FF123000 { 162 #address-cells = <1>; 163 #size-cells = <0>; 164 compatible = "snps,designware-i2c"; 165 reg = <0xFF123000 0x1000>; 166 interrupt-parent = <&tb10x_ictl>; 167 interrupts = <12 8>; 168 clocks = <&ahb_clk>; 169 }; 170 i2c4: i2c@FF124000 { 171 #address-cells = <1>; 172 #size-cells = <0>; 173 compatible = "snps,designware-i2c"; 174 reg = <0xFF124000 0x1000>; 175 interrupt-parent = <&tb10x_ictl>; 176 interrupts = <12 8>; 177 clocks = <&ahb_clk>; 178 }; 179 180 spi0: spi@0xFE010000 { 181 #address-cells = <1>; 182 #size-cells = <0>; 183 cell-index = <0>; 184 compatible = "abilis,tb100-spi"; 185 num-cs = <1>; 186 reg = <0xFE010000 0x20>; 187 interrupt-parent = <&tb10x_ictl>; 188 interrupts = <26 8>; 189 clocks = <&ahb_clk>; 190 }; 191 spi1: spi@0xFE011000 { 192 #address-cells = <1>; 193 #size-cells = <0>; 194 cell-index = <1>; 195 compatible = "abilis,tb100-spi"; 196 num-cs = <2>; 197 reg = <0xFE011000 0x20>; 198 interrupt-parent = <&tb10x_ictl>; 199 interrupts = <10 8>; 200 clocks = <&ahb_clk>; 201 }; 202 203 tb10x_tsm: tb10x-tsm@ff316000 { 204 compatible = "abilis,tb100-tsm"; 205 reg = <0xff316000 0x400>; 206 interrupt-parent = <&tb10x_ictl>; 207 interrupts = <17 8>; 208 output-clkdiv = <4>; 209 global-packet-delay = <0x21>; 210 port-packet-delay = <0>; 211 }; 212 tb10x_stream_proc: tb10x-stream-proc { 213 compatible = "abilis,tb100-streamproc"; 214 reg = <0xfff00000 0x200>, 215 <0x000f0000 0x10000>, 216 <0xfff00200 0x105>, 217 <0xff10600c 0x1>, 218 <0xfe001018 0x1>; 219 reg-names = "mbox", 220 "sp_iccm", 221 "mbox_irq", 222 "cpuctrl", 223 "a6it_int_force"; 224 interrupt-parent = <&tb10x_ictl>; 225 interrupts = <20 2>, <19 2>; 226 interrupt-names = "cmd_irq", "event_irq"; 227 }; 228 tb10x_mdsc0: tb10x-mdscr@FF300000 { 229 compatible = "abilis,tb100-mdscr"; 230 reg = <0xFF300000 0x7000>; 231 tb100-mdscr-manage-tsin; 232 }; 233 tb10x_mscr0: tb10x-mdscr@FF307000 { 234 compatible = "abilis,tb100-mdscr"; 235 reg = <0xFF307000 0x7000>; 236 }; 237 tb10x_scr0: tb10x-mdscr@ff30e000 { 238 compatible = "abilis,tb100-mdscr"; 239 reg = <0xFF30e000 0x4000>; 240 tb100-mdscr-manage-tsin; 241 }; 242 tb10x_scr1: tb10x-mdscr@ff312000 { 243 compatible = "abilis,tb100-mdscr"; 244 reg = <0xFF312000 0x4000>; 245 tb100-mdscr-manage-tsin; 246 }; 247 tb10x_wfb: tb10x-wfb@ff319000 { 248 compatible = "abilis,tb100-wfb"; 249 reg = <0xff319000 0x1000>; 250 interrupt-parent = <&tb10x_ictl>; 251 interrupts = <16 8>; 252 }; 253 }; 254}; 255