1/*
2 * Abilis Systems TB101 SOC device tree
3 *
4 * Copyright (C) Abilis Systems 2013
5 *
6 * Author: Christian Ruppert <christian.ruppert@abilis.com>
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11 *
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
15 * GNU General Public License for more details.
16 *
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307 USA
20 */
21
22/include/ "abilis_tb10x.dtsi"
23
24
25/ {
26	clock-frequency		= <500000000>;	/* 500 MHZ */
27
28	soc100 {
29		bus-frequency	= <166666666>;
30
31		pll0: oscillator {
32			clock-frequency  = <1000000000>;
33		};
34		cpu_clk: clkdiv_cpu {
35			clock-mult = <1>;
36			clock-div = <2>;
37		};
38		ahb_clk: clkdiv_ahb {
39			clock-mult = <1>;
40			clock-div = <6>;
41		};
42
43		iomux: iomux@FF10601c {
44			/* Port 1 */
45			pctl_tsin_s0: pctl-tsin-s0 {   /* Serial TS-in 0 */
46				pingrp = "mis0_pins";
47			};
48			pctl_tsin_s1: pctl-tsin-s1 {   /* Serial TS-in 1 */
49				pingrp = "mis1_pins";
50			};
51			pctl_gpio_a: pctl-gpio-a {     /* GPIO bank A */
52				pingrp = "gpioa_pins";
53			};
54			pctl_tsin_p1: pctl-tsin-p1 {   /* Parallel TS-in 1 */
55				pingrp = "mip1_pins";
56			};
57			/* Port 2 */
58			pctl_tsin_s2: pctl-tsin-s2 {   /* Serial TS-in 2 */
59				pingrp = "mis2_pins";
60			};
61			pctl_tsin_s3: pctl-tsin-s3 {   /* Serial TS-in 3 */
62				pingrp = "mis3_pins";
63			};
64			pctl_gpio_c: pctl-gpio-c {     /* GPIO bank C */
65				pingrp = "gpioc_pins";
66			};
67			pctl_tsin_p3: pctl-tsin-p3 {   /* Parallel TS-in 3 */
68				pingrp = "mip3_pins";
69			};
70			/* Port 3 */
71			pctl_tsin_s4: pctl-tsin-s4 {   /* Serial TS-in 4 */
72				pingrp = "mis4_pins";
73			};
74			pctl_tsin_s5: pctl-tsin-s5 {   /* Serial TS-in 5 */
75				pingrp = "mis5_pins";
76			};
77			pctl_gpio_e: pctl-gpio-e {     /* GPIO bank E */
78				pingrp = "gpioe_pins";
79			};
80			pctl_tsin_p5: pctl-tsin-p5 {   /* Parallel TS-in 5 */
81				pingrp = "mip5_pins";
82			};
83			/* Port 4 */
84			pctl_tsin_s6: pctl-tsin-s6 {   /* Serial TS-in 6 */
85				pingrp = "mis6_pins";
86			};
87			pctl_tsin_s7: pctl-tsin-s7 {   /* Serial TS-in 7 */
88				pingrp = "mis7_pins";
89			};
90			pctl_gpio_g: pctl-gpio-g {     /* GPIO bank G */
91				pingrp = "gpiog_pins";
92			};
93			pctl_tsin_p7: pctl-tsin-p7 {   /* Parallel TS-in 7 */
94				pingrp = "mip7_pins";
95			};
96			/* Port 5 */
97			pctl_gpio_j: pctl-gpio-j {     /* GPIO bank J */
98				pingrp = "gpioj_pins";
99			};
100			pctl_gpio_k: pctl-gpio-k {     /* GPIO bank K */
101				pingrp = "gpiok_pins";
102			};
103			pctl_ciplus: pctl-ciplus {     /* CI+ interface */
104				pingrp = "ciplus_pins";
105			};
106			pctl_mcard: pctl-mcard {       /* M-Card interface */
107				pingrp = "mcard_pins";
108			};
109			pctl_stc0: pctl-stc0 {         /* Smart card I/F 0 */
110				pingrp = "stc0_pins";
111			};
112			pctl_stc1: pctl-stc1 {         /* Smart card I/F 1 */
113				pingrp = "stc1_pins";
114			};
115			/* Port 6 */
116			pctl_tsout_p: pctl-tsout-p {   /* Parallel TS-out */
117				pingrp = "mop_pins";
118			};
119			pctl_tsout_s0: pctl-tsout-s0 { /* Serial TS-out 0 */
120				pingrp = "mos0_pins";
121			};
122			pctl_tsout_s1: pctl-tsout-s1 { /* Serial TS-out 1 */
123				pingrp = "mos1_pins";
124			};
125			pctl_tsout_s2: pctl-tsout-s2 { /* Serial TS-out 2 */
126				pingrp = "mos2_pins";
127			};
128			pctl_tsout_s3: pctl-tsout-s3 { /* Serial TS-out 3 */
129				pingrp = "mos3_pins";
130			};
131			/* Port 7 */
132			pctl_uart0: pctl-uart0 {       /* UART 0 */
133				pingrp = "uart0_pins";
134			};
135			pctl_uart1: pctl-uart1 {       /* UART 1 */
136				pingrp = "uart1_pins";
137			};
138			pctl_gpio_l: pctl-gpio-l {     /* GPIO bank L */
139				pingrp = "gpiol_pins";
140			};
141			pctl_gpio_m: pctl-gpio-m {     /* GPIO bank M */
142				pingrp = "gpiom_pins";
143			};
144			/* Port 8 */
145			pctl_spi3: pctl-spi3 {
146				pingrp = "spi3_pins";
147			};
148			pctl_jtag: pctl-jtag {
149				pingrp = "jtag_pins";
150			};
151			/* Port 9 */
152			pctl_spi1: pctl-spi1 {
153				pingrp = "spi1_pins";
154			};
155			pctl_gpio_n: pctl-gpio-n {
156				pingrp = "gpion_pins";
157			};
158			/* Unmuxed GPIOs */
159			pctl_gpio_b: pctl-gpio-b {
160				pingrp = "gpiob_pins";
161			};
162			pctl_gpio_d: pctl-gpio-d {
163				pingrp = "gpiod_pins";
164			};
165			pctl_gpio_f: pctl-gpio-f {
166				pingrp = "gpiof_pins";
167			};
168			pctl_gpio_h: pctl-gpio-h {
169				pingrp = "gpioh_pins";
170			};
171			pctl_gpio_i: pctl-gpio-i {
172				pingrp = "gpioi_pins";
173			};
174		};
175
176		gpioa: gpio@FF140000 {
177			compatible = "abilis,tb10x-gpio";
178			interrupt-controller;
179			#interrupt-cells = <1>;
180			interrupt-parent = <&tb10x_ictl>;
181			interrupts = <27 2>;
182			reg = <0xFF140000 0x1000>;
183			gpio-controller;
184			#gpio-cells = <1>;
185			gpio-base  = <0>;
186			gpio-pins = <&pctl_gpio_a>;
187		};
188		gpiob: gpio@FF141000 {
189			compatible = "abilis,tb10x-gpio";
190			interrupt-controller;
191			#interrupt-cells = <1>;
192			interrupt-parent = <&tb10x_ictl>;
193			interrupts = <27 2>;
194			reg = <0xFF141000 0x1000>;
195			gpio-controller;
196			#gpio-cells = <1>;
197			gpio-base  = <3>;
198			gpio-pins = <&pctl_gpio_b>;
199		};
200		gpioc: gpio@FF142000 {
201			compatible = "abilis,tb10x-gpio";
202			interrupt-controller;
203			#interrupt-cells = <1>;
204			interrupt-parent = <&tb10x_ictl>;
205			interrupts = <27 2>;
206			reg = <0xFF142000 0x1000>;
207			gpio-controller;
208			#gpio-cells = <1>;
209			gpio-base  = <5>;
210			gpio-pins = <&pctl_gpio_c>;
211		};
212		gpiod: gpio@FF143000 {
213			compatible = "abilis,tb10x-gpio";
214			interrupt-controller;
215			#interrupt-cells = <1>;
216			interrupt-parent = <&tb10x_ictl>;
217			interrupts = <27 2>;
218			reg = <0xFF143000 0x1000>;
219			gpio-controller;
220			#gpio-cells = <1>;
221			gpio-base  = <8>;
222			gpio-pins = <&pctl_gpio_d>;
223		};
224		gpioe: gpio@FF144000 {
225			compatible = "abilis,tb10x-gpio";
226			interrupt-controller;
227			#interrupt-cells = <1>;
228			interrupt-parent = <&tb10x_ictl>;
229			interrupts = <27 2>;
230			reg = <0xFF144000 0x1000>;
231			gpio-controller;
232			#gpio-cells = <1>;
233			gpio-base  = <10>;
234			gpio-pins = <&pctl_gpio_e>;
235		};
236		gpiof: gpio@FF145000 {
237			compatible = "abilis,tb10x-gpio";
238			interrupt-controller;
239			#interrupt-cells = <1>;
240			interrupt-parent = <&tb10x_ictl>;
241			interrupts = <27 2>;
242			reg = <0xFF145000 0x1000>;
243			gpio-controller;
244			#gpio-cells = <1>;
245			gpio-base  = <13>;
246			gpio-pins = <&pctl_gpio_f>;
247		};
248		gpiog: gpio@FF146000 {
249			compatible = "abilis,tb10x-gpio";
250			interrupt-controller;
251			#interrupt-cells = <1>;
252			interrupt-parent = <&tb10x_ictl>;
253			interrupts = <27 2>;
254			reg = <0xFF146000 0x1000>;
255			gpio-controller;
256			#gpio-cells = <1>;
257			gpio-base  = <15>;
258			gpio-pins = <&pctl_gpio_g>;
259		};
260		gpioh: gpio@FF147000 {
261			compatible = "abilis,tb10x-gpio";
262			interrupt-controller;
263			#interrupt-cells = <1>;
264			interrupt-parent = <&tb10x_ictl>;
265			interrupts = <27 2>;
266			reg = <0xFF147000 0x1000>;
267			gpio-controller;
268			#gpio-cells = <1>;
269			gpio-base  = <18>;
270			gpio-pins = <&pctl_gpio_h>;
271		};
272		gpioi: gpio@FF148000 {
273			compatible = "abilis,tb10x-gpio";
274			interrupt-controller;
275			#interrupt-cells = <1>;
276			interrupt-parent = <&tb10x_ictl>;
277			interrupts = <27 2>;
278			reg = <0xFF148000 0x1000>;
279			gpio-controller;
280			#gpio-cells = <1>;
281			gpio-base  = <20>;
282			gpio-pins = <&pctl_gpio_i>;
283		};
284		gpioj: gpio@FF149000 {
285			compatible = "abilis,tb10x-gpio";
286			interrupt-controller;
287			#interrupt-cells = <1>;
288			interrupt-parent = <&tb10x_ictl>;
289			interrupts = <27 2>;
290			reg = <0xFF149000 0x1000>;
291			gpio-controller;
292			#gpio-cells = <1>;
293			gpio-base  = <32>;
294			gpio-pins = <&pctl_gpio_j>;
295		};
296		gpiok: gpio@FF14a000 {
297			compatible = "abilis,tb10x-gpio";
298			interrupt-controller;
299			#interrupt-cells = <1>;
300			interrupt-parent = <&tb10x_ictl>;
301			interrupts = <27 2>;
302			reg = <0xFF14A000 0x1000>;
303			gpio-controller;
304			#gpio-cells = <1>;
305			gpio-base  = <64>;
306			gpio-pins = <&pctl_gpio_k>;
307		};
308		gpiol: gpio@FF14b000 {
309			compatible = "abilis,tb10x-gpio";
310			interrupt-controller;
311			#interrupt-cells = <1>;
312			interrupt-parent = <&tb10x_ictl>;
313			interrupts = <27 2>;
314			reg = <0xFF14B000 0x1000>;
315			gpio-controller;
316			#gpio-cells = <1>;
317			gpio-base  = <86>;
318			gpio-pins = <&pctl_gpio_l>;
319		};
320		gpiom: gpio@FF14c000 {
321			compatible = "abilis,tb10x-gpio";
322			interrupt-controller;
323			#interrupt-cells = <1>;
324			interrupt-parent = <&tb10x_ictl>;
325			interrupts = <27 2>;
326			reg = <0xFF14C000 0x1000>;
327			gpio-controller;
328			#gpio-cells = <1>;
329			gpio-base  = <90>;
330			gpio-pins = <&pctl_gpio_m>;
331		};
332		gpion: gpio@FF14d000 {
333			compatible = "abilis,tb10x-gpio";
334			interrupt-controller;
335			#interrupt-cells = <1>;
336			interrupt-parent = <&tb10x_ictl>;
337			interrupts = <27 2>;
338			reg = <0xFF14D000 0x1000>;
339			gpio-controller;
340			#gpio-cells = <1>;
341			gpio-base  = <94>;
342			gpio-pins = <&pctl_gpio_n>;
343		};
344	};
345};
346