1/*
2 * Abilis Systems TB100 SOC device tree
3 *
4 * Copyright (C) Abilis Systems 2013
5 *
6 * Author: Christian Ruppert <christian.ruppert@abilis.com>
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11 *
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
15 * GNU General Public License for more details.
16 *
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307 USA
20 */
21
22/include/ "abilis_tb10x.dtsi"
23
24
25/ {
26	clock-frequency		= <500000000>;	/* 500 MHZ */
27
28	soc100 {
29		bus-frequency	= <166666666>;
30
31		pll0: oscillator {
32			clock-frequency  = <1000000000>;
33		};
34		cpu_clk: clkdiv_cpu {
35			clock-mult = <1>;
36			clock-div = <2>;
37		};
38		ahb_clk: clkdiv_ahb {
39			clock-mult = <1>;
40			clock-div = <6>;
41		};
42
43		iomux: iomux@FF10601c {
44			/* Port 1 */
45			pctl_tsin_s0: pctl-tsin-s0 {   /* Serial TS-in 0 */
46				pingrp = "mis0_pins";
47			};
48			pctl_tsin_s1: pctl-tsin-s1 {   /* Serial TS-in 1 */
49				pingrp = "mis1_pins";
50			};
51			pctl_gpio_a: pctl-gpio-a {     /* GPIO bank A */
52				pingrp = "gpioa_pins";
53			};
54			pctl_tsin_p1: pctl-tsin-p1 {   /* Parallel TS-in 1 */
55				pingrp = "mip1_pins";
56			};
57			/* Port 2 */
58			pctl_tsin_s2: pctl-tsin-s2 {   /* Serial TS-in 2 */
59				pingrp = "mis2_pins";
60			};
61			pctl_tsin_s3: pctl-tsin-s3 {   /* Serial TS-in 3 */
62				pingrp = "mis3_pins";
63			};
64			pctl_gpio_c: pctl-gpio-c {     /* GPIO bank C */
65				pingrp = "gpioc_pins";
66			};
67			pctl_tsin_p3: pctl-tsin-p3 {   /* Parallel TS-in 3 */
68				pingrp = "mip3_pins";
69			};
70			/* Port 3 */
71			pctl_tsin_s4: pctl-tsin-s4 {   /* Serial TS-in 4 */
72				pingrp = "mis4_pins";
73			};
74			pctl_tsin_s5: pctl-tsin-s5 {   /* Serial TS-in 5 */
75				pingrp = "mis5_pins";
76			};
77			pctl_gpio_e: pctl-gpio-e {     /* GPIO bank E */
78				pingrp = "gpioe_pins";
79			};
80			pctl_tsin_p5: pctl-tsin-p5 {   /* Parallel TS-in 5 */
81				pingrp = "mip5_pins";
82			};
83			/* Port 4 */
84			pctl_tsin_s6: pctl-tsin-s6 {   /* Serial TS-in 6 */
85				pingrp = "mis6_pins";
86			};
87			pctl_tsin_s7: pctl-tsin-s7 {   /* Serial TS-in 7 */
88				pingrp = "mis7_pins";
89			};
90			pctl_gpio_g: pctl-gpio-g {     /* GPIO bank G */
91				pingrp = "gpiog_pins";
92			};
93			pctl_tsin_p7: pctl-tsin-p7 {   /* Parallel TS-in 7 */
94				pingrp = "mip7_pins";
95			};
96			/* Port 5 */
97			pctl_gpio_j: pctl-gpio-j {     /* GPIO bank J */
98				pingrp = "gpioj_pins";
99			};
100			pctl_gpio_k: pctl-gpio-k {     /* GPIO bank K */
101				pingrp = "gpiok_pins";
102			};
103			pctl_ciplus: pctl-ciplus {     /* CI+ interface */
104				pingrp = "ciplus_pins";
105			};
106			pctl_mcard: pctl-mcard {       /* M-Card interface */
107				pingrp = "mcard_pins";
108			};
109			/* Port 6 */
110			pctl_tsout_p: pctl-tsout-p {   /* Parallel TS-out */
111				pingrp = "mop_pins";
112			};
113			pctl_tsout_s0: pctl-tsout-s0 { /* Serial TS-out 0 */
114				pingrp = "mos0_pins";
115			};
116			pctl_tsout_s1: pctl-tsout-s1 { /* Serial TS-out 1 */
117				pingrp = "mos1_pins";
118			};
119			pctl_tsout_s2: pctl-tsout-s2 { /* Serial TS-out 2 */
120				pingrp = "mos2_pins";
121			};
122			pctl_tsout_s3: pctl-tsout-s3 { /* Serial TS-out 3 */
123				pingrp = "mos3_pins";
124			};
125			/* Port 7 */
126			pctl_uart0: pctl-uart0 {       /* UART 0 */
127				pingrp = "uart0_pins";
128			};
129			pctl_uart1: pctl-uart1 {       /* UART 1 */
130				pingrp = "uart1_pins";
131			};
132			pctl_gpio_l: pctl-gpio-l {     /* GPIO bank L */
133				pingrp = "gpiol_pins";
134			};
135			pctl_gpio_m: pctl-gpio-m {     /* GPIO bank M */
136				pingrp = "gpiom_pins";
137			};
138			/* Port 8 */
139			pctl_spi3: pctl-spi3 {
140				pingrp = "spi3_pins";
141			};
142			/* Port 9 */
143			pctl_spi1: pctl-spi1 {
144				pingrp = "spi1_pins";
145			};
146			pctl_gpio_n: pctl-gpio-n {
147				pingrp = "gpion_pins";
148			};
149			/* Unmuxed GPIOs */
150			pctl_gpio_b: pctl-gpio-b {
151				pingrp = "gpiob_pins";
152			};
153			pctl_gpio_d: pctl-gpio-d {
154				pingrp = "gpiod_pins";
155			};
156			pctl_gpio_f: pctl-gpio-f {
157				pingrp = "gpiof_pins";
158			};
159			pctl_gpio_h: pctl-gpio-h {
160				pingrp = "gpioh_pins";
161			};
162			pctl_gpio_i: pctl-gpio-i {
163				pingrp = "gpioi_pins";
164			};
165		};
166
167		gpioa: gpio@FF140000 {
168			compatible = "abilis,tb10x-gpio";
169			interrupt-controller;
170			#interrupt-cells = <1>;
171			interrupt-parent = <&tb10x_ictl>;
172			interrupts = <27 2>;
173			reg = <0xFF140000 0x1000>;
174			gpio-controller;
175			#gpio-cells = <1>;
176			gpio-base  = <0>;
177			gpio-pins = <&pctl_gpio_a>;
178		};
179		gpiob: gpio@FF141000 {
180			compatible = "abilis,tb10x-gpio";
181			interrupt-controller;
182			#interrupt-cells = <1>;
183			interrupt-parent = <&tb10x_ictl>;
184			interrupts = <27 2>;
185			reg = <0xFF141000 0x1000>;
186			gpio-controller;
187			#gpio-cells = <1>;
188			gpio-base  = <3>;
189			gpio-pins = <&pctl_gpio_b>;
190		};
191		gpioc: gpio@FF142000 {
192			compatible = "abilis,tb10x-gpio";
193			interrupt-controller;
194			#interrupt-cells = <1>;
195			interrupt-parent = <&tb10x_ictl>;
196			interrupts = <27 2>;
197			reg = <0xFF142000 0x1000>;
198			gpio-controller;
199			#gpio-cells = <1>;
200			gpio-base  = <5>;
201			gpio-pins = <&pctl_gpio_c>;
202		};
203		gpiod: gpio@FF143000 {
204			compatible = "abilis,tb10x-gpio";
205			interrupt-controller;
206			#interrupt-cells = <1>;
207			interrupt-parent = <&tb10x_ictl>;
208			interrupts = <27 2>;
209			reg = <0xFF143000 0x1000>;
210			gpio-controller;
211			#gpio-cells = <1>;
212			gpio-base  = <8>;
213			gpio-pins = <&pctl_gpio_d>;
214		};
215		gpioe: gpio@FF144000 {
216			compatible = "abilis,tb10x-gpio";
217			interrupt-controller;
218			#interrupt-cells = <1>;
219			interrupt-parent = <&tb10x_ictl>;
220			interrupts = <27 2>;
221			reg = <0xFF144000 0x1000>;
222			gpio-controller;
223			#gpio-cells = <1>;
224			gpio-base  = <10>;
225			gpio-pins = <&pctl_gpio_e>;
226		};
227		gpiof: gpio@FF145000 {
228			compatible = "abilis,tb10x-gpio";
229			interrupt-controller;
230			#interrupt-cells = <1>;
231			interrupt-parent = <&tb10x_ictl>;
232			interrupts = <27 2>;
233			reg = <0xFF145000 0x1000>;
234			gpio-controller;
235			#gpio-cells = <1>;
236			gpio-base  = <13>;
237			gpio-pins = <&pctl_gpio_f>;
238		};
239		gpiog: gpio@FF146000 {
240			compatible = "abilis,tb10x-gpio";
241			interrupt-controller;
242			#interrupt-cells = <1>;
243			interrupt-parent = <&tb10x_ictl>;
244			interrupts = <27 2>;
245			reg = <0xFF146000 0x1000>;
246			gpio-controller;
247			#gpio-cells = <1>;
248			gpio-base  = <15>;
249			gpio-pins = <&pctl_gpio_g>;
250		};
251		gpioh: gpio@FF147000 {
252			compatible = "abilis,tb10x-gpio";
253			interrupt-controller;
254			#interrupt-cells = <1>;
255			interrupt-parent = <&tb10x_ictl>;
256			interrupts = <27 2>;
257			reg = <0xFF147000 0x1000>;
258			gpio-controller;
259			#gpio-cells = <1>;
260			gpio-base  = <18>;
261			gpio-pins = <&pctl_gpio_h>;
262		};
263		gpioi: gpio@FF148000 {
264			compatible = "abilis,tb10x-gpio";
265			interrupt-controller;
266			#interrupt-cells = <1>;
267			interrupt-parent = <&tb10x_ictl>;
268			interrupts = <27 2>;
269			reg = <0xFF148000 0x1000>;
270			gpio-controller;
271			#gpio-cells = <1>;
272			gpio-base  = <20>;
273			gpio-pins = <&pctl_gpio_i>;
274		};
275		gpioj: gpio@FF149000 {
276			compatible = "abilis,tb10x-gpio";
277			interrupt-controller;
278			#interrupt-cells = <1>;
279			interrupt-parent = <&tb10x_ictl>;
280			interrupts = <27 2>;
281			reg = <0xFF149000 0x1000>;
282			gpio-controller;
283			#gpio-cells = <1>;
284			gpio-base  = <32>;
285			gpio-pins = <&pctl_gpio_j>;
286		};
287		gpiok: gpio@FF14a000 {
288			compatible = "abilis,tb10x-gpio";
289			interrupt-controller;
290			#interrupt-cells = <1>;
291			interrupt-parent = <&tb10x_ictl>;
292			interrupts = <27 2>;
293			reg = <0xFF14A000 0x1000>;
294			gpio-controller;
295			#gpio-cells = <1>;
296			gpio-base  = <64>;
297			gpio-pins = <&pctl_gpio_k>;
298		};
299		gpiol: gpio@FF14b000 {
300			compatible = "abilis,tb10x-gpio";
301			interrupt-controller;
302			#interrupt-cells = <1>;
303			interrupt-parent = <&tb10x_ictl>;
304			interrupts = <27 2>;
305			reg = <0xFF14B000 0x1000>;
306			gpio-controller;
307			#gpio-cells = <1>;
308			gpio-base  = <86>;
309			gpio-pins = <&pctl_gpio_l>;
310		};
311		gpiom: gpio@FF14c000 {
312			compatible = "abilis,tb10x-gpio";
313			interrupt-controller;
314			#interrupt-cells = <1>;
315			interrupt-parent = <&tb10x_ictl>;
316			interrupts = <27 2>;
317			reg = <0xFF14C000 0x1000>;
318			gpio-controller;
319			#gpio-cells = <1>;
320			gpio-base  = <90>;
321			gpio-pins = <&pctl_gpio_m>;
322		};
323		gpion: gpio@FF14d000 {
324			compatible = "abilis,tb10x-gpio";
325			interrupt-controller;
326			#interrupt-cells = <1>;
327			interrupt-parent = <&tb10x_ictl>;
328			interrupts = <27 2>;
329			reg = <0xFF14D000 0x1000>;
330			gpio-controller;
331			#gpio-cells = <1>;
332			gpio-base  = <94>;
333			gpio-pins = <&pctl_gpio_n>;
334		};
335	};
336};
337