1# ========================================================================== 2# Building 3# ========================================================================== 4 5src := $(obj) 6 7PHONY := __build 8__build: 9 10# Init all relevant variables used in kbuild files so 11# 1) they have correct type 12# 2) they do not inherit any value from the environment 13obj-y := 14obj-m := 15lib-y := 16lib-m := 17always := 18targets := 19subdir-y := 20subdir-m := 21EXTRA_AFLAGS := 22EXTRA_CFLAGS := 23EXTRA_CPPFLAGS := 24EXTRA_LDFLAGS := 25asflags-y := 26ccflags-y := 27cppflags-y := 28ldflags-y := 29 30subdir-asflags-y := 31subdir-ccflags-y := 32 33# Read auto.conf if it exists, otherwise ignore 34-include include/config/auto.conf 35 36include scripts/Kbuild.include 37 38# For backward compatibility check that these variables do not change 39save-cflags := $(CFLAGS) 40 41# The filename Kbuild has precedence over Makefile 42kbuild-dir := $(if $(filter /%,$(src)),$(src),$(srctree)/$(src)) 43kbuild-file := $(if $(wildcard $(kbuild-dir)/Kbuild),$(kbuild-dir)/Kbuild,$(kbuild-dir)/Makefile) 44include $(kbuild-file) 45 46# If the save-* variables changed error out 47ifeq ($(KBUILD_NOPEDANTIC),) 48 ifneq ("$(save-cflags)","$(CFLAGS)") 49 $(error CFLAGS was changed in "$(kbuild-file)". Fix it to use ccflags-y) 50 endif 51endif 52 53include scripts/Makefile.lib 54 55ifdef host-progs 56ifneq ($(hostprogs-y),$(host-progs)) 57$(warning kbuild: $(obj)/Makefile - Usage of host-progs is deprecated. Please replace with hostprogs-y!) 58hostprogs-y += $(host-progs) 59endif 60endif 61 62# Do not include host rules unless needed 63ifneq ($(hostprogs-y)$(hostprogs-m)$(hostlibs-y)$(hostlibs-m)$(hostcxxlibs-y)$(hostcxxlibs-m),) 64include scripts/Makefile.host 65endif 66 67ifneq ($(KBUILD_SRC),) 68# Create output directory if not already present 69_dummy := $(shell [ -d $(obj) ] || mkdir -p $(obj)) 70 71# Create directories for object files if directory does not exist 72# Needed when obj-y := dir/file.o syntax is used 73_dummy := $(foreach d,$(obj-dirs), $(shell [ -d $(d) ] || mkdir -p $(d))) 74endif 75 76ifndef obj 77$(warning kbuild: Makefile.build is included improperly) 78endif 79 80# =========================================================================== 81 82ifneq ($(strip $(lib-y) $(lib-m) $(lib-)),) 83lib-target := $(obj)/lib.a 84obj-y += $(obj)/lib-ksyms.o 85endif 86 87ifneq ($(strip $(obj-y) $(obj-m) $(obj-) $(subdir-m) $(lib-target)),) 88builtin-target := $(obj)/built-in.o 89endif 90 91modorder-target := $(obj)/modules.order 92 93# We keep a list of all modules in $(MODVERDIR) 94 95__build: $(if $(KBUILD_BUILTIN),$(builtin-target) $(lib-target) $(extra-y)) \ 96 $(if $(KBUILD_MODULES),$(obj-m) $(modorder-target)) \ 97 $(subdir-ym) $(always) 98 @: 99 100# Linus' kernel sanity checking tool 101ifneq ($(KBUILD_CHECKSRC),0) 102 ifeq ($(KBUILD_CHECKSRC),2) 103 quiet_cmd_force_checksrc = CHECK $< 104 cmd_force_checksrc = $(CHECK) $(CHECKFLAGS) $(c_flags) $< ; 105 else 106 quiet_cmd_checksrc = CHECK $< 107 cmd_checksrc = $(CHECK) $(CHECKFLAGS) $(c_flags) $< ; 108 endif 109endif 110 111# Do section mismatch analysis for each module/built-in.o 112ifdef CONFIG_DEBUG_SECTION_MISMATCH 113 cmd_secanalysis = ; scripts/mod/modpost $@ 114endif 115 116# Compile C sources (.c) 117# --------------------------------------------------------------------------- 118 119# Default is built-in, unless we know otherwise 120modkern_cflags = \ 121 $(if $(part-of-module), \ 122 $(KBUILD_CFLAGS_MODULE) $(CFLAGS_MODULE), \ 123 $(KBUILD_CFLAGS_KERNEL) $(CFLAGS_KERNEL)) 124quiet_modtag := $(empty) $(empty) 125 126$(real-objs-m) : part-of-module := y 127$(real-objs-m:.o=.i) : part-of-module := y 128$(real-objs-m:.o=.s) : part-of-module := y 129$(real-objs-m:.o=.lst): part-of-module := y 130 131$(real-objs-m) : quiet_modtag := [M] 132$(real-objs-m:.o=.i) : quiet_modtag := [M] 133$(real-objs-m:.o=.s) : quiet_modtag := [M] 134$(real-objs-m:.o=.lst): quiet_modtag := [M] 135 136$(obj-m) : quiet_modtag := [M] 137 138# Default for not multi-part modules 139modname = $(basetarget) 140 141$(multi-objs-m) : modname = $(modname-multi) 142$(multi-objs-m:.o=.i) : modname = $(modname-multi) 143$(multi-objs-m:.o=.s) : modname = $(modname-multi) 144$(multi-objs-m:.o=.lst) : modname = $(modname-multi) 145$(multi-objs-y) : modname = $(modname-multi) 146$(multi-objs-y:.o=.i) : modname = $(modname-multi) 147$(multi-objs-y:.o=.s) : modname = $(modname-multi) 148$(multi-objs-y:.o=.lst) : modname = $(modname-multi) 149 150quiet_cmd_cc_s_c = CC $(quiet_modtag) $@ 151cmd_cc_s_c = $(CC) $(c_flags) $(DISABLE_LTO) -fverbose-asm -S -o $@ $< 152 153$(obj)/%.s: $(src)/%.c FORCE 154 $(call if_changed_dep,cc_s_c) 155 156quiet_cmd_cpp_i_c = CPP $(quiet_modtag) $@ 157cmd_cpp_i_c = $(CPP) $(c_flags) -o $@ $< 158 159$(obj)/%.i: $(src)/%.c FORCE 160 $(call if_changed_dep,cpp_i_c) 161 162cmd_gensymtypes = \ 163 $(CPP) -D__GENKSYMS__ $(c_flags) $< | \ 164 $(GENKSYMS) $(if $(1), -T $(2)) \ 165 $(patsubst y,-s _,$(CONFIG_HAVE_UNDERSCORE_SYMBOL_PREFIX)) \ 166 $(if $(KBUILD_PRESERVE),-p) \ 167 -r $(firstword $(wildcard $(2:.symtypes=.symref) /dev/null)) 168 169quiet_cmd_cc_symtypes_c = SYM $(quiet_modtag) $@ 170cmd_cc_symtypes_c = \ 171 set -e; \ 172 $(call cmd_gensymtypes,true,$@) >/dev/null; \ 173 test -s $@ || rm -f $@ 174 175$(obj)/%.symtypes : $(src)/%.c FORCE 176 $(call cmd,cc_symtypes_c) 177 178# C (.c) files 179# The C file is compiled and updated dependency information is generated. 180# (See cmd_cc_o_c + relevant part of rule_cc_o_c) 181 182quiet_cmd_cc_o_c = CC $(quiet_modtag) $@ 183 184ifndef CONFIG_MODVERSIONS 185cmd_cc_o_c = $(CC) $(c_flags) -c -o $@ $< 186 187else 188# When module versioning is enabled the following steps are executed: 189# o compile a .tmp_<file>.o from <file>.c 190# o if .tmp_<file>.o doesn't contain a __ksymtab version, i.e. does 191# not export symbols, we just rename .tmp_<file>.o to <file>.o and 192# are done. 193# o otherwise, we calculate symbol versions using the good old 194# genksyms on the preprocessed source and postprocess them in a way 195# that they are usable as a linker script 196# o generate <file>.o from .tmp_<file>.o using the linker to 197# replace the unresolved symbols __crc_exported_symbol with 198# the actual value of the checksum generated by genksyms 199 200cmd_cc_o_c = $(CC) $(c_flags) -c -o $(@D)/.tmp_$(@F) $< 201cmd_modversions = \ 202 if $(OBJDUMP) -h $(@D)/.tmp_$(@F) | grep -q __ksymtab; then \ 203 $(call cmd_gensymtypes,$(KBUILD_SYMTYPES),$(@:.o=.symtypes)) \ 204 > $(@D)/.tmp_$(@F:.o=.ver); \ 205 \ 206 $(LD) $(LDFLAGS) -r -o $@ $(@D)/.tmp_$(@F) \ 207 -T $(@D)/.tmp_$(@F:.o=.ver); \ 208 rm -f $(@D)/.tmp_$(@F) $(@D)/.tmp_$(@F:.o=.ver); \ 209 else \ 210 mv -f $(@D)/.tmp_$(@F) $@; \ 211 fi; 212endif 213 214ifdef CONFIG_FTRACE_MCOUNT_RECORD 215ifdef BUILD_C_RECORDMCOUNT 216ifeq ("$(origin RECORDMCOUNT_WARN)", "command line") 217 RECORDMCOUNT_FLAGS = -w 218endif 219# Due to recursion, we must skip empty.o. 220# The empty.o file is created in the make process in order to determine 221# the target endianness and word size. It is made before all other C 222# files, including recordmcount. 223sub_cmd_record_mcount = \ 224 if [ $(@) != "scripts/mod/empty.o" ]; then \ 225 $(objtree)/scripts/recordmcount $(RECORDMCOUNT_FLAGS) "$(@)"; \ 226 fi; 227recordmcount_source := $(srctree)/scripts/recordmcount.c \ 228 $(srctree)/scripts/recordmcount.h 229else 230sub_cmd_record_mcount = set -e ; perl $(srctree)/scripts/recordmcount.pl "$(ARCH)" \ 231 "$(if $(CONFIG_CPU_BIG_ENDIAN),big,little)" \ 232 "$(if $(CONFIG_64BIT),64,32)" \ 233 "$(OBJDUMP)" "$(OBJCOPY)" "$(CC) $(KBUILD_CFLAGS)" \ 234 "$(LD)" "$(NM)" "$(RM)" "$(MV)" \ 235 "$(if $(part-of-module),1,0)" "$(@)"; 236recordmcount_source := $(srctree)/scripts/recordmcount.pl 237endif 238cmd_record_mcount = \ 239 if [ "$(findstring $(CC_FLAGS_FTRACE),$(_c_flags))" = \ 240 "$(CC_FLAGS_FTRACE)" ]; then \ 241 $(sub_cmd_record_mcount) \ 242 fi; 243endif 244 245ifdef CONFIG_STACK_VALIDATION 246ifneq ($(SKIP_STACK_VALIDATION),1) 247 248__objtool_obj := $(objtree)/tools/objtool/objtool 249 250objtool_args = check 251ifndef CONFIG_FRAME_POINTER 252objtool_args += --no-fp 253endif 254 255# 'OBJECT_FILES_NON_STANDARD := y': skip objtool checking for a directory 256# 'OBJECT_FILES_NON_STANDARD_foo.o := 'y': skip objtool checking for a file 257# 'OBJECT_FILES_NON_STANDARD_foo.o := 'n': override directory skip for a file 258cmd_objtool = $(if $(patsubst y%,, \ 259 $(OBJECT_FILES_NON_STANDARD_$(basetarget).o)$(OBJECT_FILES_NON_STANDARD)n), \ 260 $(__objtool_obj) $(objtool_args) "$(@)";) 261objtool_obj = $(if $(patsubst y%,, \ 262 $(OBJECT_FILES_NON_STANDARD_$(basetarget).o)$(OBJECT_FILES_NON_STANDARD)n), \ 263 $(__objtool_obj)) 264 265endif # SKIP_STACK_VALIDATION 266endif # CONFIG_STACK_VALIDATION 267 268define rule_cc_o_c 269 $(call echo-cmd,checksrc) $(cmd_checksrc) \ 270 $(call cmd_and_fixdep,cc_o_c) \ 271 $(cmd_modversions) \ 272 $(cmd_objtool) \ 273 $(call echo-cmd,record_mcount) $(cmd_record_mcount) 274endef 275 276define rule_as_o_S 277 $(call cmd_and_fixdep,as_o_S) \ 278 $(cmd_objtool) 279endef 280 281# List module undefined symbols (or empty line if not enabled) 282ifdef CONFIG_TRIM_UNUSED_KSYMS 283cmd_undef_syms = $(NM) $@ | sed -n 's/^ \+U //p' | xargs echo 284else 285cmd_undef_syms = echo 286endif 287 288# Built-in and composite module parts 289$(obj)/%.o: $(src)/%.c $(recordmcount_source) $(objtool_obj) FORCE 290 $(call cmd,force_checksrc) 291 $(call if_changed_rule,cc_o_c) 292 293# Single-part modules are special since we need to mark them in $(MODVERDIR) 294 295$(single-used-m): $(obj)/%.o: $(src)/%.c $(recordmcount_source) $(objtool_obj) FORCE 296 $(call cmd,force_checksrc) 297 $(call if_changed_rule,cc_o_c) 298 @{ echo $(@:.o=.ko); echo $@; \ 299 $(cmd_undef_syms); } > $(MODVERDIR)/$(@F:.o=.mod) 300 301quiet_cmd_cc_lst_c = MKLST $@ 302 cmd_cc_lst_c = $(CC) $(c_flags) -g -c -o $*.o $< && \ 303 $(CONFIG_SHELL) $(srctree)/scripts/makelst $*.o \ 304 System.map $(OBJDUMP) > $@ 305 306$(obj)/%.lst: $(src)/%.c FORCE 307 $(call if_changed_dep,cc_lst_c) 308 309# Compile assembler sources (.S) 310# --------------------------------------------------------------------------- 311 312modkern_aflags := $(KBUILD_AFLAGS_KERNEL) $(AFLAGS_KERNEL) 313 314$(real-objs-m) : modkern_aflags := $(KBUILD_AFLAGS_MODULE) $(AFLAGS_MODULE) 315$(real-objs-m:.o=.s): modkern_aflags := $(KBUILD_AFLAGS_MODULE) $(AFLAGS_MODULE) 316 317quiet_cmd_cpp_s_S = CPP $(quiet_modtag) $@ 318cmd_cpp_s_S = $(CPP) $(a_flags) -o $@ $< 319 320$(obj)/%.s: $(src)/%.S FORCE 321 $(call if_changed_dep,cpp_s_S) 322 323quiet_cmd_as_o_S = AS $(quiet_modtag) $@ 324cmd_as_o_S = $(CC) $(a_flags) -c -o $@ $< 325 326$(obj)/%.o: $(src)/%.S $(objtool_obj) FORCE 327 $(call if_changed_rule,as_o_S) 328 329targets += $(real-objs-y) $(real-objs-m) $(lib-y) 330targets += $(extra-y) $(MAKECMDGOALS) $(always) 331 332# Linker scripts preprocessor (.lds.S -> .lds) 333# --------------------------------------------------------------------------- 334quiet_cmd_cpp_lds_S = LDS $@ 335 cmd_cpp_lds_S = $(CPP) $(cpp_flags) -P -C -U$(ARCH) \ 336 -D__ASSEMBLY__ -DLINKER_SCRIPT -o $@ $< 337 338$(obj)/%.lds: $(src)/%.lds.S FORCE 339 $(call if_changed_dep,cpp_lds_S) 340 341# ASN.1 grammar 342# --------------------------------------------------------------------------- 343quiet_cmd_asn1_compiler = ASN.1 $@ 344 cmd_asn1_compiler = $(objtree)/scripts/asn1_compiler $< \ 345 $(subst .h,.c,$@) $(subst .c,.h,$@) 346 347.PRECIOUS: $(objtree)/$(obj)/%-asn1.c $(objtree)/$(obj)/%-asn1.h 348 349$(obj)/%-asn1.c $(obj)/%-asn1.h: $(src)/%.asn1 $(objtree)/scripts/asn1_compiler 350 $(call cmd,asn1_compiler) 351 352# Build the compiled-in targets 353# --------------------------------------------------------------------------- 354 355# To build objects in subdirs, we need to descend into the directories 356$(sort $(subdir-obj-y)): $(subdir-ym) ; 357 358# 359# Rule to compile a set of .o files into one .o file 360# 361ifdef builtin-target 362 363ifdef CONFIG_THIN_ARCHIVES 364 cmd_make_builtin = rm -f $@; $(AR) rcST$(KBUILD_ARFLAGS) 365 cmd_make_empty_builtin = rm -f $@; $(AR) rcST$(KBUILD_ARFLAGS) 366 quiet_cmd_link_o_target = AR $@ 367else 368 cmd_make_builtin = $(LD) $(ld_flags) -r -o 369 cmd_make_empty_builtin = rm -f $@; $(AR) rcs$(KBUILD_ARFLAGS) 370 quiet_cmd_link_o_target = LD $@ 371endif 372 373# If the list of objects to link is empty, just create an empty built-in.o 374cmd_link_o_target = $(if $(strip $(obj-y)),\ 375 $(cmd_make_builtin) $@ $(filter $(obj-y), $^) \ 376 $(cmd_secanalysis),\ 377 $(cmd_make_empty_builtin) $@) 378 379$(builtin-target): $(obj-y) FORCE 380 $(call if_changed,link_o_target) 381 382targets += $(builtin-target) 383endif # builtin-target 384 385# 386# Rule to create modules.order file 387# 388# Create commands to either record .ko file or cat modules.order from 389# a subdirectory 390modorder-cmds = \ 391 $(foreach m, $(modorder), \ 392 $(if $(filter %/modules.order, $m), \ 393 cat $m;, echo kernel/$m;)) 394 395$(modorder-target): $(subdir-ym) FORCE 396 $(Q)(cat /dev/null; $(modorder-cmds)) > $@ 397 398# 399# Rule to compile a set of .o files into one .a file 400# 401ifdef lib-target 402quiet_cmd_link_l_target = AR $@ 403 404ifdef CONFIG_THIN_ARCHIVES 405 cmd_link_l_target = rm -f $@; $(AR) rcsT$(KBUILD_ARFLAGS) $@ $(lib-y) 406else 407 cmd_link_l_target = rm -f $@; $(AR) rcs$(KBUILD_ARFLAGS) $@ $(lib-y) 408endif 409 410$(lib-target): $(lib-y) FORCE 411 $(call if_changed,link_l_target) 412 413targets += $(lib-target) 414 415dummy-object = $(obj)/.lib_exports.o 416ksyms-lds = $(dot-target).lds 417ifdef CONFIG_HAVE_UNDERSCORE_SYMBOL_PREFIX 418ref_prefix = EXTERN(_ 419else 420ref_prefix = EXTERN( 421endif 422 423quiet_cmd_export_list = EXPORTS $@ 424cmd_export_list = $(OBJDUMP) -h $< | \ 425 sed -ne '/___ksymtab/{s/.*+/$(ref_prefix)/;s/ .*/)/;p}' >$(ksyms-lds);\ 426 rm -f $(dummy-object);\ 427 $(AR) rcs$(KBUILD_ARFLAGS) $(dummy-object);\ 428 $(LD) $(ld_flags) -r -o $@ -T $(ksyms-lds) $(dummy-object);\ 429 rm $(dummy-object) $(ksyms-lds) 430 431$(obj)/lib-ksyms.o: $(lib-target) FORCE 432 $(call if_changed,export_list) 433endif 434 435# 436# Rule to link composite objects 437# 438# Composite objects are specified in kbuild makefile as follows: 439# <composite-object>-objs := <list of .o files> 440# or 441# <composite-object>-y := <list of .o files> 442# or 443# <composite-object>-m := <list of .o files> 444# The -m syntax only works if <composite object> is a module 445link_multi_deps = \ 446$(filter $(addprefix $(obj)/, \ 447$($(subst $(obj)/,,$(@:.o=-objs))) \ 448$($(subst $(obj)/,,$(@:.o=-y))) \ 449$($(subst $(obj)/,,$(@:.o=-m)))), $^) 450 451quiet_cmd_link_multi-y = LD $@ 452cmd_link_multi-y = $(LD) $(ld_flags) -r -o $@ $(link_multi_deps) $(cmd_secanalysis) 453 454quiet_cmd_link_multi-m = LD [M] $@ 455cmd_link_multi-m = $(cmd_link_multi-y) 456 457$(multi-used-y): FORCE 458 $(call if_changed,link_multi-y) 459$(call multi_depend, $(multi-used-y), .o, -objs -y) 460 461$(multi-used-m): FORCE 462 $(call if_changed,link_multi-m) 463 @{ echo $(@:.o=.ko); echo $(link_multi_deps); \ 464 $(cmd_undef_syms); } > $(MODVERDIR)/$(@F:.o=.mod) 465$(call multi_depend, $(multi-used-m), .o, -objs -y -m) 466 467targets += $(multi-used-y) $(multi-used-m) 468 469 470# Descending 471# --------------------------------------------------------------------------- 472 473PHONY += $(subdir-ym) 474$(subdir-ym): 475 $(Q)$(MAKE) $(build)=$@ 476 477# Add FORCE to the prequisites of a target to force it to be always rebuilt. 478# --------------------------------------------------------------------------- 479 480PHONY += FORCE 481 482FORCE: 483 484# Read all saved command lines and dependencies for the $(targets) we 485# may be building above, using $(if_changed{,_dep}). As an 486# optimization, we don't need to read them if the target does not 487# exist, we will rebuild anyway in that case. 488 489targets := $(wildcard $(sort $(targets))) 490cmd_files := $(wildcard $(foreach f,$(targets),$(dir $(f)).$(notdir $(f)).cmd)) 491 492ifneq ($(cmd_files),) 493 include $(cmd_files) 494endif 495 496# Declare the contents of the .PHONY variable as phony. We keep that 497# information in a variable se we can use it in if_changed and friends. 498 499.PHONY: $(PHONY) 500