1# ========================================================================== 2# Building 3# ========================================================================== 4 5src := $(obj) 6 7PHONY := __build 8__build: 9 10# Init all relevant variables used in kbuild files so 11# 1) they have correct type 12# 2) they do not inherit any value from the environment 13obj-y := 14obj-m := 15lib-y := 16lib-m := 17always := 18targets := 19subdir-y := 20subdir-m := 21EXTRA_AFLAGS := 22EXTRA_CFLAGS := 23EXTRA_CPPFLAGS := 24EXTRA_LDFLAGS := 25 26# Read .config if it exist, otherwise ignore 27-include include/config/auto.conf 28 29include scripts/Kbuild.include 30 31# The filename Kbuild has precedence over Makefile 32kbuild-dir := $(if $(filter /%,$(src)),$(src),$(srctree)/$(src)) 33include $(if $(wildcard $(kbuild-dir)/Kbuild), $(kbuild-dir)/Kbuild, $(kbuild-dir)/Makefile) 34 35include scripts/Makefile.lib 36 37ifdef host-progs 38ifneq ($(hostprogs-y),$(host-progs)) 39$(warning kbuild: $(obj)/Makefile - Usage of host-progs is deprecated. Please replace with hostprogs-y!) 40hostprogs-y += $(host-progs) 41endif 42endif 43 44# Do not include host rules unles needed 45ifneq ($(hostprogs-y)$(hostprogs-m),) 46include scripts/Makefile.host 47endif 48 49ifneq ($(KBUILD_SRC),) 50# Create output directory if not already present 51_dummy := $(shell [ -d $(obj) ] || mkdir -p $(obj)) 52 53# Create directories for object files if directory does not exist 54# Needed when obj-y := dir/file.o syntax is used 55_dummy := $(foreach d,$(obj-dirs), $(shell [ -d $(d) ] || mkdir -p $(d))) 56endif 57 58 59ifdef EXTRA_TARGETS 60$(warning kbuild: $(obj)/Makefile - Usage of EXTRA_TARGETS is obsolete in 2.6. Please fix!) 61endif 62 63ifdef build-targets 64$(warning kbuild: $(obj)/Makefile - Usage of build-targets is obsolete in 2.6. Please fix!) 65endif 66 67ifdef export-objs 68$(warning kbuild: $(obj)/Makefile - Usage of export-objs is obsolete in 2.6. Please fix!) 69endif 70 71ifdef O_TARGET 72$(warning kbuild: $(obj)/Makefile - Usage of O_TARGET := $(O_TARGET) is obsolete in 2.6. Please fix!) 73endif 74 75ifdef L_TARGET 76$(error kbuild: $(obj)/Makefile - Use of L_TARGET is replaced by lib-y in 2.6. Please fix!) 77endif 78 79ifdef list-multi 80$(warning kbuild: $(obj)/Makefile - list-multi := $(list-multi) is obsolete in 2.6. Please fix!) 81endif 82 83ifndef obj 84$(warning kbuild: Makefile.build is included improperly) 85endif 86 87# =========================================================================== 88 89ifneq ($(strip $(lib-y) $(lib-m) $(lib-n) $(lib-)),) 90lib-target := $(obj)/lib.a 91endif 92 93ifneq ($(strip $(obj-y) $(obj-m) $(obj-n) $(obj-) $(lib-target)),) 94builtin-target := $(obj)/built-in.o 95endif 96 97# We keep a list of all modules in $(MODVERDIR) 98 99__build: $(if $(KBUILD_BUILTIN),$(builtin-target) $(lib-target) $(extra-y)) \ 100 $(if $(KBUILD_MODULES),$(obj-m)) \ 101 $(subdir-ym) $(always) 102 @: 103 104# Linus' kernel sanity checking tool 105ifneq ($(KBUILD_CHECKSRC),0) 106 ifeq ($(KBUILD_CHECKSRC),2) 107 quiet_cmd_force_checksrc = CHECK $< 108 cmd_force_checksrc = $(CHECK) $(CHECKFLAGS) $(c_flags) $< ; 109 else 110 quiet_cmd_checksrc = CHECK $< 111 cmd_checksrc = $(CHECK) $(CHECKFLAGS) $(c_flags) $< ; 112 endif 113endif 114 115 116# Compile C sources (.c) 117# --------------------------------------------------------------------------- 118 119# Default is built-in, unless we know otherwise 120modkern_cflags := $(CFLAGS_KERNEL) 121quiet_modtag := $(empty) $(empty) 122 123$(real-objs-m) : modkern_cflags := $(CFLAGS_MODULE) 124$(real-objs-m:.o=.i) : modkern_cflags := $(CFLAGS_MODULE) 125$(real-objs-m:.o=.s) : modkern_cflags := $(CFLAGS_MODULE) 126$(real-objs-m:.o=.lst): modkern_cflags := $(CFLAGS_MODULE) 127 128$(real-objs-m) : quiet_modtag := [M] 129$(real-objs-m:.o=.i) : quiet_modtag := [M] 130$(real-objs-m:.o=.s) : quiet_modtag := [M] 131$(real-objs-m:.o=.lst): quiet_modtag := [M] 132 133$(obj-m) : quiet_modtag := [M] 134 135# Default for not multi-part modules 136modname = $(basetarget) 137 138$(multi-objs-m) : modname = $(modname-multi) 139$(multi-objs-m:.o=.i) : modname = $(modname-multi) 140$(multi-objs-m:.o=.s) : modname = $(modname-multi) 141$(multi-objs-m:.o=.lst) : modname = $(modname-multi) 142$(multi-objs-y) : modname = $(modname-multi) 143$(multi-objs-y:.o=.i) : modname = $(modname-multi) 144$(multi-objs-y:.o=.s) : modname = $(modname-multi) 145$(multi-objs-y:.o=.lst) : modname = $(modname-multi) 146 147quiet_cmd_cc_s_c = CC $(quiet_modtag) $@ 148cmd_cc_s_c = $(CC) $(c_flags) -fverbose-asm -S -o $@ $< 149 150$(obj)/%.s: $(src)/%.c FORCE 151 $(call if_changed_dep,cc_s_c) 152 153quiet_cmd_cc_i_c = CPP $(quiet_modtag) $@ 154cmd_cc_i_c = $(CPP) $(c_flags) -o $@ $< 155 156$(obj)/%.i: $(src)/%.c FORCE 157 $(call if_changed_dep,cc_i_c) 158 159quiet_cmd_cc_symtypes_c = SYM $(quiet_modtag) $@ 160cmd_cc_symtypes_c = \ 161 $(CPP) -D__GENKSYMS__ $(c_flags) $< \ 162 | $(GENKSYMS) -T $@ >/dev/null; \ 163 test -s $@ || rm -f $@ 164 165$(obj)/%.symtypes : $(src)/%.c FORCE 166 $(call if_changed_dep,cc_symtypes_c) 167 168# C (.c) files 169# The C file is compiled and updated dependency information is generated. 170# (See cmd_cc_o_c + relevant part of rule_cc_o_c) 171 172quiet_cmd_cc_o_c = CC $(quiet_modtag) $@ 173 174ifndef CONFIG_MODVERSIONS 175cmd_cc_o_c = $(CC) $(c_flags) -c -o $@ $< 176 177else 178# When module versioning is enabled the following steps are executed: 179# o compile a .tmp_<file>.o from <file>.c 180# o if .tmp_<file>.o doesn't contain a __ksymtab version, i.e. does 181# not export symbols, we just rename .tmp_<file>.o to <file>.o and 182# are done. 183# o otherwise, we calculate symbol versions using the good old 184# genksyms on the preprocessed source and postprocess them in a way 185# that they are usable as a linker script 186# o generate <file>.o from .tmp_<file>.o using the linker to 187# replace the unresolved symbols __crc_exported_symbol with 188# the actual value of the checksum generated by genksyms 189 190cmd_cc_o_c = $(CC) $(c_flags) -c -o $(@D)/.tmp_$(@F) $< 191cmd_modversions = \ 192 if $(OBJDUMP) -h $(@D)/.tmp_$(@F) | grep -q __ksymtab; then \ 193 $(CPP) -D__GENKSYMS__ $(c_flags) $< \ 194 | $(GENKSYMS) $(if $(KBUILD_SYMTYPES), \ 195 -T $(@D)/$(@F:.o=.symtypes)) -a $(ARCH) \ 196 > $(@D)/.tmp_$(@F:.o=.ver); \ 197 \ 198 $(LD) $(LDFLAGS) -r -o $@ $(@D)/.tmp_$(@F) \ 199 -T $(@D)/.tmp_$(@F:.o=.ver); \ 200 rm -f $(@D)/.tmp_$(@F) $(@D)/.tmp_$(@F:.o=.ver); \ 201 else \ 202 mv -f $(@D)/.tmp_$(@F) $@; \ 203 fi; 204endif 205 206define rule_cc_o_c 207 $(call echo-cmd,checksrc) $(cmd_checksrc) \ 208 $(call echo-cmd,cc_o_c) $(cmd_cc_o_c); \ 209 $(cmd_modversions) \ 210 scripts/basic/fixdep $(depfile) $@ '$(call make-cmd,cc_o_c)' > \ 211 $(dot-target).tmp; \ 212 rm -f $(depfile); \ 213 mv -f $(dot-target).tmp $(dot-target).cmd 214endef 215 216# Built-in and composite module parts 217$(obj)/%.o: $(src)/%.c FORCE 218 $(call cmd,force_checksrc) 219 $(call if_changed_rule,cc_o_c) 220 221# Single-part modules are special since we need to mark them in $(MODVERDIR) 222 223$(single-used-m): $(obj)/%.o: $(src)/%.c FORCE 224 $(call cmd,force_checksrc) 225 $(call if_changed_rule,cc_o_c) 226 @{ echo $(@:.o=.ko); echo $@; } > $(MODVERDIR)/$(@F:.o=.mod) 227 228quiet_cmd_cc_lst_c = MKLST $@ 229 cmd_cc_lst_c = $(CC) $(c_flags) -g -c -o $*.o $< && \ 230 $(CONFIG_SHELL) $(srctree)/scripts/makelst $*.o \ 231 System.map $(OBJDUMP) > $@ 232 233$(obj)/%.lst: $(src)/%.c FORCE 234 $(call if_changed_dep,cc_lst_c) 235 236# Compile assembler sources (.S) 237# --------------------------------------------------------------------------- 238 239modkern_aflags := $(AFLAGS_KERNEL) 240 241$(real-objs-m) : modkern_aflags := $(AFLAGS_MODULE) 242$(real-objs-m:.o=.s): modkern_aflags := $(AFLAGS_MODULE) 243 244quiet_cmd_as_s_S = CPP $(quiet_modtag) $@ 245cmd_as_s_S = $(CPP) $(a_flags) -o $@ $< 246 247$(obj)/%.s: $(src)/%.S FORCE 248 $(call if_changed_dep,as_s_S) 249 250quiet_cmd_as_o_S = AS $(quiet_modtag) $@ 251cmd_as_o_S = $(CC) $(a_flags) -c -o $@ $< 252 253$(obj)/%.o: $(src)/%.S FORCE 254 $(call if_changed_dep,as_o_S) 255 256targets += $(real-objs-y) $(real-objs-m) $(lib-y) 257targets += $(extra-y) $(MAKECMDGOALS) $(always) 258 259# Linker scripts preprocessor (.lds.S -> .lds) 260# --------------------------------------------------------------------------- 261quiet_cmd_cpp_lds_S = LDS $@ 262 cmd_cpp_lds_S = $(CPP) $(cpp_flags) -D__ASSEMBLY__ -o $@ $< 263 264$(obj)/%.lds: $(src)/%.lds.S FORCE 265 $(call if_changed_dep,cpp_lds_S) 266 267# Build the compiled-in targets 268# --------------------------------------------------------------------------- 269 270# To build objects in subdirs, we need to descend into the directories 271$(sort $(subdir-obj-y)): $(subdir-ym) ; 272 273# 274# Rule to compile a set of .o files into one .o file 275# 276ifdef builtin-target 277quiet_cmd_link_o_target = LD $@ 278# If the list of objects to link is empty, just create an empty built-in.o 279cmd_link_o_target = $(if $(strip $(obj-y)),\ 280 $(LD) $(ld_flags) -r -o $@ $(filter $(obj-y), $^),\ 281 rm -f $@; $(AR) rcs $@) 282 283$(builtin-target): $(obj-y) FORCE 284 $(call if_changed,link_o_target) 285 286targets += $(builtin-target) 287endif # builtin-target 288 289# 290# Rule to compile a set of .o files into one .a file 291# 292ifdef lib-target 293quiet_cmd_link_l_target = AR $@ 294cmd_link_l_target = rm -f $@; $(AR) $(EXTRA_ARFLAGS) rcs $@ $(lib-y) 295 296$(lib-target): $(lib-y) FORCE 297 $(call if_changed,link_l_target) 298 299targets += $(lib-target) 300endif 301 302# 303# Rule to link composite objects 304# 305# Composite objects are specified in kbuild makefile as follows: 306# <composite-object>-objs := <list of .o files> 307# or 308# <composite-object>-y := <list of .o files> 309link_multi_deps = \ 310$(filter $(addprefix $(obj)/, \ 311$($(subst $(obj)/,,$(@:.o=-objs))) \ 312$($(subst $(obj)/,,$(@:.o=-y)))), $^) 313 314quiet_cmd_link_multi-y = LD $@ 315cmd_link_multi-y = $(LD) $(ld_flags) -r -o $@ $(link_multi_deps) 316 317quiet_cmd_link_multi-m = LD [M] $@ 318cmd_link_multi-m = $(cmd_link_multi-y) 319 320# We would rather have a list of rules like 321# foo.o: $(foo-objs) 322# but that's not so easy, so we rather make all composite objects depend 323# on the set of all their parts 324$(multi-used-y) : %.o: $(multi-objs-y) FORCE 325 $(call if_changed,link_multi-y) 326 327$(multi-used-m) : %.o: $(multi-objs-m) FORCE 328 $(call if_changed,link_multi-m) 329 @{ echo $(@:.o=.ko); echo $(link_multi_deps); } > $(MODVERDIR)/$(@F:.o=.mod) 330 331targets += $(multi-used-y) $(multi-used-m) 332 333 334# Descending 335# --------------------------------------------------------------------------- 336 337PHONY += $(subdir-ym) 338$(subdir-ym): 339 $(Q)$(MAKE) $(build)=$@ 340 341# Add FORCE to the prequisites of a target to force it to be always rebuilt. 342# --------------------------------------------------------------------------- 343 344PHONY += FORCE 345 346FORCE: 347 348# Read all saved command lines and dependencies for the $(targets) we 349# may be building above, using $(if_changed{,_dep}). As an 350# optimization, we don't need to read them if the target does not 351# exist, we will rebuild anyway in that case. 352 353targets := $(wildcard $(sort $(targets))) 354cmd_files := $(wildcard $(foreach f,$(targets),$(dir $(f)).$(notdir $(f)).cmd)) 355 356ifneq ($(cmd_files),) 357 include $(cmd_files) 358endif 359 360 361# Declare the contents of the .PHONY variable as phony. We keep that 362# information in a variable se we can use it in if_changed and friends. 363 364.PHONY: $(PHONY) 365