1# ========================================================================== 2# Building 3# ========================================================================== 4 5src := $(obj) 6 7PHONY := __build 8__build: 9 10# Init all relevant variables used in kbuild files so 11# 1) they have correct type 12# 2) they do not inherit any value from the environment 13obj-y := 14obj-m := 15lib-y := 16lib-m := 17always := 18targets := 19subdir-y := 20subdir-m := 21EXTRA_AFLAGS := 22EXTRA_CFLAGS := 23EXTRA_CPPFLAGS := 24EXTRA_LDFLAGS := 25asflags-y := 26ccflags-y := 27cppflags-y := 28ldflags-y := 29 30subdir-asflags-y := 31subdir-ccflags-y := 32 33# Read auto.conf if it exists, otherwise ignore 34-include include/config/auto.conf 35 36include scripts/Kbuild.include 37 38# For backward compatibility check that these variables do not change 39save-cflags := $(CFLAGS) 40 41# The filename Kbuild has precedence over Makefile 42kbuild-dir := $(if $(filter /%,$(src)),$(src),$(srctree)/$(src)) 43kbuild-file := $(if $(wildcard $(kbuild-dir)/Kbuild),$(kbuild-dir)/Kbuild,$(kbuild-dir)/Makefile) 44include $(kbuild-file) 45 46# If the save-* variables changed error out 47ifeq ($(KBUILD_NOPEDANTIC),) 48 ifneq ("$(save-cflags)","$(CFLAGS)") 49 $(error CFLAGS was changed in "$(kbuild-file)". Fix it to use EXTRA_CFLAGS) 50 endif 51endif 52 53# 54# make W=1 settings 55# 56# $(call cc-option... ) handles gcc -W.. options which 57# are not supported by all versions of the compiler 58ifdef KBUILD_ENABLE_EXTRA_GCC_CHECKS 59KBUILD_EXTRA_WARNINGS := -Wextra 60KBUILD_EXTRA_WARNINGS += -Wunused -Wno-unused-parameter 61KBUILD_EXTRA_WARNINGS += -Waggregate-return 62KBUILD_EXTRA_WARNINGS += -Wbad-function-cast 63KBUILD_EXTRA_WARNINGS += -Wcast-qual 64KBUILD_EXTRA_WARNINGS += -Wcast-align 65KBUILD_EXTRA_WARNINGS += -Wconversion 66KBUILD_EXTRA_WARNINGS += -Wdisabled-optimization 67KBUILD_EXTRA_WARNINGS += -Wlogical-op 68KBUILD_EXTRA_WARNINGS += -Wmissing-declarations 69KBUILD_EXTRA_WARNINGS += -Wmissing-format-attribute 70KBUILD_EXTRA_WARNINGS += $(call cc-option, -Wmissing-include-dirs,) 71KBUILD_EXTRA_WARNINGS += -Wmissing-prototypes 72KBUILD_EXTRA_WARNINGS += -Wnested-externs 73KBUILD_EXTRA_WARNINGS += -Wold-style-definition 74KBUILD_EXTRA_WARNINGS += $(call cc-option, -Woverlength-strings,) 75KBUILD_EXTRA_WARNINGS += -Wpacked 76KBUILD_EXTRA_WARNINGS += -Wpacked-bitfield-compat 77KBUILD_EXTRA_WARNINGS += -Wpadded 78KBUILD_EXTRA_WARNINGS += -Wpointer-arith 79KBUILD_EXTRA_WARNINGS += -Wredundant-decls 80KBUILD_EXTRA_WARNINGS += -Wshadow 81KBUILD_EXTRA_WARNINGS += -Wswitch-default 82KBUILD_EXTRA_WARNINGS += $(call cc-option, -Wvla,) 83KBUILD_CFLAGS += $(KBUILD_EXTRA_WARNINGS) 84endif 85 86include scripts/Makefile.lib 87 88ifdef host-progs 89ifneq ($(hostprogs-y),$(host-progs)) 90$(warning kbuild: $(obj)/Makefile - Usage of host-progs is deprecated. Please replace with hostprogs-y!) 91hostprogs-y += $(host-progs) 92endif 93endif 94 95# Do not include host rules unless needed 96ifneq ($(hostprogs-y)$(hostprogs-m),) 97include scripts/Makefile.host 98endif 99 100ifneq ($(KBUILD_SRC),) 101# Create output directory if not already present 102_dummy := $(shell [ -d $(obj) ] || mkdir -p $(obj)) 103 104# Create directories for object files if directory does not exist 105# Needed when obj-y := dir/file.o syntax is used 106_dummy := $(foreach d,$(obj-dirs), $(shell [ -d $(d) ] || mkdir -p $(d))) 107endif 108 109ifndef obj 110$(warning kbuild: Makefile.build is included improperly) 111endif 112 113# =========================================================================== 114 115ifneq ($(strip $(lib-y) $(lib-m) $(lib-n) $(lib-)),) 116lib-target := $(obj)/lib.a 117endif 118 119ifneq ($(strip $(obj-y) $(obj-m) $(obj-n) $(obj-) $(subdir-m) $(lib-target)),) 120builtin-target := $(obj)/built-in.o 121endif 122 123modorder-target := $(obj)/modules.order 124 125# We keep a list of all modules in $(MODVERDIR) 126 127__build: $(if $(KBUILD_BUILTIN),$(builtin-target) $(lib-target) $(extra-y)) \ 128 $(if $(KBUILD_MODULES),$(obj-m) $(modorder-target)) \ 129 $(subdir-ym) $(always) 130 @: 131 132# Linus' kernel sanity checking tool 133ifneq ($(KBUILD_CHECKSRC),0) 134 ifeq ($(KBUILD_CHECKSRC),2) 135 quiet_cmd_force_checksrc = CHECK $< 136 cmd_force_checksrc = $(CHECK) $(CHECKFLAGS) $(c_flags) $< ; 137 else 138 quiet_cmd_checksrc = CHECK $< 139 cmd_checksrc = $(CHECK) $(CHECKFLAGS) $(c_flags) $< ; 140 endif 141endif 142 143# Do section mismatch analysis for each module/built-in.o 144ifdef CONFIG_DEBUG_SECTION_MISMATCH 145 cmd_secanalysis = ; scripts/mod/modpost $@ 146endif 147 148# Compile C sources (.c) 149# --------------------------------------------------------------------------- 150 151# Default is built-in, unless we know otherwise 152modkern_cflags = \ 153 $(if $(part-of-module), \ 154 $(KBUILD_CFLAGS_MODULE) $(CFLAGS_MODULE), \ 155 $(KBUILD_CFLAGS_KERNEL) $(CFLAGS_KERNEL)) 156quiet_modtag := $(empty) $(empty) 157 158$(real-objs-m) : part-of-module := y 159$(real-objs-m:.o=.i) : part-of-module := y 160$(real-objs-m:.o=.s) : part-of-module := y 161$(real-objs-m:.o=.lst): part-of-module := y 162 163$(real-objs-m) : quiet_modtag := [M] 164$(real-objs-m:.o=.i) : quiet_modtag := [M] 165$(real-objs-m:.o=.s) : quiet_modtag := [M] 166$(real-objs-m:.o=.lst): quiet_modtag := [M] 167 168$(obj-m) : quiet_modtag := [M] 169 170# Default for not multi-part modules 171modname = $(basetarget) 172 173$(multi-objs-m) : modname = $(modname-multi) 174$(multi-objs-m:.o=.i) : modname = $(modname-multi) 175$(multi-objs-m:.o=.s) : modname = $(modname-multi) 176$(multi-objs-m:.o=.lst) : modname = $(modname-multi) 177$(multi-objs-y) : modname = $(modname-multi) 178$(multi-objs-y:.o=.i) : modname = $(modname-multi) 179$(multi-objs-y:.o=.s) : modname = $(modname-multi) 180$(multi-objs-y:.o=.lst) : modname = $(modname-multi) 181 182quiet_cmd_cc_s_c = CC $(quiet_modtag) $@ 183cmd_cc_s_c = $(CC) $(c_flags) -fverbose-asm -S -o $@ $< 184 185$(obj)/%.s: $(src)/%.c FORCE 186 $(call if_changed_dep,cc_s_c) 187 188quiet_cmd_cc_i_c = CPP $(quiet_modtag) $@ 189cmd_cc_i_c = $(CPP) $(c_flags) -o $@ $< 190 191$(obj)/%.i: $(src)/%.c FORCE 192 $(call if_changed_dep,cc_i_c) 193 194cmd_gensymtypes = \ 195 $(CPP) -D__GENKSYMS__ $(c_flags) $< | \ 196 $(GENKSYMS) $(if $(1), -T $(2)) -a $(ARCH) \ 197 $(if $(KBUILD_PRESERVE),-p) \ 198 -r $(firstword $(wildcard $(2:.symtypes=.symref) /dev/null)) 199 200quiet_cmd_cc_symtypes_c = SYM $(quiet_modtag) $@ 201cmd_cc_symtypes_c = \ 202 set -e; \ 203 $(call cmd_gensymtypes,true,$@) >/dev/null; \ 204 test -s $@ || rm -f $@ 205 206$(obj)/%.symtypes : $(src)/%.c FORCE 207 $(call cmd,cc_symtypes_c) 208 209# C (.c) files 210# The C file is compiled and updated dependency information is generated. 211# (See cmd_cc_o_c + relevant part of rule_cc_o_c) 212 213quiet_cmd_cc_o_c = CC $(quiet_modtag) $@ 214 215ifndef CONFIG_MODVERSIONS 216cmd_cc_o_c = $(CC) $(c_flags) -c -o $@ $< 217 218else 219# When module versioning is enabled the following steps are executed: 220# o compile a .tmp_<file>.o from <file>.c 221# o if .tmp_<file>.o doesn't contain a __ksymtab version, i.e. does 222# not export symbols, we just rename .tmp_<file>.o to <file>.o and 223# are done. 224# o otherwise, we calculate symbol versions using the good old 225# genksyms on the preprocessed source and postprocess them in a way 226# that they are usable as a linker script 227# o generate <file>.o from .tmp_<file>.o using the linker to 228# replace the unresolved symbols __crc_exported_symbol with 229# the actual value of the checksum generated by genksyms 230 231cmd_cc_o_c = $(CC) $(c_flags) -c -o $(@D)/.tmp_$(@F) $< 232cmd_modversions = \ 233 if $(OBJDUMP) -h $(@D)/.tmp_$(@F) | grep -q __ksymtab; then \ 234 $(call cmd_gensymtypes,$(KBUILD_SYMTYPES),$(@:.o=.symtypes)) \ 235 > $(@D)/.tmp_$(@F:.o=.ver); \ 236 \ 237 $(LD) $(LDFLAGS) -r -o $@ $(@D)/.tmp_$(@F) \ 238 -T $(@D)/.tmp_$(@F:.o=.ver); \ 239 rm -f $(@D)/.tmp_$(@F) $(@D)/.tmp_$(@F:.o=.ver); \ 240 else \ 241 mv -f $(@D)/.tmp_$(@F) $@; \ 242 fi; 243endif 244 245ifdef CONFIG_FTRACE_MCOUNT_RECORD 246ifdef BUILD_C_RECORDMCOUNT 247# Due to recursion, we must skip empty.o. 248# The empty.o file is created in the make process in order to determine 249# the target endianness and word size. It is made before all other C 250# files, including recordmcount. 251sub_cmd_record_mcount = \ 252 if [ $(@) != "scripts/mod/empty.o" ]; then \ 253 $(objtree)/scripts/recordmcount "$(@)"; \ 254 fi; 255else 256sub_cmd_record_mcount = set -e ; perl $(srctree)/scripts/recordmcount.pl "$(ARCH)" \ 257 "$(if $(CONFIG_CPU_BIG_ENDIAN),big,little)" \ 258 "$(if $(CONFIG_64BIT),64,32)" \ 259 "$(OBJDUMP)" "$(OBJCOPY)" "$(CC) $(KBUILD_CFLAGS)" \ 260 "$(LD)" "$(NM)" "$(RM)" "$(MV)" \ 261 "$(if $(part-of-module),1,0)" "$(@)"; 262endif 263cmd_record_mcount = \ 264 if [ "$(findstring -pg,$(_c_flags))" = "-pg" ]; then \ 265 $(sub_cmd_record_mcount) \ 266 fi; 267endif 268 269define rule_cc_o_c 270 $(call echo-cmd,checksrc) $(cmd_checksrc) \ 271 $(call echo-cmd,cc_o_c) $(cmd_cc_o_c); \ 272 $(cmd_modversions) \ 273 $(call echo-cmd,record_mcount) \ 274 $(cmd_record_mcount) \ 275 scripts/basic/fixdep $(depfile) $@ '$(call make-cmd,cc_o_c)' > \ 276 $(dot-target).tmp; \ 277 rm -f $(depfile); \ 278 mv -f $(dot-target).tmp $(dot-target).cmd 279endef 280 281# Built-in and composite module parts 282$(obj)/%.o: $(src)/%.c FORCE 283 $(call cmd,force_checksrc) 284 $(call if_changed_rule,cc_o_c) 285 286# Single-part modules are special since we need to mark them in $(MODVERDIR) 287 288$(single-used-m): $(obj)/%.o: $(src)/%.c FORCE 289 $(call cmd,force_checksrc) 290 $(call if_changed_rule,cc_o_c) 291 @{ echo $(@:.o=.ko); echo $@; } > $(MODVERDIR)/$(@F:.o=.mod) 292 293quiet_cmd_cc_lst_c = MKLST $@ 294 cmd_cc_lst_c = $(CC) $(c_flags) -g -c -o $*.o $< && \ 295 $(CONFIG_SHELL) $(srctree)/scripts/makelst $*.o \ 296 System.map $(OBJDUMP) > $@ 297 298$(obj)/%.lst: $(src)/%.c FORCE 299 $(call if_changed_dep,cc_lst_c) 300 301# Compile assembler sources (.S) 302# --------------------------------------------------------------------------- 303 304modkern_aflags := $(KBUILD_AFLAGS_KERNEL) $(AFLAGS_KERNEL) 305 306$(real-objs-m) : modkern_aflags := $(KBUILD_AFLAGS_MODULE) $(AFLAGS_MODULE) 307$(real-objs-m:.o=.s): modkern_aflags := $(KBUILD_AFLAGS_MODULE) $(AFLAGS_MODULE) 308 309quiet_cmd_as_s_S = CPP $(quiet_modtag) $@ 310cmd_as_s_S = $(CPP) $(a_flags) -o $@ $< 311 312$(obj)/%.s: $(src)/%.S FORCE 313 $(call if_changed_dep,as_s_S) 314 315quiet_cmd_as_o_S = AS $(quiet_modtag) $@ 316cmd_as_o_S = $(CC) $(a_flags) -c -o $@ $< 317 318$(obj)/%.o: $(src)/%.S FORCE 319 $(call if_changed_dep,as_o_S) 320 321targets += $(real-objs-y) $(real-objs-m) $(lib-y) 322targets += $(extra-y) $(MAKECMDGOALS) $(always) 323 324# Linker scripts preprocessor (.lds.S -> .lds) 325# --------------------------------------------------------------------------- 326quiet_cmd_cpp_lds_S = LDS $@ 327 cmd_cpp_lds_S = $(CPP) $(cpp_flags) -P -C -U$(ARCH) \ 328 -D__ASSEMBLY__ -DLINKER_SCRIPT -o $@ $< 329 330$(obj)/%.lds: $(src)/%.lds.S FORCE 331 $(call if_changed_dep,cpp_lds_S) 332 333# Build the compiled-in targets 334# --------------------------------------------------------------------------- 335 336# To build objects in subdirs, we need to descend into the directories 337$(sort $(subdir-obj-y)): $(subdir-ym) ; 338 339# 340# Rule to compile a set of .o files into one .o file 341# 342ifdef builtin-target 343quiet_cmd_link_o_target = LD $@ 344# If the list of objects to link is empty, just create an empty built-in.o 345cmd_link_o_target = $(if $(strip $(obj-y)),\ 346 $(LD) $(ld_flags) -r -o $@ $(filter $(obj-y), $^) \ 347 $(cmd_secanalysis),\ 348 rm -f $@; $(AR) rcs $@) 349 350$(builtin-target): $(obj-y) FORCE 351 $(call if_changed,link_o_target) 352 353targets += $(builtin-target) 354endif # builtin-target 355 356# 357# Rule to create modules.order file 358# 359# Create commands to either record .ko file or cat modules.order from 360# a subdirectory 361modorder-cmds = \ 362 $(foreach m, $(modorder), \ 363 $(if $(filter %/modules.order, $m), \ 364 cat $m;, echo kernel/$m;)) 365 366$(modorder-target): $(subdir-ym) FORCE 367 $(Q)(cat /dev/null; $(modorder-cmds)) > $@ 368 369# 370# Rule to compile a set of .o files into one .a file 371# 372ifdef lib-target 373quiet_cmd_link_l_target = AR $@ 374cmd_link_l_target = rm -f $@; $(AR) rcs $@ $(lib-y) 375 376$(lib-target): $(lib-y) FORCE 377 $(call if_changed,link_l_target) 378 379targets += $(lib-target) 380endif 381 382# 383# Rule to link composite objects 384# 385# Composite objects are specified in kbuild makefile as follows: 386# <composite-object>-objs := <list of .o files> 387# or 388# <composite-object>-y := <list of .o files> 389link_multi_deps = \ 390$(filter $(addprefix $(obj)/, \ 391$($(subst $(obj)/,,$(@:.o=-objs))) \ 392$($(subst $(obj)/,,$(@:.o=-y)))), $^) 393 394quiet_cmd_link_multi-y = LD $@ 395cmd_link_multi-y = $(LD) $(ld_flags) -r -o $@ $(link_multi_deps) $(cmd_secanalysis) 396 397quiet_cmd_link_multi-m = LD [M] $@ 398cmd_link_multi-m = $(cmd_link_multi-y) 399 400# We would rather have a list of rules like 401# foo.o: $(foo-objs) 402# but that's not so easy, so we rather make all composite objects depend 403# on the set of all their parts 404$(multi-used-y) : %.o: $(multi-objs-y) FORCE 405 $(call if_changed,link_multi-y) 406 407$(multi-used-m) : %.o: $(multi-objs-m) FORCE 408 $(call if_changed,link_multi-m) 409 @{ echo $(@:.o=.ko); echo $(link_multi_deps); } > $(MODVERDIR)/$(@F:.o=.mod) 410 411targets += $(multi-used-y) $(multi-used-m) 412 413 414# Descending 415# --------------------------------------------------------------------------- 416 417PHONY += $(subdir-ym) 418$(subdir-ym): 419 $(Q)$(MAKE) $(build)=$@ 420 421# Add FORCE to the prequisites of a target to force it to be always rebuilt. 422# --------------------------------------------------------------------------- 423 424PHONY += FORCE 425 426FORCE: 427 428# Read all saved command lines and dependencies for the $(targets) we 429# may be building above, using $(if_changed{,_dep}). As an 430# optimization, we don't need to read them if the target does not 431# exist, we will rebuild anyway in that case. 432 433targets := $(wildcard $(sort $(targets))) 434cmd_files := $(wildcard $(foreach f,$(targets),$(dir $(f)).$(notdir $(f)).cmd)) 435 436ifneq ($(cmd_files),) 437 include $(cmd_files) 438endif 439 440# Declare the contents of the .PHONY variable as phony. We keep that 441# information in a variable se we can use it in if_changed and friends. 442 443.PHONY: $(PHONY) 444