1 /* SPDX-License-Identifier: GPL-2.0 */ 2 /* eBPF instruction mini library */ 3 #ifndef __BPF_INSN_H 4 #define __BPF_INSN_H 5 6 struct bpf_insn; 7 8 /* ALU ops on registers, bpf_add|sub|...: dst_reg += src_reg */ 9 10 #define BPF_ALU64_REG(OP, DST, SRC) \ 11 ((struct bpf_insn) { \ 12 .code = BPF_ALU64 | BPF_OP(OP) | BPF_X, \ 13 .dst_reg = DST, \ 14 .src_reg = SRC, \ 15 .off = 0, \ 16 .imm = 0 }) 17 18 #define BPF_ALU32_REG(OP, DST, SRC) \ 19 ((struct bpf_insn) { \ 20 .code = BPF_ALU | BPF_OP(OP) | BPF_X, \ 21 .dst_reg = DST, \ 22 .src_reg = SRC, \ 23 .off = 0, \ 24 .imm = 0 }) 25 26 /* ALU ops on immediates, bpf_add|sub|...: dst_reg += imm32 */ 27 28 #define BPF_ALU64_IMM(OP, DST, IMM) \ 29 ((struct bpf_insn) { \ 30 .code = BPF_ALU64 | BPF_OP(OP) | BPF_K, \ 31 .dst_reg = DST, \ 32 .src_reg = 0, \ 33 .off = 0, \ 34 .imm = IMM }) 35 36 #define BPF_ALU32_IMM(OP, DST, IMM) \ 37 ((struct bpf_insn) { \ 38 .code = BPF_ALU | BPF_OP(OP) | BPF_K, \ 39 .dst_reg = DST, \ 40 .src_reg = 0, \ 41 .off = 0, \ 42 .imm = IMM }) 43 44 /* Short form of mov, dst_reg = src_reg */ 45 46 #define BPF_MOV64_REG(DST, SRC) \ 47 ((struct bpf_insn) { \ 48 .code = BPF_ALU64 | BPF_MOV | BPF_X, \ 49 .dst_reg = DST, \ 50 .src_reg = SRC, \ 51 .off = 0, \ 52 .imm = 0 }) 53 54 #define BPF_MOV32_REG(DST, SRC) \ 55 ((struct bpf_insn) { \ 56 .code = BPF_ALU | BPF_MOV | BPF_X, \ 57 .dst_reg = DST, \ 58 .src_reg = SRC, \ 59 .off = 0, \ 60 .imm = 0 }) 61 62 /* Short form of mov, dst_reg = imm32 */ 63 64 #define BPF_MOV64_IMM(DST, IMM) \ 65 ((struct bpf_insn) { \ 66 .code = BPF_ALU64 | BPF_MOV | BPF_K, \ 67 .dst_reg = DST, \ 68 .src_reg = 0, \ 69 .off = 0, \ 70 .imm = IMM }) 71 72 #define BPF_MOV32_IMM(DST, IMM) \ 73 ((struct bpf_insn) { \ 74 .code = BPF_ALU | BPF_MOV | BPF_K, \ 75 .dst_reg = DST, \ 76 .src_reg = 0, \ 77 .off = 0, \ 78 .imm = IMM }) 79 80 /* BPF_LD_IMM64 macro encodes single 'load 64-bit immediate' insn */ 81 #define BPF_LD_IMM64(DST, IMM) \ 82 BPF_LD_IMM64_RAW(DST, 0, IMM) 83 84 #define BPF_LD_IMM64_RAW(DST, SRC, IMM) \ 85 ((struct bpf_insn) { \ 86 .code = BPF_LD | BPF_DW | BPF_IMM, \ 87 .dst_reg = DST, \ 88 .src_reg = SRC, \ 89 .off = 0, \ 90 .imm = (__u32) (IMM) }), \ 91 ((struct bpf_insn) { \ 92 .code = 0, /* zero is reserved opcode */ \ 93 .dst_reg = 0, \ 94 .src_reg = 0, \ 95 .off = 0, \ 96 .imm = ((__u64) (IMM)) >> 32 }) 97 98 #ifndef BPF_PSEUDO_MAP_FD 99 # define BPF_PSEUDO_MAP_FD 1 100 #endif 101 102 /* pseudo BPF_LD_IMM64 insn used to refer to process-local map_fd */ 103 #define BPF_LD_MAP_FD(DST, MAP_FD) \ 104 BPF_LD_IMM64_RAW(DST, BPF_PSEUDO_MAP_FD, MAP_FD) 105 106 107 /* Direct packet access, R0 = *(uint *) (skb->data + imm32) */ 108 109 #define BPF_LD_ABS(SIZE, IMM) \ 110 ((struct bpf_insn) { \ 111 .code = BPF_LD | BPF_SIZE(SIZE) | BPF_ABS, \ 112 .dst_reg = 0, \ 113 .src_reg = 0, \ 114 .off = 0, \ 115 .imm = IMM }) 116 117 /* Memory load, dst_reg = *(uint *) (src_reg + off16) */ 118 119 #define BPF_LDX_MEM(SIZE, DST, SRC, OFF) \ 120 ((struct bpf_insn) { \ 121 .code = BPF_LDX | BPF_SIZE(SIZE) | BPF_MEM, \ 122 .dst_reg = DST, \ 123 .src_reg = SRC, \ 124 .off = OFF, \ 125 .imm = 0 }) 126 127 /* Memory store, *(uint *) (dst_reg + off16) = src_reg */ 128 129 #define BPF_STX_MEM(SIZE, DST, SRC, OFF) \ 130 ((struct bpf_insn) { \ 131 .code = BPF_STX | BPF_SIZE(SIZE) | BPF_MEM, \ 132 .dst_reg = DST, \ 133 .src_reg = SRC, \ 134 .off = OFF, \ 135 .imm = 0 }) 136 137 /* Atomic memory add, *(uint *)(dst_reg + off16) += src_reg */ 138 139 #define BPF_STX_XADD(SIZE, DST, SRC, OFF) \ 140 ((struct bpf_insn) { \ 141 .code = BPF_STX | BPF_SIZE(SIZE) | BPF_XADD, \ 142 .dst_reg = DST, \ 143 .src_reg = SRC, \ 144 .off = OFF, \ 145 .imm = 0 }) 146 147 /* Memory store, *(uint *) (dst_reg + off16) = imm32 */ 148 149 #define BPF_ST_MEM(SIZE, DST, OFF, IMM) \ 150 ((struct bpf_insn) { \ 151 .code = BPF_ST | BPF_SIZE(SIZE) | BPF_MEM, \ 152 .dst_reg = DST, \ 153 .src_reg = 0, \ 154 .off = OFF, \ 155 .imm = IMM }) 156 157 /* Conditional jumps against registers, if (dst_reg 'op' src_reg) goto pc + off16 */ 158 159 #define BPF_JMP_REG(OP, DST, SRC, OFF) \ 160 ((struct bpf_insn) { \ 161 .code = BPF_JMP | BPF_OP(OP) | BPF_X, \ 162 .dst_reg = DST, \ 163 .src_reg = SRC, \ 164 .off = OFF, \ 165 .imm = 0 }) 166 167 /* Conditional jumps against immediates, if (dst_reg 'op' imm32) goto pc + off16 */ 168 169 #define BPF_JMP_IMM(OP, DST, IMM, OFF) \ 170 ((struct bpf_insn) { \ 171 .code = BPF_JMP | BPF_OP(OP) | BPF_K, \ 172 .dst_reg = DST, \ 173 .src_reg = 0, \ 174 .off = OFF, \ 175 .imm = IMM }) 176 177 /* Raw code statement block */ 178 179 #define BPF_RAW_INSN(CODE, DST, SRC, OFF, IMM) \ 180 ((struct bpf_insn) { \ 181 .code = CODE, \ 182 .dst_reg = DST, \ 183 .src_reg = SRC, \ 184 .off = OFF, \ 185 .imm = IMM }) 186 187 /* Program exit */ 188 189 #define BPF_EXIT_INSN() \ 190 ((struct bpf_insn) { \ 191 .code = BPF_JMP | BPF_EXIT, \ 192 .dst_reg = 0, \ 193 .src_reg = 0, \ 194 .off = 0, \ 195 .imm = 0 }) 196 197 #endif 198