1 /* SPDX-License-Identifier: GPL-2.0 */ 2 /* 3 * Shared Memory Communications over RDMA (SMC-R) and RoCE 4 * 5 * Work Requests exploiting Infiniband API 6 * 7 * Copyright IBM Corp. 2016 8 * 9 * Author(s): Steffen Maier <maier@linux.vnet.ibm.com> 10 */ 11 12 #ifndef SMC_WR_H 13 #define SMC_WR_H 14 15 #include <linux/atomic.h> 16 #include <rdma/ib_verbs.h> 17 #include <asm/div64.h> 18 19 #include "smc.h" 20 #include "smc_core.h" 21 22 #define SMC_WR_BUF_CNT 16 /* # of ctrl buffers per link */ 23 24 #define SMC_WR_TX_WAIT_FREE_SLOT_TIME (10 * HZ) 25 #define SMC_WR_TX_WAIT_PENDING_TIME (5 * HZ) 26 27 #define SMC_WR_TX_SIZE 44 /* actual size of wr_send data (<=SMC_WR_BUF_SIZE) */ 28 29 #define SMC_WR_TX_PEND_PRIV_SIZE 32 30 31 struct smc_wr_tx_pend_priv { 32 u8 priv[SMC_WR_TX_PEND_PRIV_SIZE]; 33 }; 34 35 typedef void (*smc_wr_tx_handler)(struct smc_wr_tx_pend_priv *, 36 struct smc_link *, 37 enum ib_wc_status); 38 39 typedef bool (*smc_wr_tx_filter)(struct smc_wr_tx_pend_priv *, 40 unsigned long); 41 42 typedef void (*smc_wr_tx_dismisser)(struct smc_wr_tx_pend_priv *); 43 44 struct smc_wr_rx_handler { 45 struct hlist_node list; /* hash table collision resolution */ 46 void (*handler)(struct ib_wc *, void *); 47 u8 type; 48 }; 49 50 /* Only used by RDMA write WRs. 51 * All other WRs (CDC/LLC) use smc_wr_tx_send handling WR_ID implicitly 52 */ 53 static inline long smc_wr_tx_get_next_wr_id(struct smc_link *link) 54 { 55 return atomic_long_inc_return(&link->wr_tx_id); 56 } 57 58 static inline void smc_wr_tx_set_wr_id(atomic_long_t *wr_tx_id, long val) 59 { 60 atomic_long_set(wr_tx_id, val); 61 } 62 63 static inline bool smc_wr_tx_link_hold(struct smc_link *link) 64 { 65 if (!smc_link_usable(link)) 66 return false; 67 atomic_inc(&link->wr_tx_refcnt); 68 return true; 69 } 70 71 static inline void smc_wr_tx_link_put(struct smc_link *link) 72 { 73 if (atomic_dec_and_test(&link->wr_tx_refcnt)) 74 wake_up_all(&link->wr_tx_wait); 75 } 76 77 static inline void smc_wr_wakeup_tx_wait(struct smc_link *lnk) 78 { 79 wake_up_all(&lnk->wr_tx_wait); 80 } 81 82 static inline void smc_wr_wakeup_reg_wait(struct smc_link *lnk) 83 { 84 wake_up(&lnk->wr_reg_wait); 85 } 86 87 /* post a new receive work request to fill a completed old work request entry */ 88 static inline int smc_wr_rx_post(struct smc_link *link) 89 { 90 int rc; 91 u64 wr_id, temp_wr_id; 92 u32 index; 93 94 wr_id = ++link->wr_rx_id; /* tasklet context, thus not atomic */ 95 temp_wr_id = wr_id; 96 index = do_div(temp_wr_id, link->wr_rx_cnt); 97 link->wr_rx_ibs[index].wr_id = wr_id; 98 rc = ib_post_recv(link->roce_qp, &link->wr_rx_ibs[index], NULL); 99 return rc; 100 } 101 102 int smc_wr_create_link(struct smc_link *lnk); 103 int smc_wr_alloc_link_mem(struct smc_link *lnk); 104 void smc_wr_free_link(struct smc_link *lnk); 105 void smc_wr_free_link_mem(struct smc_link *lnk); 106 void smc_wr_remember_qp_attr(struct smc_link *lnk); 107 void smc_wr_remove_dev(struct smc_ib_device *smcibdev); 108 void smc_wr_add_dev(struct smc_ib_device *smcibdev); 109 110 int smc_wr_tx_get_free_slot(struct smc_link *link, smc_wr_tx_handler handler, 111 struct smc_wr_buf **wr_buf, 112 struct smc_rdma_wr **wrs, 113 struct smc_wr_tx_pend_priv **wr_pend_priv); 114 int smc_wr_tx_put_slot(struct smc_link *link, 115 struct smc_wr_tx_pend_priv *wr_pend_priv); 116 int smc_wr_tx_send(struct smc_link *link, 117 struct smc_wr_tx_pend_priv *wr_pend_priv); 118 int smc_wr_tx_send_wait(struct smc_link *link, struct smc_wr_tx_pend_priv *priv, 119 unsigned long timeout); 120 void smc_wr_tx_cq_handler(struct ib_cq *ib_cq, void *cq_context); 121 void smc_wr_tx_dismiss_slots(struct smc_link *lnk, u8 wr_rx_hdr_type, 122 smc_wr_tx_filter filter, 123 smc_wr_tx_dismisser dismisser, 124 unsigned long data); 125 int smc_wr_tx_wait_no_pending_sends(struct smc_link *link); 126 127 int smc_wr_rx_register_handler(struct smc_wr_rx_handler *handler); 128 int smc_wr_rx_post_init(struct smc_link *link); 129 void smc_wr_rx_cq_handler(struct ib_cq *ib_cq, void *cq_context); 130 int smc_wr_reg_send(struct smc_link *link, struct ib_mr *mr); 131 132 #endif /* SMC_WR_H */ 133