1 // SPDX-License-Identifier: GPL-2.0 2 /* Copyright (c) 2019, Vladimir Oltean <olteanv@gmail.com> 3 * 4 * This module is not a complete tagger implementation. It only provides 5 * primitives for taggers that rely on 802.1Q VLAN tags to use. The 6 * dsa_8021q_netdev_ops is registered for API compliance and not used 7 * directly by callers. 8 */ 9 #include <linux/if_bridge.h> 10 #include <linux/if_vlan.h> 11 #include <linux/dsa/8021q.h> 12 13 #include "dsa_priv.h" 14 15 /* Binary structure of the fake 12-bit VID field (when the TPID is 16 * ETH_P_DSA_8021Q): 17 * 18 * | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 | 19 * +-----------+-----+-----------------+-----------+-----------------------+ 20 * | DIR | SVL | SWITCH_ID | SUBVLAN | PORT | 21 * +-----------+-----+-----------------+-----------+-----------------------+ 22 * 23 * DIR - VID[11:10]: 24 * Direction flags. 25 * * 1 (0b01) for RX VLAN, 26 * * 2 (0b10) for TX VLAN. 27 * These values make the special VIDs of 0, 1 and 4095 to be left 28 * unused by this coding scheme. 29 * 30 * SVL/SUBVLAN - { VID[9], VID[5:4] }: 31 * Sub-VLAN encoding. Valid only when DIR indicates an RX VLAN. 32 * * 0 (0b000): Field does not encode a sub-VLAN, either because 33 * received traffic is untagged, PVID-tagged or because a second 34 * VLAN tag is present after this tag and not inside of it. 35 * * 1 (0b001): Received traffic is tagged with a VID value private 36 * to the host. This field encodes the index in the host's lookup 37 * table through which the value of the ingress VLAN ID can be 38 * recovered. 39 * * 2 (0b010): Field encodes a sub-VLAN. 40 * ... 41 * * 7 (0b111): Field encodes a sub-VLAN. 42 * When DIR indicates a TX VLAN, SUBVLAN must be transmitted as zero 43 * (by the host) and ignored on receive (by the switch). 44 * 45 * SWITCH_ID - VID[8:6]: 46 * Index of switch within DSA tree. Must be between 0 and 7. 47 * 48 * PORT - VID[3:0]: 49 * Index of switch port. Must be between 0 and 15. 50 */ 51 52 #define DSA_8021Q_DIR_SHIFT 10 53 #define DSA_8021Q_DIR_MASK GENMASK(11, 10) 54 #define DSA_8021Q_DIR(x) (((x) << DSA_8021Q_DIR_SHIFT) & \ 55 DSA_8021Q_DIR_MASK) 56 #define DSA_8021Q_DIR_RX DSA_8021Q_DIR(1) 57 #define DSA_8021Q_DIR_TX DSA_8021Q_DIR(2) 58 59 #define DSA_8021Q_SWITCH_ID_SHIFT 6 60 #define DSA_8021Q_SWITCH_ID_MASK GENMASK(8, 6) 61 #define DSA_8021Q_SWITCH_ID(x) (((x) << DSA_8021Q_SWITCH_ID_SHIFT) & \ 62 DSA_8021Q_SWITCH_ID_MASK) 63 64 #define DSA_8021Q_SUBVLAN_HI_SHIFT 9 65 #define DSA_8021Q_SUBVLAN_HI_MASK GENMASK(9, 9) 66 #define DSA_8021Q_SUBVLAN_LO_SHIFT 4 67 #define DSA_8021Q_SUBVLAN_LO_MASK GENMASK(4, 3) 68 #define DSA_8021Q_SUBVLAN_HI(x) (((x) & GENMASK(2, 2)) >> 2) 69 #define DSA_8021Q_SUBVLAN_LO(x) ((x) & GENMASK(1, 0)) 70 #define DSA_8021Q_SUBVLAN(x) \ 71 (((DSA_8021Q_SUBVLAN_LO(x) << DSA_8021Q_SUBVLAN_LO_SHIFT) & \ 72 DSA_8021Q_SUBVLAN_LO_MASK) | \ 73 ((DSA_8021Q_SUBVLAN_HI(x) << DSA_8021Q_SUBVLAN_HI_SHIFT) & \ 74 DSA_8021Q_SUBVLAN_HI_MASK)) 75 76 #define DSA_8021Q_PORT_SHIFT 0 77 #define DSA_8021Q_PORT_MASK GENMASK(3, 0) 78 #define DSA_8021Q_PORT(x) (((x) << DSA_8021Q_PORT_SHIFT) & \ 79 DSA_8021Q_PORT_MASK) 80 81 /* Returns the VID to be inserted into the frame from xmit for switch steering 82 * instructions on egress. Encodes switch ID and port ID. 83 */ 84 u16 dsa_8021q_tx_vid(struct dsa_switch *ds, int port) 85 { 86 return DSA_8021Q_DIR_TX | DSA_8021Q_SWITCH_ID(ds->index) | 87 DSA_8021Q_PORT(port); 88 } 89 EXPORT_SYMBOL_GPL(dsa_8021q_tx_vid); 90 91 /* Returns the VID that will be installed as pvid for this switch port, sent as 92 * tagged egress towards the CPU port and decoded by the rcv function. 93 */ 94 u16 dsa_8021q_rx_vid(struct dsa_switch *ds, int port) 95 { 96 return DSA_8021Q_DIR_RX | DSA_8021Q_SWITCH_ID(ds->index) | 97 DSA_8021Q_PORT(port); 98 } 99 EXPORT_SYMBOL_GPL(dsa_8021q_rx_vid); 100 101 u16 dsa_8021q_rx_vid_subvlan(struct dsa_switch *ds, int port, u16 subvlan) 102 { 103 return DSA_8021Q_DIR_RX | DSA_8021Q_SWITCH_ID(ds->index) | 104 DSA_8021Q_PORT(port) | DSA_8021Q_SUBVLAN(subvlan); 105 } 106 EXPORT_SYMBOL_GPL(dsa_8021q_rx_vid_subvlan); 107 108 /* Returns the decoded switch ID from the RX VID. */ 109 int dsa_8021q_rx_switch_id(u16 vid) 110 { 111 return (vid & DSA_8021Q_SWITCH_ID_MASK) >> DSA_8021Q_SWITCH_ID_SHIFT; 112 } 113 EXPORT_SYMBOL_GPL(dsa_8021q_rx_switch_id); 114 115 /* Returns the decoded port ID from the RX VID. */ 116 int dsa_8021q_rx_source_port(u16 vid) 117 { 118 return (vid & DSA_8021Q_PORT_MASK) >> DSA_8021Q_PORT_SHIFT; 119 } 120 EXPORT_SYMBOL_GPL(dsa_8021q_rx_source_port); 121 122 /* Returns the decoded subvlan from the RX VID. */ 123 u16 dsa_8021q_rx_subvlan(u16 vid) 124 { 125 u16 svl_hi, svl_lo; 126 127 svl_hi = (vid & DSA_8021Q_SUBVLAN_HI_MASK) >> 128 DSA_8021Q_SUBVLAN_HI_SHIFT; 129 svl_lo = (vid & DSA_8021Q_SUBVLAN_LO_MASK) >> 130 DSA_8021Q_SUBVLAN_LO_SHIFT; 131 132 return (svl_hi << 2) | svl_lo; 133 } 134 EXPORT_SYMBOL_GPL(dsa_8021q_rx_subvlan); 135 136 bool vid_is_dsa_8021q(u16 vid) 137 { 138 return ((vid & DSA_8021Q_DIR_MASK) == DSA_8021Q_DIR_RX || 139 (vid & DSA_8021Q_DIR_MASK) == DSA_8021Q_DIR_TX); 140 } 141 EXPORT_SYMBOL_GPL(vid_is_dsa_8021q); 142 143 /* If @enabled is true, installs @vid with @flags into the switch port's HW 144 * filter. 145 * If @enabled is false, deletes @vid (ignores @flags) from the port. Had the 146 * user explicitly configured this @vid through the bridge core, then the @vid 147 * is installed again, but this time with the flags from the bridge layer. 148 */ 149 static int dsa_8021q_vid_apply(struct dsa_8021q_context *ctx, int port, u16 vid, 150 u16 flags, bool enabled) 151 { 152 struct dsa_port *dp = dsa_to_port(ctx->ds, port); 153 154 if (enabled) 155 return ctx->ops->vlan_add(ctx->ds, dp->index, vid, flags); 156 157 return ctx->ops->vlan_del(ctx->ds, dp->index, vid); 158 } 159 160 /* RX VLAN tagging (left) and TX VLAN tagging (right) setup shown for a single 161 * front-panel switch port (here swp0). 162 * 163 * Port identification through VLAN (802.1Q) tags has different requirements 164 * for it to work effectively: 165 * - On RX (ingress from network): each front-panel port must have a pvid 166 * that uniquely identifies it, and the egress of this pvid must be tagged 167 * towards the CPU port, so that software can recover the source port based 168 * on the VID in the frame. But this would only work for standalone ports; 169 * if bridged, this VLAN setup would break autonomous forwarding and would 170 * force all switched traffic to pass through the CPU. So we must also make 171 * the other front-panel ports members of this VID we're adding, albeit 172 * we're not making it their PVID (they'll still have their own). 173 * By the way - just because we're installing the same VID in multiple 174 * switch ports doesn't mean that they'll start to talk to one another, even 175 * while not bridged: the final forwarding decision is still an AND between 176 * the L2 forwarding information (which is limiting forwarding in this case) 177 * and the VLAN-based restrictions (of which there are none in this case, 178 * since all ports are members). 179 * - On TX (ingress from CPU and towards network) we are faced with a problem. 180 * If we were to tag traffic (from within DSA) with the port's pvid, all 181 * would be well, assuming the switch ports were standalone. Frames would 182 * have no choice but to be directed towards the correct front-panel port. 183 * But because we also want the RX VLAN to not break bridging, then 184 * inevitably that means that we have to give them a choice (of what 185 * front-panel port to go out on), and therefore we cannot steer traffic 186 * based on the RX VID. So what we do is simply install one more VID on the 187 * front-panel and CPU ports, and profit off of the fact that steering will 188 * work just by virtue of the fact that there is only one other port that's 189 * a member of the VID we're tagging the traffic with - the desired one. 190 * 191 * So at the end, each front-panel port will have one RX VID (also the PVID), 192 * the RX VID of all other front-panel ports, and one TX VID. Whereas the CPU 193 * port will have the RX and TX VIDs of all front-panel ports, and on top of 194 * that, is also tagged-input and tagged-output (VLAN trunk). 195 * 196 * CPU port CPU port 197 * +-------------+-----+-------------+ +-------------+-----+-------------+ 198 * | RX VID | | | | TX VID | | | 199 * | of swp0 | | | | of swp0 | | | 200 * | +-----+ | | +-----+ | 201 * | ^ T | | | Tagged | 202 * | | | | | ingress | 203 * | +-------+---+---+-------+ | | +-----------+ | 204 * | | | | | | | | Untagged | 205 * | | U v U v U v | | v egress | 206 * | +-----+ +-----+ +-----+ +-----+ | | +-----+ +-----+ +-----+ +-----+ | 207 * | | | | | | | | | | | | | | | | | | | | 208 * | |PVID | | | | | | | | | | | | | | | | | | 209 * +-+-----+-+-----+-+-----+-+-----+-+ +-+-----+-+-----+-+-----+-+-----+-+ 210 * swp0 swp1 swp2 swp3 swp0 swp1 swp2 swp3 211 */ 212 static int dsa_8021q_setup_port(struct dsa_8021q_context *ctx, int port, 213 bool enabled) 214 { 215 int upstream = dsa_upstream_port(ctx->ds, port); 216 u16 rx_vid = dsa_8021q_rx_vid(ctx->ds, port); 217 u16 tx_vid = dsa_8021q_tx_vid(ctx->ds, port); 218 struct net_device *master; 219 int i, err, subvlan; 220 221 /* The CPU port is implicitly configured by 222 * configuring the front-panel ports 223 */ 224 if (!dsa_is_user_port(ctx->ds, port)) 225 return 0; 226 227 master = dsa_to_port(ctx->ds, port)->cpu_dp->master; 228 229 /* Add this user port's RX VID to the membership list of all others 230 * (including itself). This is so that bridging will not be hindered. 231 * L2 forwarding rules still take precedence when there are no VLAN 232 * restrictions, so there are no concerns about leaking traffic. 233 */ 234 for (i = 0; i < ctx->ds->num_ports; i++) { 235 u16 flags; 236 237 if (i == upstream) 238 continue; 239 else if (i == port) 240 /* The RX VID is pvid on this port */ 241 flags = BRIDGE_VLAN_INFO_UNTAGGED | 242 BRIDGE_VLAN_INFO_PVID; 243 else 244 /* The RX VID is a regular VLAN on all others */ 245 flags = BRIDGE_VLAN_INFO_UNTAGGED; 246 247 err = dsa_8021q_vid_apply(ctx, i, rx_vid, flags, enabled); 248 if (err) { 249 dev_err(ctx->ds->dev, 250 "Failed to apply RX VID %d to port %d: %d\n", 251 rx_vid, port, err); 252 return err; 253 } 254 } 255 256 /* CPU port needs to see this port's RX VID 257 * as tagged egress. 258 */ 259 err = dsa_8021q_vid_apply(ctx, upstream, rx_vid, 0, enabled); 260 if (err) { 261 dev_err(ctx->ds->dev, 262 "Failed to apply RX VID %d to port %d: %d\n", 263 rx_vid, port, err); 264 return err; 265 } 266 267 /* Add to the master's RX filter not only @rx_vid, but in fact 268 * the entire subvlan range, just in case this DSA switch might 269 * want to use sub-VLANs. 270 */ 271 for (subvlan = 0; subvlan < DSA_8021Q_N_SUBVLAN; subvlan++) { 272 u16 vid = dsa_8021q_rx_vid_subvlan(ctx->ds, port, subvlan); 273 274 if (enabled) 275 vlan_vid_add(master, ctx->proto, vid); 276 else 277 vlan_vid_del(master, ctx->proto, vid); 278 } 279 280 /* Finally apply the TX VID on this port and on the CPU port */ 281 err = dsa_8021q_vid_apply(ctx, port, tx_vid, BRIDGE_VLAN_INFO_UNTAGGED, 282 enabled); 283 if (err) { 284 dev_err(ctx->ds->dev, 285 "Failed to apply TX VID %d on port %d: %d\n", 286 tx_vid, port, err); 287 return err; 288 } 289 err = dsa_8021q_vid_apply(ctx, upstream, tx_vid, 0, enabled); 290 if (err) { 291 dev_err(ctx->ds->dev, 292 "Failed to apply TX VID %d on port %d: %d\n", 293 tx_vid, upstream, err); 294 return err; 295 } 296 297 return err; 298 } 299 300 int dsa_8021q_setup(struct dsa_8021q_context *ctx, bool enabled) 301 { 302 int rc, port; 303 304 ASSERT_RTNL(); 305 306 for (port = 0; port < ctx->ds->num_ports; port++) { 307 rc = dsa_8021q_setup_port(ctx, port, enabled); 308 if (rc < 0) { 309 dev_err(ctx->ds->dev, 310 "Failed to setup VLAN tagging for port %d: %d\n", 311 port, rc); 312 return rc; 313 } 314 } 315 316 return 0; 317 } 318 EXPORT_SYMBOL_GPL(dsa_8021q_setup); 319 320 static int dsa_8021q_crosschip_link_apply(struct dsa_8021q_context *ctx, 321 int port, 322 struct dsa_8021q_context *other_ctx, 323 int other_port, bool enabled) 324 { 325 u16 rx_vid = dsa_8021q_rx_vid(ctx->ds, port); 326 327 /* @rx_vid of local @ds port @port goes to @other_port of 328 * @other_ds 329 */ 330 return dsa_8021q_vid_apply(other_ctx, other_port, rx_vid, 331 BRIDGE_VLAN_INFO_UNTAGGED, enabled); 332 } 333 334 static int dsa_8021q_crosschip_link_add(struct dsa_8021q_context *ctx, int port, 335 struct dsa_8021q_context *other_ctx, 336 int other_port) 337 { 338 struct dsa_8021q_crosschip_link *c; 339 340 list_for_each_entry(c, &ctx->crosschip_links, list) { 341 if (c->port == port && c->other_ctx == other_ctx && 342 c->other_port == other_port) { 343 refcount_inc(&c->refcount); 344 return 0; 345 } 346 } 347 348 dev_dbg(ctx->ds->dev, 349 "adding crosschip link from port %d to %s port %d\n", 350 port, dev_name(other_ctx->ds->dev), other_port); 351 352 c = kzalloc(sizeof(*c), GFP_KERNEL); 353 if (!c) 354 return -ENOMEM; 355 356 c->port = port; 357 c->other_ctx = other_ctx; 358 c->other_port = other_port; 359 refcount_set(&c->refcount, 1); 360 361 list_add(&c->list, &ctx->crosschip_links); 362 363 return 0; 364 } 365 366 static void dsa_8021q_crosschip_link_del(struct dsa_8021q_context *ctx, 367 struct dsa_8021q_crosschip_link *c, 368 bool *keep) 369 { 370 *keep = !refcount_dec_and_test(&c->refcount); 371 372 if (*keep) 373 return; 374 375 dev_dbg(ctx->ds->dev, 376 "deleting crosschip link from port %d to %s port %d\n", 377 c->port, dev_name(c->other_ctx->ds->dev), c->other_port); 378 379 list_del(&c->list); 380 kfree(c); 381 } 382 383 /* Make traffic from local port @port be received by remote port @other_port. 384 * This means that our @rx_vid needs to be installed on @other_ds's upstream 385 * and user ports. The user ports should be egress-untagged so that they can 386 * pop the dsa_8021q VLAN. But the @other_upstream can be either egress-tagged 387 * or untagged: it doesn't matter, since it should never egress a frame having 388 * our @rx_vid. 389 */ 390 int dsa_8021q_crosschip_bridge_join(struct dsa_8021q_context *ctx, int port, 391 struct dsa_8021q_context *other_ctx, 392 int other_port) 393 { 394 /* @other_upstream is how @other_ds reaches us. If we are part 395 * of disjoint trees, then we are probably connected through 396 * our CPU ports. If we're part of the same tree though, we should 397 * probably use dsa_towards_port. 398 */ 399 int other_upstream = dsa_upstream_port(other_ctx->ds, other_port); 400 int rc; 401 402 rc = dsa_8021q_crosschip_link_add(ctx, port, other_ctx, other_port); 403 if (rc) 404 return rc; 405 406 rc = dsa_8021q_crosschip_link_apply(ctx, port, other_ctx, 407 other_port, true); 408 if (rc) 409 return rc; 410 411 rc = dsa_8021q_crosschip_link_add(ctx, port, other_ctx, other_upstream); 412 if (rc) 413 return rc; 414 415 return dsa_8021q_crosschip_link_apply(ctx, port, other_ctx, 416 other_upstream, true); 417 } 418 EXPORT_SYMBOL_GPL(dsa_8021q_crosschip_bridge_join); 419 420 int dsa_8021q_crosschip_bridge_leave(struct dsa_8021q_context *ctx, int port, 421 struct dsa_8021q_context *other_ctx, 422 int other_port) 423 { 424 int other_upstream = dsa_upstream_port(other_ctx->ds, other_port); 425 struct dsa_8021q_crosschip_link *c, *n; 426 427 list_for_each_entry_safe(c, n, &ctx->crosschip_links, list) { 428 if (c->port == port && c->other_ctx == other_ctx && 429 (c->other_port == other_port || 430 c->other_port == other_upstream)) { 431 struct dsa_8021q_context *other_ctx = c->other_ctx; 432 int other_port = c->other_port; 433 bool keep; 434 int rc; 435 436 dsa_8021q_crosschip_link_del(ctx, c, &keep); 437 if (keep) 438 continue; 439 440 rc = dsa_8021q_crosschip_link_apply(ctx, port, 441 other_ctx, 442 other_port, 443 false); 444 if (rc) 445 return rc; 446 } 447 } 448 449 return 0; 450 } 451 EXPORT_SYMBOL_GPL(dsa_8021q_crosschip_bridge_leave); 452 453 struct sk_buff *dsa_8021q_xmit(struct sk_buff *skb, struct net_device *netdev, 454 u16 tpid, u16 tci) 455 { 456 /* skb->data points at skb_mac_header, which 457 * is fine for vlan_insert_tag. 458 */ 459 return vlan_insert_tag(skb, htons(tpid), tci); 460 } 461 EXPORT_SYMBOL_GPL(dsa_8021q_xmit); 462 463 MODULE_LICENSE("GPL v2"); 464