1 /* 2 * linux/kernel/irq/msi.c 3 * 4 * Copyright (C) 2014 Intel Corp. 5 * Author: Jiang Liu <jiang.liu@linux.intel.com> 6 * 7 * This file is licensed under GPLv2. 8 * 9 * This file contains common code to support Message Signalled Interrupt for 10 * PCI compatible and non PCI compatible devices. 11 */ 12 #include <linux/types.h> 13 #include <linux/device.h> 14 #include <linux/irq.h> 15 #include <linux/irqdomain.h> 16 #include <linux/msi.h> 17 18 /* Temparory solution for building, will be removed later */ 19 #include <linux/pci.h> 20 21 struct msi_desc *alloc_msi_entry(struct device *dev) 22 { 23 struct msi_desc *desc = kzalloc(sizeof(*desc), GFP_KERNEL); 24 if (!desc) 25 return NULL; 26 27 INIT_LIST_HEAD(&desc->list); 28 desc->dev = dev; 29 30 return desc; 31 } 32 33 void free_msi_entry(struct msi_desc *entry) 34 { 35 kfree(entry); 36 } 37 38 void __get_cached_msi_msg(struct msi_desc *entry, struct msi_msg *msg) 39 { 40 *msg = entry->msg; 41 } 42 43 void get_cached_msi_msg(unsigned int irq, struct msi_msg *msg) 44 { 45 struct msi_desc *entry = irq_get_msi_desc(irq); 46 47 __get_cached_msi_msg(entry, msg); 48 } 49 EXPORT_SYMBOL_GPL(get_cached_msi_msg); 50 51 #ifdef CONFIG_GENERIC_MSI_IRQ_DOMAIN 52 static inline void irq_chip_write_msi_msg(struct irq_data *data, 53 struct msi_msg *msg) 54 { 55 data->chip->irq_write_msi_msg(data, msg); 56 } 57 58 /** 59 * msi_domain_set_affinity - Generic affinity setter function for MSI domains 60 * @irq_data: The irq data associated to the interrupt 61 * @mask: The affinity mask to set 62 * @force: Flag to enforce setting (disable online checks) 63 * 64 * Intended to be used by MSI interrupt controllers which are 65 * implemented with hierarchical domains. 66 */ 67 int msi_domain_set_affinity(struct irq_data *irq_data, 68 const struct cpumask *mask, bool force) 69 { 70 struct irq_data *parent = irq_data->parent_data; 71 struct msi_msg msg; 72 int ret; 73 74 ret = parent->chip->irq_set_affinity(parent, mask, force); 75 if (ret >= 0 && ret != IRQ_SET_MASK_OK_DONE) { 76 BUG_ON(irq_chip_compose_msi_msg(irq_data, &msg)); 77 irq_chip_write_msi_msg(irq_data, &msg); 78 } 79 80 return ret; 81 } 82 83 static void msi_domain_activate(struct irq_domain *domain, 84 struct irq_data *irq_data) 85 { 86 struct msi_msg msg; 87 88 BUG_ON(irq_chip_compose_msi_msg(irq_data, &msg)); 89 irq_chip_write_msi_msg(irq_data, &msg); 90 } 91 92 static void msi_domain_deactivate(struct irq_domain *domain, 93 struct irq_data *irq_data) 94 { 95 struct msi_msg msg; 96 97 memset(&msg, 0, sizeof(msg)); 98 irq_chip_write_msi_msg(irq_data, &msg); 99 } 100 101 static int msi_domain_alloc(struct irq_domain *domain, unsigned int virq, 102 unsigned int nr_irqs, void *arg) 103 { 104 struct msi_domain_info *info = domain->host_data; 105 struct msi_domain_ops *ops = info->ops; 106 irq_hw_number_t hwirq = ops->get_hwirq(info, arg); 107 int i, ret; 108 109 if (irq_find_mapping(domain, hwirq) > 0) 110 return -EEXIST; 111 112 ret = irq_domain_alloc_irqs_parent(domain, virq, nr_irqs, arg); 113 if (ret < 0) 114 return ret; 115 116 for (i = 0; i < nr_irqs; i++) { 117 ret = ops->msi_init(domain, info, virq + i, hwirq + i, arg); 118 if (ret < 0) { 119 if (ops->msi_free) { 120 for (i--; i > 0; i--) 121 ops->msi_free(domain, info, virq + i); 122 } 123 irq_domain_free_irqs_top(domain, virq, nr_irqs); 124 return ret; 125 } 126 } 127 128 return 0; 129 } 130 131 static void msi_domain_free(struct irq_domain *domain, unsigned int virq, 132 unsigned int nr_irqs) 133 { 134 struct msi_domain_info *info = domain->host_data; 135 int i; 136 137 if (info->ops->msi_free) { 138 for (i = 0; i < nr_irqs; i++) 139 info->ops->msi_free(domain, info, virq + i); 140 } 141 irq_domain_free_irqs_top(domain, virq, nr_irqs); 142 } 143 144 static const struct irq_domain_ops msi_domain_ops = { 145 .alloc = msi_domain_alloc, 146 .free = msi_domain_free, 147 .activate = msi_domain_activate, 148 .deactivate = msi_domain_deactivate, 149 }; 150 151 #ifdef GENERIC_MSI_DOMAIN_OPS 152 static irq_hw_number_t msi_domain_ops_get_hwirq(struct msi_domain_info *info, 153 msi_alloc_info_t *arg) 154 { 155 return arg->hwirq; 156 } 157 158 static int msi_domain_ops_prepare(struct irq_domain *domain, struct device *dev, 159 int nvec, msi_alloc_info_t *arg) 160 { 161 memset(arg, 0, sizeof(*arg)); 162 return 0; 163 } 164 165 static void msi_domain_ops_set_desc(msi_alloc_info_t *arg, 166 struct msi_desc *desc) 167 { 168 arg->desc = desc; 169 } 170 #else 171 #define msi_domain_ops_get_hwirq NULL 172 #define msi_domain_ops_prepare NULL 173 #define msi_domain_ops_set_desc NULL 174 #endif /* !GENERIC_MSI_DOMAIN_OPS */ 175 176 static int msi_domain_ops_init(struct irq_domain *domain, 177 struct msi_domain_info *info, 178 unsigned int virq, irq_hw_number_t hwirq, 179 msi_alloc_info_t *arg) 180 { 181 irq_domain_set_hwirq_and_chip(domain, virq, hwirq, info->chip, 182 info->chip_data); 183 if (info->handler && info->handler_name) { 184 __irq_set_handler(virq, info->handler, 0, info->handler_name); 185 if (info->handler_data) 186 irq_set_handler_data(virq, info->handler_data); 187 } 188 return 0; 189 } 190 191 static int msi_domain_ops_check(struct irq_domain *domain, 192 struct msi_domain_info *info, 193 struct device *dev) 194 { 195 return 0; 196 } 197 198 static struct msi_domain_ops msi_domain_ops_default = { 199 .get_hwirq = msi_domain_ops_get_hwirq, 200 .msi_init = msi_domain_ops_init, 201 .msi_check = msi_domain_ops_check, 202 .msi_prepare = msi_domain_ops_prepare, 203 .set_desc = msi_domain_ops_set_desc, 204 }; 205 206 static void msi_domain_update_dom_ops(struct msi_domain_info *info) 207 { 208 struct msi_domain_ops *ops = info->ops; 209 210 if (ops == NULL) { 211 info->ops = &msi_domain_ops_default; 212 return; 213 } 214 215 if (ops->get_hwirq == NULL) 216 ops->get_hwirq = msi_domain_ops_default.get_hwirq; 217 if (ops->msi_init == NULL) 218 ops->msi_init = msi_domain_ops_default.msi_init; 219 if (ops->msi_check == NULL) 220 ops->msi_check = msi_domain_ops_default.msi_check; 221 if (ops->msi_prepare == NULL) 222 ops->msi_prepare = msi_domain_ops_default.msi_prepare; 223 if (ops->set_desc == NULL) 224 ops->set_desc = msi_domain_ops_default.set_desc; 225 } 226 227 static void msi_domain_update_chip_ops(struct msi_domain_info *info) 228 { 229 struct irq_chip *chip = info->chip; 230 231 BUG_ON(!chip); 232 if (!chip->irq_mask) 233 chip->irq_mask = pci_msi_mask_irq; 234 if (!chip->irq_unmask) 235 chip->irq_unmask = pci_msi_unmask_irq; 236 if (!chip->irq_set_affinity) 237 chip->irq_set_affinity = msi_domain_set_affinity; 238 } 239 240 /** 241 * msi_create_irq_domain - Create a MSI interrupt domain 242 * @of_node: Optional device-tree node of the interrupt controller 243 * @info: MSI domain info 244 * @parent: Parent irq domain 245 */ 246 struct irq_domain *msi_create_irq_domain(struct device_node *node, 247 struct msi_domain_info *info, 248 struct irq_domain *parent) 249 { 250 if (info->flags & MSI_FLAG_USE_DEF_DOM_OPS) 251 msi_domain_update_dom_ops(info); 252 if (info->flags & MSI_FLAG_USE_DEF_CHIP_OPS) 253 msi_domain_update_chip_ops(info); 254 255 return irq_domain_add_hierarchy(parent, 0, 0, node, &msi_domain_ops, 256 info); 257 } 258 259 /** 260 * msi_domain_alloc_irqs - Allocate interrupts from a MSI interrupt domain 261 * @domain: The domain to allocate from 262 * @dev: Pointer to device struct of the device for which the interrupts 263 * are allocated 264 * @nvec: The number of interrupts to allocate 265 * 266 * Returns 0 on success or an error code. 267 */ 268 int msi_domain_alloc_irqs(struct irq_domain *domain, struct device *dev, 269 int nvec) 270 { 271 struct msi_domain_info *info = domain->host_data; 272 struct msi_domain_ops *ops = info->ops; 273 msi_alloc_info_t arg; 274 struct msi_desc *desc; 275 int i, ret, virq = -1; 276 277 ret = ops->msi_check(domain, info, dev); 278 if (ret == 0) 279 ret = ops->msi_prepare(domain, dev, nvec, &arg); 280 if (ret) 281 return ret; 282 283 for_each_msi_entry(desc, dev) { 284 ops->set_desc(&arg, desc); 285 if (info->flags & MSI_FLAG_IDENTITY_MAP) 286 virq = (int)ops->get_hwirq(info, &arg); 287 else 288 virq = -1; 289 290 virq = __irq_domain_alloc_irqs(domain, virq, desc->nvec_used, 291 dev_to_node(dev), &arg, false); 292 if (virq < 0) { 293 ret = -ENOSPC; 294 if (ops->handle_error) 295 ret = ops->handle_error(domain, desc, ret); 296 if (ops->msi_finish) 297 ops->msi_finish(&arg, ret); 298 return ret; 299 } 300 301 for (i = 0; i < desc->nvec_used; i++) 302 irq_set_msi_desc_off(virq, i, desc); 303 } 304 305 if (ops->msi_finish) 306 ops->msi_finish(&arg, 0); 307 308 for_each_msi_entry(desc, dev) { 309 if (desc->nvec_used == 1) 310 dev_dbg(dev, "irq %d for MSI\n", virq); 311 else 312 dev_dbg(dev, "irq [%d-%d] for MSI\n", 313 virq, virq + desc->nvec_used - 1); 314 } 315 316 return 0; 317 } 318 319 /** 320 * msi_domain_free_irqs - Free interrupts from a MSI interrupt @domain associated tp @dev 321 * @domain: The domain to managing the interrupts 322 * @dev: Pointer to device struct of the device for which the interrupts 323 * are free 324 */ 325 void msi_domain_free_irqs(struct irq_domain *domain, struct device *dev) 326 { 327 struct msi_desc *desc; 328 329 for_each_msi_entry(desc, dev) { 330 /* 331 * We might have failed to allocate an MSI early 332 * enough that there is no IRQ associated to this 333 * entry. If that's the case, don't do anything. 334 */ 335 if (desc->irq) { 336 irq_domain_free_irqs(desc->irq, desc->nvec_used); 337 desc->irq = 0; 338 } 339 } 340 } 341 342 /** 343 * msi_get_domain_info - Get the MSI interrupt domain info for @domain 344 * @domain: The interrupt domain to retrieve data from 345 * 346 * Returns the pointer to the msi_domain_info stored in 347 * @domain->host_data. 348 */ 349 struct msi_domain_info *msi_get_domain_info(struct irq_domain *domain) 350 { 351 return (struct msi_domain_info *)domain->host_data; 352 } 353 354 #endif /* CONFIG_GENERIC_MSI_IRQ_DOMAIN */ 355