xref: /openbmc/linux/kernel/irq/msi.c (revision b6140914)
1f3cf8bb0SJiang Liu /*
2f3cf8bb0SJiang Liu  * linux/kernel/irq/msi.c
3f3cf8bb0SJiang Liu  *
4f3cf8bb0SJiang Liu  * Copyright (C) 2014 Intel Corp.
5f3cf8bb0SJiang Liu  * Author: Jiang Liu <jiang.liu@linux.intel.com>
6f3cf8bb0SJiang Liu  *
7f3cf8bb0SJiang Liu  * This file is licensed under GPLv2.
8f3cf8bb0SJiang Liu  *
9f3cf8bb0SJiang Liu  * This file contains common code to support Message Signalled Interrupt for
10f3cf8bb0SJiang Liu  * PCI compatible and non PCI compatible devices.
11f3cf8bb0SJiang Liu  */
12aeeb5965SJiang Liu #include <linux/types.h>
13aeeb5965SJiang Liu #include <linux/device.h>
14f3cf8bb0SJiang Liu #include <linux/irq.h>
15f3cf8bb0SJiang Liu #include <linux/irqdomain.h>
16f3cf8bb0SJiang Liu #include <linux/msi.h>
17f3cf8bb0SJiang Liu 
18d9109698SJiang Liu /* Temparory solution for building, will be removed later */
19d9109698SJiang Liu #include <linux/pci.h>
20d9109698SJiang Liu 
21aa48b6f7SJiang Liu struct msi_desc *alloc_msi_entry(struct device *dev)
22aa48b6f7SJiang Liu {
23aa48b6f7SJiang Liu 	struct msi_desc *desc = kzalloc(sizeof(*desc), GFP_KERNEL);
24aa48b6f7SJiang Liu 	if (!desc)
25aa48b6f7SJiang Liu 		return NULL;
26aa48b6f7SJiang Liu 
27aa48b6f7SJiang Liu 	INIT_LIST_HEAD(&desc->list);
28aa48b6f7SJiang Liu 	desc->dev = dev;
29aa48b6f7SJiang Liu 
30aa48b6f7SJiang Liu 	return desc;
31aa48b6f7SJiang Liu }
32aa48b6f7SJiang Liu 
33aa48b6f7SJiang Liu void free_msi_entry(struct msi_desc *entry)
34aa48b6f7SJiang Liu {
35aa48b6f7SJiang Liu 	kfree(entry);
36aa48b6f7SJiang Liu }
37aa48b6f7SJiang Liu 
3838b6a1cfSJiang Liu void __get_cached_msi_msg(struct msi_desc *entry, struct msi_msg *msg)
3938b6a1cfSJiang Liu {
4038b6a1cfSJiang Liu 	*msg = entry->msg;
4138b6a1cfSJiang Liu }
4238b6a1cfSJiang Liu 
4338b6a1cfSJiang Liu void get_cached_msi_msg(unsigned int irq, struct msi_msg *msg)
4438b6a1cfSJiang Liu {
4538b6a1cfSJiang Liu 	struct msi_desc *entry = irq_get_msi_desc(irq);
4638b6a1cfSJiang Liu 
4738b6a1cfSJiang Liu 	__get_cached_msi_msg(entry, msg);
4838b6a1cfSJiang Liu }
4938b6a1cfSJiang Liu EXPORT_SYMBOL_GPL(get_cached_msi_msg);
5038b6a1cfSJiang Liu 
51f3cf8bb0SJiang Liu #ifdef CONFIG_GENERIC_MSI_IRQ_DOMAIN
5274faaf7aSThomas Gleixner static inline void irq_chip_write_msi_msg(struct irq_data *data,
5374faaf7aSThomas Gleixner 					  struct msi_msg *msg)
5474faaf7aSThomas Gleixner {
5574faaf7aSThomas Gleixner 	data->chip->irq_write_msi_msg(data, msg);
5674faaf7aSThomas Gleixner }
5774faaf7aSThomas Gleixner 
58f3cf8bb0SJiang Liu /**
59f3cf8bb0SJiang Liu  * msi_domain_set_affinity - Generic affinity setter function for MSI domains
60f3cf8bb0SJiang Liu  * @irq_data:	The irq data associated to the interrupt
61f3cf8bb0SJiang Liu  * @mask:	The affinity mask to set
62f3cf8bb0SJiang Liu  * @force:	Flag to enforce setting (disable online checks)
63f3cf8bb0SJiang Liu  *
64f3cf8bb0SJiang Liu  * Intended to be used by MSI interrupt controllers which are
65f3cf8bb0SJiang Liu  * implemented with hierarchical domains.
66f3cf8bb0SJiang Liu  */
67f3cf8bb0SJiang Liu int msi_domain_set_affinity(struct irq_data *irq_data,
68f3cf8bb0SJiang Liu 			    const struct cpumask *mask, bool force)
69f3cf8bb0SJiang Liu {
70f3cf8bb0SJiang Liu 	struct irq_data *parent = irq_data->parent_data;
71f3cf8bb0SJiang Liu 	struct msi_msg msg;
72f3cf8bb0SJiang Liu 	int ret;
73f3cf8bb0SJiang Liu 
74f3cf8bb0SJiang Liu 	ret = parent->chip->irq_set_affinity(parent, mask, force);
75f3cf8bb0SJiang Liu 	if (ret >= 0 && ret != IRQ_SET_MASK_OK_DONE) {
76f3cf8bb0SJiang Liu 		BUG_ON(irq_chip_compose_msi_msg(irq_data, &msg));
77f3cf8bb0SJiang Liu 		irq_chip_write_msi_msg(irq_data, &msg);
78f3cf8bb0SJiang Liu 	}
79f3cf8bb0SJiang Liu 
80f3cf8bb0SJiang Liu 	return ret;
81f3cf8bb0SJiang Liu }
82f3cf8bb0SJiang Liu 
83f3cf8bb0SJiang Liu static void msi_domain_activate(struct irq_domain *domain,
84f3cf8bb0SJiang Liu 				struct irq_data *irq_data)
85f3cf8bb0SJiang Liu {
86f3cf8bb0SJiang Liu 	struct msi_msg msg;
87f3cf8bb0SJiang Liu 
88f3cf8bb0SJiang Liu 	BUG_ON(irq_chip_compose_msi_msg(irq_data, &msg));
89f3cf8bb0SJiang Liu 	irq_chip_write_msi_msg(irq_data, &msg);
90f3cf8bb0SJiang Liu }
91f3cf8bb0SJiang Liu 
92f3cf8bb0SJiang Liu static void msi_domain_deactivate(struct irq_domain *domain,
93f3cf8bb0SJiang Liu 				  struct irq_data *irq_data)
94f3cf8bb0SJiang Liu {
95f3cf8bb0SJiang Liu 	struct msi_msg msg;
96f3cf8bb0SJiang Liu 
97f3cf8bb0SJiang Liu 	memset(&msg, 0, sizeof(msg));
98f3cf8bb0SJiang Liu 	irq_chip_write_msi_msg(irq_data, &msg);
99f3cf8bb0SJiang Liu }
100f3cf8bb0SJiang Liu 
101f3cf8bb0SJiang Liu static int msi_domain_alloc(struct irq_domain *domain, unsigned int virq,
102f3cf8bb0SJiang Liu 			    unsigned int nr_irqs, void *arg)
103f3cf8bb0SJiang Liu {
104f3cf8bb0SJiang Liu 	struct msi_domain_info *info = domain->host_data;
105f3cf8bb0SJiang Liu 	struct msi_domain_ops *ops = info->ops;
106f3cf8bb0SJiang Liu 	irq_hw_number_t hwirq = ops->get_hwirq(info, arg);
107f3cf8bb0SJiang Liu 	int i, ret;
108f3cf8bb0SJiang Liu 
109f3cf8bb0SJiang Liu 	if (irq_find_mapping(domain, hwirq) > 0)
110f3cf8bb0SJiang Liu 		return -EEXIST;
111f3cf8bb0SJiang Liu 
112bf6f869fSLiu Jiang 	if (domain->parent) {
113f3cf8bb0SJiang Liu 		ret = irq_domain_alloc_irqs_parent(domain, virq, nr_irqs, arg);
114f3cf8bb0SJiang Liu 		if (ret < 0)
115f3cf8bb0SJiang Liu 			return ret;
116bf6f869fSLiu Jiang 	}
117f3cf8bb0SJiang Liu 
118f3cf8bb0SJiang Liu 	for (i = 0; i < nr_irqs; i++) {
119f3cf8bb0SJiang Liu 		ret = ops->msi_init(domain, info, virq + i, hwirq + i, arg);
120f3cf8bb0SJiang Liu 		if (ret < 0) {
121f3cf8bb0SJiang Liu 			if (ops->msi_free) {
122f3cf8bb0SJiang Liu 				for (i--; i > 0; i--)
123f3cf8bb0SJiang Liu 					ops->msi_free(domain, info, virq + i);
124f3cf8bb0SJiang Liu 			}
125f3cf8bb0SJiang Liu 			irq_domain_free_irqs_top(domain, virq, nr_irqs);
126f3cf8bb0SJiang Liu 			return ret;
127f3cf8bb0SJiang Liu 		}
128f3cf8bb0SJiang Liu 	}
129f3cf8bb0SJiang Liu 
130f3cf8bb0SJiang Liu 	return 0;
131f3cf8bb0SJiang Liu }
132f3cf8bb0SJiang Liu 
133f3cf8bb0SJiang Liu static void msi_domain_free(struct irq_domain *domain, unsigned int virq,
134f3cf8bb0SJiang Liu 			    unsigned int nr_irqs)
135f3cf8bb0SJiang Liu {
136f3cf8bb0SJiang Liu 	struct msi_domain_info *info = domain->host_data;
137f3cf8bb0SJiang Liu 	int i;
138f3cf8bb0SJiang Liu 
139f3cf8bb0SJiang Liu 	if (info->ops->msi_free) {
140f3cf8bb0SJiang Liu 		for (i = 0; i < nr_irqs; i++)
141f3cf8bb0SJiang Liu 			info->ops->msi_free(domain, info, virq + i);
142f3cf8bb0SJiang Liu 	}
143f3cf8bb0SJiang Liu 	irq_domain_free_irqs_top(domain, virq, nr_irqs);
144f3cf8bb0SJiang Liu }
145f3cf8bb0SJiang Liu 
14601364028SKrzysztof Kozlowski static const struct irq_domain_ops msi_domain_ops = {
147f3cf8bb0SJiang Liu 	.alloc		= msi_domain_alloc,
148f3cf8bb0SJiang Liu 	.free		= msi_domain_free,
149f3cf8bb0SJiang Liu 	.activate	= msi_domain_activate,
150f3cf8bb0SJiang Liu 	.deactivate	= msi_domain_deactivate,
151f3cf8bb0SJiang Liu };
152f3cf8bb0SJiang Liu 
153aeeb5965SJiang Liu #ifdef GENERIC_MSI_DOMAIN_OPS
154aeeb5965SJiang Liu static irq_hw_number_t msi_domain_ops_get_hwirq(struct msi_domain_info *info,
155aeeb5965SJiang Liu 						msi_alloc_info_t *arg)
156aeeb5965SJiang Liu {
157aeeb5965SJiang Liu 	return arg->hwirq;
158aeeb5965SJiang Liu }
159aeeb5965SJiang Liu 
160aeeb5965SJiang Liu static int msi_domain_ops_prepare(struct irq_domain *domain, struct device *dev,
161aeeb5965SJiang Liu 				  int nvec, msi_alloc_info_t *arg)
162aeeb5965SJiang Liu {
163aeeb5965SJiang Liu 	memset(arg, 0, sizeof(*arg));
164aeeb5965SJiang Liu 	return 0;
165aeeb5965SJiang Liu }
166aeeb5965SJiang Liu 
167aeeb5965SJiang Liu static void msi_domain_ops_set_desc(msi_alloc_info_t *arg,
168aeeb5965SJiang Liu 				    struct msi_desc *desc)
169aeeb5965SJiang Liu {
170aeeb5965SJiang Liu 	arg->desc = desc;
171aeeb5965SJiang Liu }
172aeeb5965SJiang Liu #else
173aeeb5965SJiang Liu #define msi_domain_ops_get_hwirq	NULL
174aeeb5965SJiang Liu #define msi_domain_ops_prepare		NULL
175aeeb5965SJiang Liu #define msi_domain_ops_set_desc		NULL
176aeeb5965SJiang Liu #endif /* !GENERIC_MSI_DOMAIN_OPS */
177aeeb5965SJiang Liu 
178aeeb5965SJiang Liu static int msi_domain_ops_init(struct irq_domain *domain,
179aeeb5965SJiang Liu 			       struct msi_domain_info *info,
180aeeb5965SJiang Liu 			       unsigned int virq, irq_hw_number_t hwirq,
181aeeb5965SJiang Liu 			       msi_alloc_info_t *arg)
182aeeb5965SJiang Liu {
183aeeb5965SJiang Liu 	irq_domain_set_hwirq_and_chip(domain, virq, hwirq, info->chip,
184aeeb5965SJiang Liu 				      info->chip_data);
185aeeb5965SJiang Liu 	if (info->handler && info->handler_name) {
186aeeb5965SJiang Liu 		__irq_set_handler(virq, info->handler, 0, info->handler_name);
187aeeb5965SJiang Liu 		if (info->handler_data)
188aeeb5965SJiang Liu 			irq_set_handler_data(virq, info->handler_data);
189aeeb5965SJiang Liu 	}
190aeeb5965SJiang Liu 	return 0;
191aeeb5965SJiang Liu }
192aeeb5965SJiang Liu 
193aeeb5965SJiang Liu static int msi_domain_ops_check(struct irq_domain *domain,
194aeeb5965SJiang Liu 				struct msi_domain_info *info,
195aeeb5965SJiang Liu 				struct device *dev)
196aeeb5965SJiang Liu {
197aeeb5965SJiang Liu 	return 0;
198aeeb5965SJiang Liu }
199aeeb5965SJiang Liu 
200aeeb5965SJiang Liu static struct msi_domain_ops msi_domain_ops_default = {
201aeeb5965SJiang Liu 	.get_hwirq	= msi_domain_ops_get_hwirq,
202aeeb5965SJiang Liu 	.msi_init	= msi_domain_ops_init,
203aeeb5965SJiang Liu 	.msi_check	= msi_domain_ops_check,
204aeeb5965SJiang Liu 	.msi_prepare	= msi_domain_ops_prepare,
205aeeb5965SJiang Liu 	.set_desc	= msi_domain_ops_set_desc,
206aeeb5965SJiang Liu };
207aeeb5965SJiang Liu 
208aeeb5965SJiang Liu static void msi_domain_update_dom_ops(struct msi_domain_info *info)
209aeeb5965SJiang Liu {
210aeeb5965SJiang Liu 	struct msi_domain_ops *ops = info->ops;
211aeeb5965SJiang Liu 
212aeeb5965SJiang Liu 	if (ops == NULL) {
213aeeb5965SJiang Liu 		info->ops = &msi_domain_ops_default;
214aeeb5965SJiang Liu 		return;
215aeeb5965SJiang Liu 	}
216aeeb5965SJiang Liu 
217aeeb5965SJiang Liu 	if (ops->get_hwirq == NULL)
218aeeb5965SJiang Liu 		ops->get_hwirq = msi_domain_ops_default.get_hwirq;
219aeeb5965SJiang Liu 	if (ops->msi_init == NULL)
220aeeb5965SJiang Liu 		ops->msi_init = msi_domain_ops_default.msi_init;
221aeeb5965SJiang Liu 	if (ops->msi_check == NULL)
222aeeb5965SJiang Liu 		ops->msi_check = msi_domain_ops_default.msi_check;
223aeeb5965SJiang Liu 	if (ops->msi_prepare == NULL)
224aeeb5965SJiang Liu 		ops->msi_prepare = msi_domain_ops_default.msi_prepare;
225aeeb5965SJiang Liu 	if (ops->set_desc == NULL)
226aeeb5965SJiang Liu 		ops->set_desc = msi_domain_ops_default.set_desc;
227aeeb5965SJiang Liu }
228aeeb5965SJiang Liu 
229aeeb5965SJiang Liu static void msi_domain_update_chip_ops(struct msi_domain_info *info)
230aeeb5965SJiang Liu {
231aeeb5965SJiang Liu 	struct irq_chip *chip = info->chip;
232aeeb5965SJiang Liu 
2330701c53eSMarc Zyngier 	BUG_ON(!chip || !chip->irq_mask || !chip->irq_unmask);
234aeeb5965SJiang Liu 	if (!chip->irq_set_affinity)
235aeeb5965SJiang Liu 		chip->irq_set_affinity = msi_domain_set_affinity;
236aeeb5965SJiang Liu }
237aeeb5965SJiang Liu 
238f3cf8bb0SJiang Liu /**
239f3cf8bb0SJiang Liu  * msi_create_irq_domain - Create a MSI interrupt domain
240be5436c8SMarc Zyngier  * @fwnode:	Optional fwnode of the interrupt controller
241f3cf8bb0SJiang Liu  * @info:	MSI domain info
242f3cf8bb0SJiang Liu  * @parent:	Parent irq domain
243f3cf8bb0SJiang Liu  */
244be5436c8SMarc Zyngier struct irq_domain *msi_create_irq_domain(struct fwnode_handle *fwnode,
245f3cf8bb0SJiang Liu 					 struct msi_domain_info *info,
246f3cf8bb0SJiang Liu 					 struct irq_domain *parent)
247f3cf8bb0SJiang Liu {
248aeeb5965SJiang Liu 	if (info->flags & MSI_FLAG_USE_DEF_DOM_OPS)
249aeeb5965SJiang Liu 		msi_domain_update_dom_ops(info);
250aeeb5965SJiang Liu 	if (info->flags & MSI_FLAG_USE_DEF_CHIP_OPS)
251aeeb5965SJiang Liu 		msi_domain_update_chip_ops(info);
252f3cf8bb0SJiang Liu 
253be5436c8SMarc Zyngier 	return irq_domain_create_hierarchy(parent, 0, 0, fwnode,
254be5436c8SMarc Zyngier 					   &msi_domain_ops, info);
255f3cf8bb0SJiang Liu }
256f3cf8bb0SJiang Liu 
257b2eba39bSMarc Zyngier int msi_domain_prepare_irqs(struct irq_domain *domain, struct device *dev,
258b2eba39bSMarc Zyngier 			    int nvec, msi_alloc_info_t *arg)
259b2eba39bSMarc Zyngier {
260b2eba39bSMarc Zyngier 	struct msi_domain_info *info = domain->host_data;
261b2eba39bSMarc Zyngier 	struct msi_domain_ops *ops = info->ops;
262b2eba39bSMarc Zyngier 	int ret;
263b2eba39bSMarc Zyngier 
264b2eba39bSMarc Zyngier 	ret = ops->msi_check(domain, info, dev);
265b2eba39bSMarc Zyngier 	if (ret == 0)
266b2eba39bSMarc Zyngier 		ret = ops->msi_prepare(domain, dev, nvec, arg);
267b2eba39bSMarc Zyngier 
268b2eba39bSMarc Zyngier 	return ret;
269b2eba39bSMarc Zyngier }
270b2eba39bSMarc Zyngier 
2712145ac93SMarc Zyngier int msi_domain_populate_irqs(struct irq_domain *domain, struct device *dev,
2722145ac93SMarc Zyngier 			     int virq, int nvec, msi_alloc_info_t *arg)
2732145ac93SMarc Zyngier {
2742145ac93SMarc Zyngier 	struct msi_domain_info *info = domain->host_data;
2752145ac93SMarc Zyngier 	struct msi_domain_ops *ops = info->ops;
2762145ac93SMarc Zyngier 	struct msi_desc *desc;
2772145ac93SMarc Zyngier 	int ret = 0;
2782145ac93SMarc Zyngier 
2792145ac93SMarc Zyngier 	for_each_msi_entry(desc, dev) {
2802145ac93SMarc Zyngier 		/* Don't even try the multi-MSI brain damage. */
2812145ac93SMarc Zyngier 		if (WARN_ON(!desc->irq || desc->nvec_used != 1)) {
2822145ac93SMarc Zyngier 			ret = -EINVAL;
2832145ac93SMarc Zyngier 			break;
2842145ac93SMarc Zyngier 		}
2852145ac93SMarc Zyngier 
2862145ac93SMarc Zyngier 		if (!(desc->irq >= virq && desc->irq < (virq + nvec)))
2872145ac93SMarc Zyngier 			continue;
2882145ac93SMarc Zyngier 
2892145ac93SMarc Zyngier 		ops->set_desc(arg, desc);
2902145ac93SMarc Zyngier 		/* Assumes the domain mutex is held! */
2912145ac93SMarc Zyngier 		ret = irq_domain_alloc_irqs_recursive(domain, virq, 1, arg);
2922145ac93SMarc Zyngier 		if (ret)
2932145ac93SMarc Zyngier 			break;
2942145ac93SMarc Zyngier 
2952145ac93SMarc Zyngier 		irq_set_msi_desc_off(virq, 0, desc);
2962145ac93SMarc Zyngier 	}
2972145ac93SMarc Zyngier 
2982145ac93SMarc Zyngier 	if (ret) {
2992145ac93SMarc Zyngier 		/* Mop up the damage */
3002145ac93SMarc Zyngier 		for_each_msi_entry(desc, dev) {
3012145ac93SMarc Zyngier 			if (!(desc->irq >= virq && desc->irq < (virq + nvec)))
3022145ac93SMarc Zyngier 				continue;
3032145ac93SMarc Zyngier 
3042145ac93SMarc Zyngier 			irq_domain_free_irqs_common(domain, desc->irq, 1);
3052145ac93SMarc Zyngier 		}
3062145ac93SMarc Zyngier 	}
3072145ac93SMarc Zyngier 
3082145ac93SMarc Zyngier 	return ret;
3092145ac93SMarc Zyngier }
3102145ac93SMarc Zyngier 
311f3cf8bb0SJiang Liu /**
312d9109698SJiang Liu  * msi_domain_alloc_irqs - Allocate interrupts from a MSI interrupt domain
313d9109698SJiang Liu  * @domain:	The domain to allocate from
314d9109698SJiang Liu  * @dev:	Pointer to device struct of the device for which the interrupts
315d9109698SJiang Liu  *		are allocated
316d9109698SJiang Liu  * @nvec:	The number of interrupts to allocate
317d9109698SJiang Liu  *
318d9109698SJiang Liu  * Returns 0 on success or an error code.
319d9109698SJiang Liu  */
320d9109698SJiang Liu int msi_domain_alloc_irqs(struct irq_domain *domain, struct device *dev,
321d9109698SJiang Liu 			  int nvec)
322d9109698SJiang Liu {
323d9109698SJiang Liu 	struct msi_domain_info *info = domain->host_data;
324d9109698SJiang Liu 	struct msi_domain_ops *ops = info->ops;
325d9109698SJiang Liu 	msi_alloc_info_t arg;
326d9109698SJiang Liu 	struct msi_desc *desc;
327b6140914SThomas Gleixner 	int i, ret, virq;
328d9109698SJiang Liu 
329b2eba39bSMarc Zyngier 	ret = msi_domain_prepare_irqs(domain, dev, nvec, &arg);
330d9109698SJiang Liu 	if (ret)
331d9109698SJiang Liu 		return ret;
332d9109698SJiang Liu 
333d9109698SJiang Liu 	for_each_msi_entry(desc, dev) {
334d9109698SJiang Liu 		ops->set_desc(&arg, desc);
335d9109698SJiang Liu 
336b6140914SThomas Gleixner 		virq = __irq_domain_alloc_irqs(domain, -1, desc->nvec_used,
337d9109698SJiang Liu 					       dev_to_node(dev), &arg, false);
338d9109698SJiang Liu 		if (virq < 0) {
339d9109698SJiang Liu 			ret = -ENOSPC;
340d9109698SJiang Liu 			if (ops->handle_error)
341d9109698SJiang Liu 				ret = ops->handle_error(domain, desc, ret);
342d9109698SJiang Liu 			if (ops->msi_finish)
343d9109698SJiang Liu 				ops->msi_finish(&arg, ret);
344d9109698SJiang Liu 			return ret;
345d9109698SJiang Liu 		}
346d9109698SJiang Liu 
347d9109698SJiang Liu 		for (i = 0; i < desc->nvec_used; i++)
348d9109698SJiang Liu 			irq_set_msi_desc_off(virq, i, desc);
349d9109698SJiang Liu 	}
350d9109698SJiang Liu 
351d9109698SJiang Liu 	if (ops->msi_finish)
352d9109698SJiang Liu 		ops->msi_finish(&arg, 0);
353d9109698SJiang Liu 
354d9109698SJiang Liu 	for_each_msi_entry(desc, dev) {
355d9109698SJiang Liu 		if (desc->nvec_used == 1)
356d9109698SJiang Liu 			dev_dbg(dev, "irq %d for MSI\n", virq);
357d9109698SJiang Liu 		else
358d9109698SJiang Liu 			dev_dbg(dev, "irq [%d-%d] for MSI\n",
359d9109698SJiang Liu 				virq, virq + desc->nvec_used - 1);
360d9109698SJiang Liu 	}
361d9109698SJiang Liu 
362d9109698SJiang Liu 	return 0;
363d9109698SJiang Liu }
364d9109698SJiang Liu 
365d9109698SJiang Liu /**
366d9109698SJiang Liu  * msi_domain_free_irqs - Free interrupts from a MSI interrupt @domain associated tp @dev
367d9109698SJiang Liu  * @domain:	The domain to managing the interrupts
368d9109698SJiang Liu  * @dev:	Pointer to device struct of the device for which the interrupts
369d9109698SJiang Liu  *		are free
370d9109698SJiang Liu  */
371d9109698SJiang Liu void msi_domain_free_irqs(struct irq_domain *domain, struct device *dev)
372d9109698SJiang Liu {
373d9109698SJiang Liu 	struct msi_desc *desc;
374d9109698SJiang Liu 
375d9109698SJiang Liu 	for_each_msi_entry(desc, dev) {
376fe0c52fcSMarc Zyngier 		/*
377fe0c52fcSMarc Zyngier 		 * We might have failed to allocate an MSI early
378fe0c52fcSMarc Zyngier 		 * enough that there is no IRQ associated to this
379fe0c52fcSMarc Zyngier 		 * entry. If that's the case, don't do anything.
380fe0c52fcSMarc Zyngier 		 */
381fe0c52fcSMarc Zyngier 		if (desc->irq) {
382d9109698SJiang Liu 			irq_domain_free_irqs(desc->irq, desc->nvec_used);
383d9109698SJiang Liu 			desc->irq = 0;
384d9109698SJiang Liu 		}
385d9109698SJiang Liu 	}
386fe0c52fcSMarc Zyngier }
387d9109698SJiang Liu 
388d9109698SJiang Liu /**
389f3cf8bb0SJiang Liu  * msi_get_domain_info - Get the MSI interrupt domain info for @domain
390f3cf8bb0SJiang Liu  * @domain:	The interrupt domain to retrieve data from
391f3cf8bb0SJiang Liu  *
392f3cf8bb0SJiang Liu  * Returns the pointer to the msi_domain_info stored in
393f3cf8bb0SJiang Liu  * @domain->host_data.
394f3cf8bb0SJiang Liu  */
395f3cf8bb0SJiang Liu struct msi_domain_info *msi_get_domain_info(struct irq_domain *domain)
396f3cf8bb0SJiang Liu {
397f3cf8bb0SJiang Liu 	return (struct msi_domain_info *)domain->host_data;
398f3cf8bb0SJiang Liu }
399f3cf8bb0SJiang Liu 
400f3cf8bb0SJiang Liu #endif /* CONFIG_GENERIC_MSI_IRQ_DOMAIN */
401