xref: /openbmc/linux/kernel/irq/msi.c (revision 4e201566)
1f3cf8bb0SJiang Liu /*
2f3cf8bb0SJiang Liu  * linux/kernel/irq/msi.c
3f3cf8bb0SJiang Liu  *
4f3cf8bb0SJiang Liu  * Copyright (C) 2014 Intel Corp.
5f3cf8bb0SJiang Liu  * Author: Jiang Liu <jiang.liu@linux.intel.com>
6f3cf8bb0SJiang Liu  *
7f3cf8bb0SJiang Liu  * This file is licensed under GPLv2.
8f3cf8bb0SJiang Liu  *
9f3cf8bb0SJiang Liu  * This file contains common code to support Message Signalled Interrupt for
10f3cf8bb0SJiang Liu  * PCI compatible and non PCI compatible devices.
11f3cf8bb0SJiang Liu  */
12aeeb5965SJiang Liu #include <linux/types.h>
13aeeb5965SJiang Liu #include <linux/device.h>
14f3cf8bb0SJiang Liu #include <linux/irq.h>
15f3cf8bb0SJiang Liu #include <linux/irqdomain.h>
16f3cf8bb0SJiang Liu #include <linux/msi.h>
174e201566SMarc Zyngier #include <linux/slab.h>
18d9109698SJiang Liu 
1928f4b041SThomas Gleixner /**
2028f4b041SThomas Gleixner  * alloc_msi_entry - Allocate an initialize msi_entry
2128f4b041SThomas Gleixner  * @dev:	Pointer to the device for which this is allocated
2228f4b041SThomas Gleixner  * @nvec:	The number of vectors used in this entry
2328f4b041SThomas Gleixner  * @affinity:	Optional pointer to an affinity mask array size of @nvec
2428f4b041SThomas Gleixner  *
2528f4b041SThomas Gleixner  * If @affinity is not NULL then a an affinity array[@nvec] is allocated
2628f4b041SThomas Gleixner  * and the affinity masks from @affinity are copied.
2728f4b041SThomas Gleixner  */
2828f4b041SThomas Gleixner struct msi_desc *
2928f4b041SThomas Gleixner alloc_msi_entry(struct device *dev, int nvec, const struct cpumask *affinity)
30aa48b6f7SJiang Liu {
3128f4b041SThomas Gleixner 	struct msi_desc *desc;
3228f4b041SThomas Gleixner 
3328f4b041SThomas Gleixner 	desc = kzalloc(sizeof(*desc), GFP_KERNEL);
34aa48b6f7SJiang Liu 	if (!desc)
35aa48b6f7SJiang Liu 		return NULL;
36aa48b6f7SJiang Liu 
37aa48b6f7SJiang Liu 	INIT_LIST_HEAD(&desc->list);
38aa48b6f7SJiang Liu 	desc->dev = dev;
3928f4b041SThomas Gleixner 	desc->nvec_used = nvec;
4028f4b041SThomas Gleixner 	if (affinity) {
4128f4b041SThomas Gleixner 		desc->affinity = kmemdup(affinity,
4228f4b041SThomas Gleixner 			nvec * sizeof(*desc->affinity), GFP_KERNEL);
4328f4b041SThomas Gleixner 		if (!desc->affinity) {
4428f4b041SThomas Gleixner 			kfree(desc);
4528f4b041SThomas Gleixner 			return NULL;
4628f4b041SThomas Gleixner 		}
4728f4b041SThomas Gleixner 	}
48aa48b6f7SJiang Liu 
49aa48b6f7SJiang Liu 	return desc;
50aa48b6f7SJiang Liu }
51aa48b6f7SJiang Liu 
52aa48b6f7SJiang Liu void free_msi_entry(struct msi_desc *entry)
53aa48b6f7SJiang Liu {
5428f4b041SThomas Gleixner 	kfree(entry->affinity);
55aa48b6f7SJiang Liu 	kfree(entry);
56aa48b6f7SJiang Liu }
57aa48b6f7SJiang Liu 
5838b6a1cfSJiang Liu void __get_cached_msi_msg(struct msi_desc *entry, struct msi_msg *msg)
5938b6a1cfSJiang Liu {
6038b6a1cfSJiang Liu 	*msg = entry->msg;
6138b6a1cfSJiang Liu }
6238b6a1cfSJiang Liu 
6338b6a1cfSJiang Liu void get_cached_msi_msg(unsigned int irq, struct msi_msg *msg)
6438b6a1cfSJiang Liu {
6538b6a1cfSJiang Liu 	struct msi_desc *entry = irq_get_msi_desc(irq);
6638b6a1cfSJiang Liu 
6738b6a1cfSJiang Liu 	__get_cached_msi_msg(entry, msg);
6838b6a1cfSJiang Liu }
6938b6a1cfSJiang Liu EXPORT_SYMBOL_GPL(get_cached_msi_msg);
7038b6a1cfSJiang Liu 
71f3cf8bb0SJiang Liu #ifdef CONFIG_GENERIC_MSI_IRQ_DOMAIN
7274faaf7aSThomas Gleixner static inline void irq_chip_write_msi_msg(struct irq_data *data,
7374faaf7aSThomas Gleixner 					  struct msi_msg *msg)
7474faaf7aSThomas Gleixner {
7574faaf7aSThomas Gleixner 	data->chip->irq_write_msi_msg(data, msg);
7674faaf7aSThomas Gleixner }
7774faaf7aSThomas Gleixner 
78f3cf8bb0SJiang Liu /**
79f3cf8bb0SJiang Liu  * msi_domain_set_affinity - Generic affinity setter function for MSI domains
80f3cf8bb0SJiang Liu  * @irq_data:	The irq data associated to the interrupt
81f3cf8bb0SJiang Liu  * @mask:	The affinity mask to set
82f3cf8bb0SJiang Liu  * @force:	Flag to enforce setting (disable online checks)
83f3cf8bb0SJiang Liu  *
84f3cf8bb0SJiang Liu  * Intended to be used by MSI interrupt controllers which are
85f3cf8bb0SJiang Liu  * implemented with hierarchical domains.
86f3cf8bb0SJiang Liu  */
87f3cf8bb0SJiang Liu int msi_domain_set_affinity(struct irq_data *irq_data,
88f3cf8bb0SJiang Liu 			    const struct cpumask *mask, bool force)
89f3cf8bb0SJiang Liu {
90f3cf8bb0SJiang Liu 	struct irq_data *parent = irq_data->parent_data;
91f3cf8bb0SJiang Liu 	struct msi_msg msg;
92f3cf8bb0SJiang Liu 	int ret;
93f3cf8bb0SJiang Liu 
94f3cf8bb0SJiang Liu 	ret = parent->chip->irq_set_affinity(parent, mask, force);
95f3cf8bb0SJiang Liu 	if (ret >= 0 && ret != IRQ_SET_MASK_OK_DONE) {
96f3cf8bb0SJiang Liu 		BUG_ON(irq_chip_compose_msi_msg(irq_data, &msg));
97f3cf8bb0SJiang Liu 		irq_chip_write_msi_msg(irq_data, &msg);
98f3cf8bb0SJiang Liu 	}
99f3cf8bb0SJiang Liu 
100f3cf8bb0SJiang Liu 	return ret;
101f3cf8bb0SJiang Liu }
102f3cf8bb0SJiang Liu 
103f3cf8bb0SJiang Liu static void msi_domain_activate(struct irq_domain *domain,
104f3cf8bb0SJiang Liu 				struct irq_data *irq_data)
105f3cf8bb0SJiang Liu {
106f3cf8bb0SJiang Liu 	struct msi_msg msg;
107f3cf8bb0SJiang Liu 
108f3cf8bb0SJiang Liu 	BUG_ON(irq_chip_compose_msi_msg(irq_data, &msg));
109f3cf8bb0SJiang Liu 	irq_chip_write_msi_msg(irq_data, &msg);
110f3cf8bb0SJiang Liu }
111f3cf8bb0SJiang Liu 
112f3cf8bb0SJiang Liu static void msi_domain_deactivate(struct irq_domain *domain,
113f3cf8bb0SJiang Liu 				  struct irq_data *irq_data)
114f3cf8bb0SJiang Liu {
115f3cf8bb0SJiang Liu 	struct msi_msg msg;
116f3cf8bb0SJiang Liu 
117f3cf8bb0SJiang Liu 	memset(&msg, 0, sizeof(msg));
118f3cf8bb0SJiang Liu 	irq_chip_write_msi_msg(irq_data, &msg);
119f3cf8bb0SJiang Liu }
120f3cf8bb0SJiang Liu 
121f3cf8bb0SJiang Liu static int msi_domain_alloc(struct irq_domain *domain, unsigned int virq,
122f3cf8bb0SJiang Liu 			    unsigned int nr_irqs, void *arg)
123f3cf8bb0SJiang Liu {
124f3cf8bb0SJiang Liu 	struct msi_domain_info *info = domain->host_data;
125f3cf8bb0SJiang Liu 	struct msi_domain_ops *ops = info->ops;
126f3cf8bb0SJiang Liu 	irq_hw_number_t hwirq = ops->get_hwirq(info, arg);
127f3cf8bb0SJiang Liu 	int i, ret;
128f3cf8bb0SJiang Liu 
129f3cf8bb0SJiang Liu 	if (irq_find_mapping(domain, hwirq) > 0)
130f3cf8bb0SJiang Liu 		return -EEXIST;
131f3cf8bb0SJiang Liu 
132bf6f869fSLiu Jiang 	if (domain->parent) {
133f3cf8bb0SJiang Liu 		ret = irq_domain_alloc_irqs_parent(domain, virq, nr_irqs, arg);
134f3cf8bb0SJiang Liu 		if (ret < 0)
135f3cf8bb0SJiang Liu 			return ret;
136bf6f869fSLiu Jiang 	}
137f3cf8bb0SJiang Liu 
138f3cf8bb0SJiang Liu 	for (i = 0; i < nr_irqs; i++) {
139f3cf8bb0SJiang Liu 		ret = ops->msi_init(domain, info, virq + i, hwirq + i, arg);
140f3cf8bb0SJiang Liu 		if (ret < 0) {
141f3cf8bb0SJiang Liu 			if (ops->msi_free) {
142f3cf8bb0SJiang Liu 				for (i--; i > 0; i--)
143f3cf8bb0SJiang Liu 					ops->msi_free(domain, info, virq + i);
144f3cf8bb0SJiang Liu 			}
145f3cf8bb0SJiang Liu 			irq_domain_free_irqs_top(domain, virq, nr_irqs);
146f3cf8bb0SJiang Liu 			return ret;
147f3cf8bb0SJiang Liu 		}
148f3cf8bb0SJiang Liu 	}
149f3cf8bb0SJiang Liu 
150f3cf8bb0SJiang Liu 	return 0;
151f3cf8bb0SJiang Liu }
152f3cf8bb0SJiang Liu 
153f3cf8bb0SJiang Liu static void msi_domain_free(struct irq_domain *domain, unsigned int virq,
154f3cf8bb0SJiang Liu 			    unsigned int nr_irqs)
155f3cf8bb0SJiang Liu {
156f3cf8bb0SJiang Liu 	struct msi_domain_info *info = domain->host_data;
157f3cf8bb0SJiang Liu 	int i;
158f3cf8bb0SJiang Liu 
159f3cf8bb0SJiang Liu 	if (info->ops->msi_free) {
160f3cf8bb0SJiang Liu 		for (i = 0; i < nr_irqs; i++)
161f3cf8bb0SJiang Liu 			info->ops->msi_free(domain, info, virq + i);
162f3cf8bb0SJiang Liu 	}
163f3cf8bb0SJiang Liu 	irq_domain_free_irqs_top(domain, virq, nr_irqs);
164f3cf8bb0SJiang Liu }
165f3cf8bb0SJiang Liu 
16601364028SKrzysztof Kozlowski static const struct irq_domain_ops msi_domain_ops = {
167f3cf8bb0SJiang Liu 	.alloc		= msi_domain_alloc,
168f3cf8bb0SJiang Liu 	.free		= msi_domain_free,
169f3cf8bb0SJiang Liu 	.activate	= msi_domain_activate,
170f3cf8bb0SJiang Liu 	.deactivate	= msi_domain_deactivate,
171f3cf8bb0SJiang Liu };
172f3cf8bb0SJiang Liu 
173aeeb5965SJiang Liu #ifdef GENERIC_MSI_DOMAIN_OPS
174aeeb5965SJiang Liu static irq_hw_number_t msi_domain_ops_get_hwirq(struct msi_domain_info *info,
175aeeb5965SJiang Liu 						msi_alloc_info_t *arg)
176aeeb5965SJiang Liu {
177aeeb5965SJiang Liu 	return arg->hwirq;
178aeeb5965SJiang Liu }
179aeeb5965SJiang Liu 
180aeeb5965SJiang Liu static int msi_domain_ops_prepare(struct irq_domain *domain, struct device *dev,
181aeeb5965SJiang Liu 				  int nvec, msi_alloc_info_t *arg)
182aeeb5965SJiang Liu {
183aeeb5965SJiang Liu 	memset(arg, 0, sizeof(*arg));
184aeeb5965SJiang Liu 	return 0;
185aeeb5965SJiang Liu }
186aeeb5965SJiang Liu 
187aeeb5965SJiang Liu static void msi_domain_ops_set_desc(msi_alloc_info_t *arg,
188aeeb5965SJiang Liu 				    struct msi_desc *desc)
189aeeb5965SJiang Liu {
190aeeb5965SJiang Liu 	arg->desc = desc;
191aeeb5965SJiang Liu }
192aeeb5965SJiang Liu #else
193aeeb5965SJiang Liu #define msi_domain_ops_get_hwirq	NULL
194aeeb5965SJiang Liu #define msi_domain_ops_prepare		NULL
195aeeb5965SJiang Liu #define msi_domain_ops_set_desc		NULL
196aeeb5965SJiang Liu #endif /* !GENERIC_MSI_DOMAIN_OPS */
197aeeb5965SJiang Liu 
198aeeb5965SJiang Liu static int msi_domain_ops_init(struct irq_domain *domain,
199aeeb5965SJiang Liu 			       struct msi_domain_info *info,
200aeeb5965SJiang Liu 			       unsigned int virq, irq_hw_number_t hwirq,
201aeeb5965SJiang Liu 			       msi_alloc_info_t *arg)
202aeeb5965SJiang Liu {
203aeeb5965SJiang Liu 	irq_domain_set_hwirq_and_chip(domain, virq, hwirq, info->chip,
204aeeb5965SJiang Liu 				      info->chip_data);
205aeeb5965SJiang Liu 	if (info->handler && info->handler_name) {
206aeeb5965SJiang Liu 		__irq_set_handler(virq, info->handler, 0, info->handler_name);
207aeeb5965SJiang Liu 		if (info->handler_data)
208aeeb5965SJiang Liu 			irq_set_handler_data(virq, info->handler_data);
209aeeb5965SJiang Liu 	}
210aeeb5965SJiang Liu 	return 0;
211aeeb5965SJiang Liu }
212aeeb5965SJiang Liu 
213aeeb5965SJiang Liu static int msi_domain_ops_check(struct irq_domain *domain,
214aeeb5965SJiang Liu 				struct msi_domain_info *info,
215aeeb5965SJiang Liu 				struct device *dev)
216aeeb5965SJiang Liu {
217aeeb5965SJiang Liu 	return 0;
218aeeb5965SJiang Liu }
219aeeb5965SJiang Liu 
220aeeb5965SJiang Liu static struct msi_domain_ops msi_domain_ops_default = {
221aeeb5965SJiang Liu 	.get_hwirq	= msi_domain_ops_get_hwirq,
222aeeb5965SJiang Liu 	.msi_init	= msi_domain_ops_init,
223aeeb5965SJiang Liu 	.msi_check	= msi_domain_ops_check,
224aeeb5965SJiang Liu 	.msi_prepare	= msi_domain_ops_prepare,
225aeeb5965SJiang Liu 	.set_desc	= msi_domain_ops_set_desc,
226aeeb5965SJiang Liu };
227aeeb5965SJiang Liu 
228aeeb5965SJiang Liu static void msi_domain_update_dom_ops(struct msi_domain_info *info)
229aeeb5965SJiang Liu {
230aeeb5965SJiang Liu 	struct msi_domain_ops *ops = info->ops;
231aeeb5965SJiang Liu 
232aeeb5965SJiang Liu 	if (ops == NULL) {
233aeeb5965SJiang Liu 		info->ops = &msi_domain_ops_default;
234aeeb5965SJiang Liu 		return;
235aeeb5965SJiang Liu 	}
236aeeb5965SJiang Liu 
237aeeb5965SJiang Liu 	if (ops->get_hwirq == NULL)
238aeeb5965SJiang Liu 		ops->get_hwirq = msi_domain_ops_default.get_hwirq;
239aeeb5965SJiang Liu 	if (ops->msi_init == NULL)
240aeeb5965SJiang Liu 		ops->msi_init = msi_domain_ops_default.msi_init;
241aeeb5965SJiang Liu 	if (ops->msi_check == NULL)
242aeeb5965SJiang Liu 		ops->msi_check = msi_domain_ops_default.msi_check;
243aeeb5965SJiang Liu 	if (ops->msi_prepare == NULL)
244aeeb5965SJiang Liu 		ops->msi_prepare = msi_domain_ops_default.msi_prepare;
245aeeb5965SJiang Liu 	if (ops->set_desc == NULL)
246aeeb5965SJiang Liu 		ops->set_desc = msi_domain_ops_default.set_desc;
247aeeb5965SJiang Liu }
248aeeb5965SJiang Liu 
249aeeb5965SJiang Liu static void msi_domain_update_chip_ops(struct msi_domain_info *info)
250aeeb5965SJiang Liu {
251aeeb5965SJiang Liu 	struct irq_chip *chip = info->chip;
252aeeb5965SJiang Liu 
2530701c53eSMarc Zyngier 	BUG_ON(!chip || !chip->irq_mask || !chip->irq_unmask);
254aeeb5965SJiang Liu 	if (!chip->irq_set_affinity)
255aeeb5965SJiang Liu 		chip->irq_set_affinity = msi_domain_set_affinity;
256aeeb5965SJiang Liu }
257aeeb5965SJiang Liu 
258f3cf8bb0SJiang Liu /**
259f3cf8bb0SJiang Liu  * msi_create_irq_domain - Create a MSI interrupt domain
260be5436c8SMarc Zyngier  * @fwnode:	Optional fwnode of the interrupt controller
261f3cf8bb0SJiang Liu  * @info:	MSI domain info
262f3cf8bb0SJiang Liu  * @parent:	Parent irq domain
263f3cf8bb0SJiang Liu  */
264be5436c8SMarc Zyngier struct irq_domain *msi_create_irq_domain(struct fwnode_handle *fwnode,
265f3cf8bb0SJiang Liu 					 struct msi_domain_info *info,
266f3cf8bb0SJiang Liu 					 struct irq_domain *parent)
267f3cf8bb0SJiang Liu {
268aeeb5965SJiang Liu 	if (info->flags & MSI_FLAG_USE_DEF_DOM_OPS)
269aeeb5965SJiang Liu 		msi_domain_update_dom_ops(info);
270aeeb5965SJiang Liu 	if (info->flags & MSI_FLAG_USE_DEF_CHIP_OPS)
271aeeb5965SJiang Liu 		msi_domain_update_chip_ops(info);
272f3cf8bb0SJiang Liu 
273be5436c8SMarc Zyngier 	return irq_domain_create_hierarchy(parent, 0, 0, fwnode,
274be5436c8SMarc Zyngier 					   &msi_domain_ops, info);
275f3cf8bb0SJiang Liu }
276f3cf8bb0SJiang Liu 
277b2eba39bSMarc Zyngier int msi_domain_prepare_irqs(struct irq_domain *domain, struct device *dev,
278b2eba39bSMarc Zyngier 			    int nvec, msi_alloc_info_t *arg)
279b2eba39bSMarc Zyngier {
280b2eba39bSMarc Zyngier 	struct msi_domain_info *info = domain->host_data;
281b2eba39bSMarc Zyngier 	struct msi_domain_ops *ops = info->ops;
282b2eba39bSMarc Zyngier 	int ret;
283b2eba39bSMarc Zyngier 
284b2eba39bSMarc Zyngier 	ret = ops->msi_check(domain, info, dev);
285b2eba39bSMarc Zyngier 	if (ret == 0)
286b2eba39bSMarc Zyngier 		ret = ops->msi_prepare(domain, dev, nvec, arg);
287b2eba39bSMarc Zyngier 
288b2eba39bSMarc Zyngier 	return ret;
289b2eba39bSMarc Zyngier }
290b2eba39bSMarc Zyngier 
2912145ac93SMarc Zyngier int msi_domain_populate_irqs(struct irq_domain *domain, struct device *dev,
2922145ac93SMarc Zyngier 			     int virq, int nvec, msi_alloc_info_t *arg)
2932145ac93SMarc Zyngier {
2942145ac93SMarc Zyngier 	struct msi_domain_info *info = domain->host_data;
2952145ac93SMarc Zyngier 	struct msi_domain_ops *ops = info->ops;
2962145ac93SMarc Zyngier 	struct msi_desc *desc;
2972145ac93SMarc Zyngier 	int ret = 0;
2982145ac93SMarc Zyngier 
2992145ac93SMarc Zyngier 	for_each_msi_entry(desc, dev) {
3002145ac93SMarc Zyngier 		/* Don't even try the multi-MSI brain damage. */
3012145ac93SMarc Zyngier 		if (WARN_ON(!desc->irq || desc->nvec_used != 1)) {
3022145ac93SMarc Zyngier 			ret = -EINVAL;
3032145ac93SMarc Zyngier 			break;
3042145ac93SMarc Zyngier 		}
3052145ac93SMarc Zyngier 
3062145ac93SMarc Zyngier 		if (!(desc->irq >= virq && desc->irq < (virq + nvec)))
3072145ac93SMarc Zyngier 			continue;
3082145ac93SMarc Zyngier 
3092145ac93SMarc Zyngier 		ops->set_desc(arg, desc);
3102145ac93SMarc Zyngier 		/* Assumes the domain mutex is held! */
3112145ac93SMarc Zyngier 		ret = irq_domain_alloc_irqs_recursive(domain, virq, 1, arg);
3122145ac93SMarc Zyngier 		if (ret)
3132145ac93SMarc Zyngier 			break;
3142145ac93SMarc Zyngier 
3152145ac93SMarc Zyngier 		irq_set_msi_desc_off(virq, 0, desc);
3162145ac93SMarc Zyngier 	}
3172145ac93SMarc Zyngier 
3182145ac93SMarc Zyngier 	if (ret) {
3192145ac93SMarc Zyngier 		/* Mop up the damage */
3202145ac93SMarc Zyngier 		for_each_msi_entry(desc, dev) {
3212145ac93SMarc Zyngier 			if (!(desc->irq >= virq && desc->irq < (virq + nvec)))
3222145ac93SMarc Zyngier 				continue;
3232145ac93SMarc Zyngier 
3242145ac93SMarc Zyngier 			irq_domain_free_irqs_common(domain, desc->irq, 1);
3252145ac93SMarc Zyngier 		}
3262145ac93SMarc Zyngier 	}
3272145ac93SMarc Zyngier 
3282145ac93SMarc Zyngier 	return ret;
3292145ac93SMarc Zyngier }
3302145ac93SMarc Zyngier 
331f3cf8bb0SJiang Liu /**
332d9109698SJiang Liu  * msi_domain_alloc_irqs - Allocate interrupts from a MSI interrupt domain
333d9109698SJiang Liu  * @domain:	The domain to allocate from
334d9109698SJiang Liu  * @dev:	Pointer to device struct of the device for which the interrupts
335d9109698SJiang Liu  *		are allocated
336d9109698SJiang Liu  * @nvec:	The number of interrupts to allocate
337d9109698SJiang Liu  *
338d9109698SJiang Liu  * Returns 0 on success or an error code.
339d9109698SJiang Liu  */
340d9109698SJiang Liu int msi_domain_alloc_irqs(struct irq_domain *domain, struct device *dev,
341d9109698SJiang Liu 			  int nvec)
342d9109698SJiang Liu {
343d9109698SJiang Liu 	struct msi_domain_info *info = domain->host_data;
344d9109698SJiang Liu 	struct msi_domain_ops *ops = info->ops;
345d9109698SJiang Liu 	msi_alloc_info_t arg;
346d9109698SJiang Liu 	struct msi_desc *desc;
347b6140914SThomas Gleixner 	int i, ret, virq;
348d9109698SJiang Liu 
349b2eba39bSMarc Zyngier 	ret = msi_domain_prepare_irqs(domain, dev, nvec, &arg);
350d9109698SJiang Liu 	if (ret)
351d9109698SJiang Liu 		return ret;
352d9109698SJiang Liu 
353d9109698SJiang Liu 	for_each_msi_entry(desc, dev) {
354d9109698SJiang Liu 		ops->set_desc(&arg, desc);
355d9109698SJiang Liu 
356b6140914SThomas Gleixner 		virq = __irq_domain_alloc_irqs(domain, -1, desc->nvec_used,
35706ee6d57SThomas Gleixner 					       dev_to_node(dev), &arg, false,
3580972fa57SThomas Gleixner 					       desc->affinity);
359d9109698SJiang Liu 		if (virq < 0) {
360d9109698SJiang Liu 			ret = -ENOSPC;
361d9109698SJiang Liu 			if (ops->handle_error)
362d9109698SJiang Liu 				ret = ops->handle_error(domain, desc, ret);
363d9109698SJiang Liu 			if (ops->msi_finish)
364d9109698SJiang Liu 				ops->msi_finish(&arg, ret);
365d9109698SJiang Liu 			return ret;
366d9109698SJiang Liu 		}
367d9109698SJiang Liu 
368d9109698SJiang Liu 		for (i = 0; i < desc->nvec_used; i++)
369d9109698SJiang Liu 			irq_set_msi_desc_off(virq, i, desc);
370d9109698SJiang Liu 	}
371d9109698SJiang Liu 
372d9109698SJiang Liu 	if (ops->msi_finish)
373d9109698SJiang Liu 		ops->msi_finish(&arg, 0);
374d9109698SJiang Liu 
375d9109698SJiang Liu 	for_each_msi_entry(desc, dev) {
3764364e1a2SThomas Gleixner 		virq = desc->irq;
377d9109698SJiang Liu 		if (desc->nvec_used == 1)
378d9109698SJiang Liu 			dev_dbg(dev, "irq %d for MSI\n", virq);
379d9109698SJiang Liu 		else
380d9109698SJiang Liu 			dev_dbg(dev, "irq [%d-%d] for MSI\n",
381d9109698SJiang Liu 				virq, virq + desc->nvec_used - 1);
382f3b0946dSMarc Zyngier 		/*
383f3b0946dSMarc Zyngier 		 * This flag is set by the PCI layer as we need to activate
384f3b0946dSMarc Zyngier 		 * the MSI entries before the PCI layer enables MSI in the
385f3b0946dSMarc Zyngier 		 * card. Otherwise the card latches a random msi message.
386f3b0946dSMarc Zyngier 		 */
387f3b0946dSMarc Zyngier 		if (info->flags & MSI_FLAG_ACTIVATE_EARLY) {
388f3b0946dSMarc Zyngier 			struct irq_data *irq_data;
389f3b0946dSMarc Zyngier 
390f3b0946dSMarc Zyngier 			irq_data = irq_domain_get_irq_data(domain, desc->irq);
391f3b0946dSMarc Zyngier 			irq_domain_activate_irq(irq_data);
392f3b0946dSMarc Zyngier 		}
393d9109698SJiang Liu 	}
394d9109698SJiang Liu 
395d9109698SJiang Liu 	return 0;
396d9109698SJiang Liu }
397d9109698SJiang Liu 
398d9109698SJiang Liu /**
399d9109698SJiang Liu  * msi_domain_free_irqs - Free interrupts from a MSI interrupt @domain associated tp @dev
400d9109698SJiang Liu  * @domain:	The domain to managing the interrupts
401d9109698SJiang Liu  * @dev:	Pointer to device struct of the device for which the interrupts
402d9109698SJiang Liu  *		are free
403d9109698SJiang Liu  */
404d9109698SJiang Liu void msi_domain_free_irqs(struct irq_domain *domain, struct device *dev)
405d9109698SJiang Liu {
406d9109698SJiang Liu 	struct msi_desc *desc;
407d9109698SJiang Liu 
408d9109698SJiang Liu 	for_each_msi_entry(desc, dev) {
409fe0c52fcSMarc Zyngier 		/*
410fe0c52fcSMarc Zyngier 		 * We might have failed to allocate an MSI early
411fe0c52fcSMarc Zyngier 		 * enough that there is no IRQ associated to this
412fe0c52fcSMarc Zyngier 		 * entry. If that's the case, don't do anything.
413fe0c52fcSMarc Zyngier 		 */
414fe0c52fcSMarc Zyngier 		if (desc->irq) {
415d9109698SJiang Liu 			irq_domain_free_irqs(desc->irq, desc->nvec_used);
416d9109698SJiang Liu 			desc->irq = 0;
417d9109698SJiang Liu 		}
418d9109698SJiang Liu 	}
419fe0c52fcSMarc Zyngier }
420d9109698SJiang Liu 
421d9109698SJiang Liu /**
422f3cf8bb0SJiang Liu  * msi_get_domain_info - Get the MSI interrupt domain info for @domain
423f3cf8bb0SJiang Liu  * @domain:	The interrupt domain to retrieve data from
424f3cf8bb0SJiang Liu  *
425f3cf8bb0SJiang Liu  * Returns the pointer to the msi_domain_info stored in
426f3cf8bb0SJiang Liu  * @domain->host_data.
427f3cf8bb0SJiang Liu  */
428f3cf8bb0SJiang Liu struct msi_domain_info *msi_get_domain_info(struct irq_domain *domain)
429f3cf8bb0SJiang Liu {
430f3cf8bb0SJiang Liu 	return (struct msi_domain_info *)domain->host_data;
431f3cf8bb0SJiang Liu }
432f3cf8bb0SJiang Liu 
433f3cf8bb0SJiang Liu #endif /* CONFIG_GENERIC_MSI_IRQ_DOMAIN */
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