xref: /openbmc/linux/kernel/irq/chip.c (revision 565d76cb)
1 /*
2  * linux/kernel/irq/chip.c
3  *
4  * Copyright (C) 1992, 1998-2006 Linus Torvalds, Ingo Molnar
5  * Copyright (C) 2005-2006, Thomas Gleixner, Russell King
6  *
7  * This file contains the core interrupt handling code, for irq-chip
8  * based architectures.
9  *
10  * Detailed information is available in Documentation/DocBook/genericirq
11  */
12 
13 #include <linux/irq.h>
14 #include <linux/msi.h>
15 #include <linux/module.h>
16 #include <linux/interrupt.h>
17 #include <linux/kernel_stat.h>
18 
19 #include "internals.h"
20 
21 /**
22  *	irq_set_chip - set the irq chip for an irq
23  *	@irq:	irq number
24  *	@chip:	pointer to irq chip description structure
25  */
26 int irq_set_chip(unsigned int irq, struct irq_chip *chip)
27 {
28 	unsigned long flags;
29 	struct irq_desc *desc = irq_get_desc_lock(irq, &flags);
30 
31 	if (!desc)
32 		return -EINVAL;
33 
34 	if (!chip)
35 		chip = &no_irq_chip;
36 
37 	irq_chip_set_defaults(chip);
38 	desc->irq_data.chip = chip;
39 	irq_put_desc_unlock(desc, flags);
40 	return 0;
41 }
42 EXPORT_SYMBOL(irq_set_chip);
43 
44 /**
45  *	irq_set_type - set the irq trigger type for an irq
46  *	@irq:	irq number
47  *	@type:	IRQ_TYPE_{LEVEL,EDGE}_* value - see include/linux/irq.h
48  */
49 int irq_set_irq_type(unsigned int irq, unsigned int type)
50 {
51 	unsigned long flags;
52 	struct irq_desc *desc = irq_get_desc_buslock(irq, &flags);
53 	int ret = 0;
54 
55 	if (!desc)
56 		return -EINVAL;
57 
58 	type &= IRQ_TYPE_SENSE_MASK;
59 	if (type != IRQ_TYPE_NONE)
60 		ret = __irq_set_trigger(desc, irq, type);
61 	irq_put_desc_busunlock(desc, flags);
62 	return ret;
63 }
64 EXPORT_SYMBOL(irq_set_irq_type);
65 
66 /**
67  *	irq_set_handler_data - set irq handler data for an irq
68  *	@irq:	Interrupt number
69  *	@data:	Pointer to interrupt specific data
70  *
71  *	Set the hardware irq controller data for an irq
72  */
73 int irq_set_handler_data(unsigned int irq, void *data)
74 {
75 	unsigned long flags;
76 	struct irq_desc *desc = irq_get_desc_lock(irq, &flags);
77 
78 	if (!desc)
79 		return -EINVAL;
80 	desc->irq_data.handler_data = data;
81 	irq_put_desc_unlock(desc, flags);
82 	return 0;
83 }
84 EXPORT_SYMBOL(irq_set_handler_data);
85 
86 /**
87  *	irq_set_msi_desc - set MSI descriptor data for an irq
88  *	@irq:	Interrupt number
89  *	@entry:	Pointer to MSI descriptor data
90  *
91  *	Set the MSI descriptor entry for an irq
92  */
93 int irq_set_msi_desc(unsigned int irq, struct msi_desc *entry)
94 {
95 	unsigned long flags;
96 	struct irq_desc *desc = irq_get_desc_lock(irq, &flags);
97 
98 	if (!desc)
99 		return -EINVAL;
100 	desc->irq_data.msi_desc = entry;
101 	if (entry)
102 		entry->irq = irq;
103 	irq_put_desc_unlock(desc, flags);
104 	return 0;
105 }
106 
107 /**
108  *	irq_set_chip_data - set irq chip data for an irq
109  *	@irq:	Interrupt number
110  *	@data:	Pointer to chip specific data
111  *
112  *	Set the hardware irq chip data for an irq
113  */
114 int irq_set_chip_data(unsigned int irq, void *data)
115 {
116 	unsigned long flags;
117 	struct irq_desc *desc = irq_get_desc_lock(irq, &flags);
118 
119 	if (!desc)
120 		return -EINVAL;
121 	desc->irq_data.chip_data = data;
122 	irq_put_desc_unlock(desc, flags);
123 	return 0;
124 }
125 EXPORT_SYMBOL(irq_set_chip_data);
126 
127 struct irq_data *irq_get_irq_data(unsigned int irq)
128 {
129 	struct irq_desc *desc = irq_to_desc(irq);
130 
131 	return desc ? &desc->irq_data : NULL;
132 }
133 EXPORT_SYMBOL_GPL(irq_get_irq_data);
134 
135 static void irq_state_clr_disabled(struct irq_desc *desc)
136 {
137 	desc->istate &= ~IRQS_DISABLED;
138 	irq_compat_clr_disabled(desc);
139 }
140 
141 static void irq_state_set_disabled(struct irq_desc *desc)
142 {
143 	desc->istate |= IRQS_DISABLED;
144 	irq_compat_set_disabled(desc);
145 }
146 
147 static void irq_state_clr_masked(struct irq_desc *desc)
148 {
149 	desc->istate &= ~IRQS_MASKED;
150 	irq_compat_clr_masked(desc);
151 }
152 
153 static void irq_state_set_masked(struct irq_desc *desc)
154 {
155 	desc->istate |= IRQS_MASKED;
156 	irq_compat_set_masked(desc);
157 }
158 
159 int irq_startup(struct irq_desc *desc)
160 {
161 	irq_state_clr_disabled(desc);
162 	desc->depth = 0;
163 
164 	if (desc->irq_data.chip->irq_startup) {
165 		int ret = desc->irq_data.chip->irq_startup(&desc->irq_data);
166 		irq_state_clr_masked(desc);
167 		return ret;
168 	}
169 
170 	irq_enable(desc);
171 	return 0;
172 }
173 
174 void irq_shutdown(struct irq_desc *desc)
175 {
176 	irq_state_set_disabled(desc);
177 	desc->depth = 1;
178 	if (desc->irq_data.chip->irq_shutdown)
179 		desc->irq_data.chip->irq_shutdown(&desc->irq_data);
180 	if (desc->irq_data.chip->irq_disable)
181 		desc->irq_data.chip->irq_disable(&desc->irq_data);
182 	else
183 		desc->irq_data.chip->irq_mask(&desc->irq_data);
184 	irq_state_set_masked(desc);
185 }
186 
187 void irq_enable(struct irq_desc *desc)
188 {
189 	irq_state_clr_disabled(desc);
190 	if (desc->irq_data.chip->irq_enable)
191 		desc->irq_data.chip->irq_enable(&desc->irq_data);
192 	else
193 		desc->irq_data.chip->irq_unmask(&desc->irq_data);
194 	irq_state_clr_masked(desc);
195 }
196 
197 void irq_disable(struct irq_desc *desc)
198 {
199 	irq_state_set_disabled(desc);
200 	if (desc->irq_data.chip->irq_disable) {
201 		desc->irq_data.chip->irq_disable(&desc->irq_data);
202 		irq_state_set_masked(desc);
203 	}
204 }
205 
206 #ifndef CONFIG_GENERIC_HARDIRQS_NO_DEPRECATED
207 /* Temporary migration helpers */
208 static void compat_irq_mask(struct irq_data *data)
209 {
210 	data->chip->mask(data->irq);
211 }
212 
213 static void compat_irq_unmask(struct irq_data *data)
214 {
215 	data->chip->unmask(data->irq);
216 }
217 
218 static void compat_irq_ack(struct irq_data *data)
219 {
220 	data->chip->ack(data->irq);
221 }
222 
223 static void compat_irq_mask_ack(struct irq_data *data)
224 {
225 	data->chip->mask_ack(data->irq);
226 }
227 
228 static void compat_irq_eoi(struct irq_data *data)
229 {
230 	data->chip->eoi(data->irq);
231 }
232 
233 static void compat_irq_enable(struct irq_data *data)
234 {
235 	data->chip->enable(data->irq);
236 }
237 
238 static void compat_irq_disable(struct irq_data *data)
239 {
240 	data->chip->disable(data->irq);
241 }
242 
243 static void compat_irq_shutdown(struct irq_data *data)
244 {
245 	data->chip->shutdown(data->irq);
246 }
247 
248 static unsigned int compat_irq_startup(struct irq_data *data)
249 {
250 	return data->chip->startup(data->irq);
251 }
252 
253 static int compat_irq_set_affinity(struct irq_data *data,
254 				   const struct cpumask *dest, bool force)
255 {
256 	return data->chip->set_affinity(data->irq, dest);
257 }
258 
259 static int compat_irq_set_type(struct irq_data *data, unsigned int type)
260 {
261 	return data->chip->set_type(data->irq, type);
262 }
263 
264 static int compat_irq_set_wake(struct irq_data *data, unsigned int on)
265 {
266 	return data->chip->set_wake(data->irq, on);
267 }
268 
269 static int compat_irq_retrigger(struct irq_data *data)
270 {
271 	return data->chip->retrigger(data->irq);
272 }
273 
274 static void compat_bus_lock(struct irq_data *data)
275 {
276 	data->chip->bus_lock(data->irq);
277 }
278 
279 static void compat_bus_sync_unlock(struct irq_data *data)
280 {
281 	data->chip->bus_sync_unlock(data->irq);
282 }
283 #endif
284 
285 /*
286  * Fixup enable/disable function pointers
287  */
288 void irq_chip_set_defaults(struct irq_chip *chip)
289 {
290 #ifndef CONFIG_GENERIC_HARDIRQS_NO_DEPRECATED
291 	if (chip->enable)
292 		chip->irq_enable = compat_irq_enable;
293 	if (chip->disable)
294 		chip->irq_disable = compat_irq_disable;
295 	if (chip->shutdown)
296 		chip->irq_shutdown = compat_irq_shutdown;
297 	if (chip->startup)
298 		chip->irq_startup = compat_irq_startup;
299 	if (!chip->end)
300 		chip->end = dummy_irq_chip.end;
301 	if (chip->bus_lock)
302 		chip->irq_bus_lock = compat_bus_lock;
303 	if (chip->bus_sync_unlock)
304 		chip->irq_bus_sync_unlock = compat_bus_sync_unlock;
305 	if (chip->mask)
306 		chip->irq_mask = compat_irq_mask;
307 	if (chip->unmask)
308 		chip->irq_unmask = compat_irq_unmask;
309 	if (chip->ack)
310 		chip->irq_ack = compat_irq_ack;
311 	if (chip->mask_ack)
312 		chip->irq_mask_ack = compat_irq_mask_ack;
313 	if (chip->eoi)
314 		chip->irq_eoi = compat_irq_eoi;
315 	if (chip->set_affinity)
316 		chip->irq_set_affinity = compat_irq_set_affinity;
317 	if (chip->set_type)
318 		chip->irq_set_type = compat_irq_set_type;
319 	if (chip->set_wake)
320 		chip->irq_set_wake = compat_irq_set_wake;
321 	if (chip->retrigger)
322 		chip->irq_retrigger = compat_irq_retrigger;
323 #endif
324 }
325 
326 static inline void mask_ack_irq(struct irq_desc *desc)
327 {
328 	if (desc->irq_data.chip->irq_mask_ack)
329 		desc->irq_data.chip->irq_mask_ack(&desc->irq_data);
330 	else {
331 		desc->irq_data.chip->irq_mask(&desc->irq_data);
332 		if (desc->irq_data.chip->irq_ack)
333 			desc->irq_data.chip->irq_ack(&desc->irq_data);
334 	}
335 	irq_state_set_masked(desc);
336 }
337 
338 void mask_irq(struct irq_desc *desc)
339 {
340 	if (desc->irq_data.chip->irq_mask) {
341 		desc->irq_data.chip->irq_mask(&desc->irq_data);
342 		irq_state_set_masked(desc);
343 	}
344 }
345 
346 void unmask_irq(struct irq_desc *desc)
347 {
348 	if (desc->irq_data.chip->irq_unmask) {
349 		desc->irq_data.chip->irq_unmask(&desc->irq_data);
350 		irq_state_clr_masked(desc);
351 	}
352 }
353 
354 /*
355  *	handle_nested_irq - Handle a nested irq from a irq thread
356  *	@irq:	the interrupt number
357  *
358  *	Handle interrupts which are nested into a threaded interrupt
359  *	handler. The handler function is called inside the calling
360  *	threads context.
361  */
362 void handle_nested_irq(unsigned int irq)
363 {
364 	struct irq_desc *desc = irq_to_desc(irq);
365 	struct irqaction *action;
366 	irqreturn_t action_ret;
367 
368 	might_sleep();
369 
370 	raw_spin_lock_irq(&desc->lock);
371 
372 	kstat_incr_irqs_this_cpu(irq, desc);
373 
374 	action = desc->action;
375 	if (unlikely(!action || (desc->istate & IRQS_DISABLED)))
376 		goto out_unlock;
377 
378 	irq_compat_set_progress(desc);
379 	desc->istate |= IRQS_INPROGRESS;
380 	raw_spin_unlock_irq(&desc->lock);
381 
382 	action_ret = action->thread_fn(action->irq, action->dev_id);
383 	if (!noirqdebug)
384 		note_interrupt(irq, desc, action_ret);
385 
386 	raw_spin_lock_irq(&desc->lock);
387 	desc->istate &= ~IRQS_INPROGRESS;
388 	irq_compat_clr_progress(desc);
389 
390 out_unlock:
391 	raw_spin_unlock_irq(&desc->lock);
392 }
393 EXPORT_SYMBOL_GPL(handle_nested_irq);
394 
395 static bool irq_check_poll(struct irq_desc *desc)
396 {
397 	if (!(desc->istate & IRQS_POLL_INPROGRESS))
398 		return false;
399 	return irq_wait_for_poll(desc);
400 }
401 
402 /**
403  *	handle_simple_irq - Simple and software-decoded IRQs.
404  *	@irq:	the interrupt number
405  *	@desc:	the interrupt description structure for this irq
406  *
407  *	Simple interrupts are either sent from a demultiplexing interrupt
408  *	handler or come from hardware, where no interrupt hardware control
409  *	is necessary.
410  *
411  *	Note: The caller is expected to handle the ack, clear, mask and
412  *	unmask issues if necessary.
413  */
414 void
415 handle_simple_irq(unsigned int irq, struct irq_desc *desc)
416 {
417 	raw_spin_lock(&desc->lock);
418 
419 	if (unlikely(desc->istate & IRQS_INPROGRESS))
420 		if (!irq_check_poll(desc))
421 			goto out_unlock;
422 
423 	desc->istate &= ~(IRQS_REPLAY | IRQS_WAITING);
424 	kstat_incr_irqs_this_cpu(irq, desc);
425 
426 	if (unlikely(!desc->action || (desc->istate & IRQS_DISABLED)))
427 		goto out_unlock;
428 
429 	handle_irq_event(desc);
430 
431 out_unlock:
432 	raw_spin_unlock(&desc->lock);
433 }
434 
435 /**
436  *	handle_level_irq - Level type irq handler
437  *	@irq:	the interrupt number
438  *	@desc:	the interrupt description structure for this irq
439  *
440  *	Level type interrupts are active as long as the hardware line has
441  *	the active level. This may require to mask the interrupt and unmask
442  *	it after the associated handler has acknowledged the device, so the
443  *	interrupt line is back to inactive.
444  */
445 void
446 handle_level_irq(unsigned int irq, struct irq_desc *desc)
447 {
448 	raw_spin_lock(&desc->lock);
449 	mask_ack_irq(desc);
450 
451 	if (unlikely(desc->istate & IRQS_INPROGRESS))
452 		if (!irq_check_poll(desc))
453 			goto out_unlock;
454 
455 	desc->istate &= ~(IRQS_REPLAY | IRQS_WAITING);
456 	kstat_incr_irqs_this_cpu(irq, desc);
457 
458 	/*
459 	 * If its disabled or no action available
460 	 * keep it masked and get out of here
461 	 */
462 	if (unlikely(!desc->action || (desc->istate & IRQS_DISABLED)))
463 		goto out_unlock;
464 
465 	handle_irq_event(desc);
466 
467 	if (!(desc->istate & (IRQS_DISABLED | IRQS_ONESHOT)))
468 		unmask_irq(desc);
469 out_unlock:
470 	raw_spin_unlock(&desc->lock);
471 }
472 EXPORT_SYMBOL_GPL(handle_level_irq);
473 
474 #ifdef CONFIG_IRQ_PREFLOW_FASTEOI
475 static inline void preflow_handler(struct irq_desc *desc)
476 {
477 	if (desc->preflow_handler)
478 		desc->preflow_handler(&desc->irq_data);
479 }
480 #else
481 static inline void preflow_handler(struct irq_desc *desc) { }
482 #endif
483 
484 /**
485  *	handle_fasteoi_irq - irq handler for transparent controllers
486  *	@irq:	the interrupt number
487  *	@desc:	the interrupt description structure for this irq
488  *
489  *	Only a single callback will be issued to the chip: an ->eoi()
490  *	call when the interrupt has been serviced. This enables support
491  *	for modern forms of interrupt handlers, which handle the flow
492  *	details in hardware, transparently.
493  */
494 void
495 handle_fasteoi_irq(unsigned int irq, struct irq_desc *desc)
496 {
497 	raw_spin_lock(&desc->lock);
498 
499 	if (unlikely(desc->istate & IRQS_INPROGRESS))
500 		if (!irq_check_poll(desc))
501 			goto out;
502 
503 	desc->istate &= ~(IRQS_REPLAY | IRQS_WAITING);
504 	kstat_incr_irqs_this_cpu(irq, desc);
505 
506 	/*
507 	 * If its disabled or no action available
508 	 * then mask it and get out of here:
509 	 */
510 	if (unlikely(!desc->action || (desc->istate & IRQS_DISABLED))) {
511 		irq_compat_set_pending(desc);
512 		desc->istate |= IRQS_PENDING;
513 		mask_irq(desc);
514 		goto out;
515 	}
516 
517 	if (desc->istate & IRQS_ONESHOT)
518 		mask_irq(desc);
519 
520 	preflow_handler(desc);
521 	handle_irq_event(desc);
522 
523 out_eoi:
524 	desc->irq_data.chip->irq_eoi(&desc->irq_data);
525 out_unlock:
526 	raw_spin_unlock(&desc->lock);
527 	return;
528 out:
529 	if (!(desc->irq_data.chip->flags & IRQCHIP_EOI_IF_HANDLED))
530 		goto out_eoi;
531 	goto out_unlock;
532 }
533 
534 /**
535  *	handle_edge_irq - edge type IRQ handler
536  *	@irq:	the interrupt number
537  *	@desc:	the interrupt description structure for this irq
538  *
539  *	Interrupt occures on the falling and/or rising edge of a hardware
540  *	signal. The occurence is latched into the irq controller hardware
541  *	and must be acked in order to be reenabled. After the ack another
542  *	interrupt can happen on the same source even before the first one
543  *	is handled by the associated event handler. If this happens it
544  *	might be necessary to disable (mask) the interrupt depending on the
545  *	controller hardware. This requires to reenable the interrupt inside
546  *	of the loop which handles the interrupts which have arrived while
547  *	the handler was running. If all pending interrupts are handled, the
548  *	loop is left.
549  */
550 void
551 handle_edge_irq(unsigned int irq, struct irq_desc *desc)
552 {
553 	raw_spin_lock(&desc->lock);
554 
555 	desc->istate &= ~(IRQS_REPLAY | IRQS_WAITING);
556 	/*
557 	 * If we're currently running this IRQ, or its disabled,
558 	 * we shouldn't process the IRQ. Mark it pending, handle
559 	 * the necessary masking and go out
560 	 */
561 	if (unlikely((desc->istate & (IRQS_DISABLED | IRQS_INPROGRESS) ||
562 		      !desc->action))) {
563 		if (!irq_check_poll(desc)) {
564 			irq_compat_set_pending(desc);
565 			desc->istate |= IRQS_PENDING;
566 			mask_ack_irq(desc);
567 			goto out_unlock;
568 		}
569 	}
570 	kstat_incr_irqs_this_cpu(irq, desc);
571 
572 	/* Start handling the irq */
573 	desc->irq_data.chip->irq_ack(&desc->irq_data);
574 
575 	do {
576 		if (unlikely(!desc->action)) {
577 			mask_irq(desc);
578 			goto out_unlock;
579 		}
580 
581 		/*
582 		 * When another irq arrived while we were handling
583 		 * one, we could have masked the irq.
584 		 * Renable it, if it was not disabled in meantime.
585 		 */
586 		if (unlikely(desc->istate & IRQS_PENDING)) {
587 			if (!(desc->istate & IRQS_DISABLED) &&
588 			    (desc->istate & IRQS_MASKED))
589 				unmask_irq(desc);
590 		}
591 
592 		handle_irq_event(desc);
593 
594 	} while ((desc->istate & IRQS_PENDING) &&
595 		 !(desc->istate & IRQS_DISABLED));
596 
597 out_unlock:
598 	raw_spin_unlock(&desc->lock);
599 }
600 
601 /**
602  *	handle_percpu_irq - Per CPU local irq handler
603  *	@irq:	the interrupt number
604  *	@desc:	the interrupt description structure for this irq
605  *
606  *	Per CPU interrupts on SMP machines without locking requirements
607  */
608 void
609 handle_percpu_irq(unsigned int irq, struct irq_desc *desc)
610 {
611 	struct irq_chip *chip = irq_desc_get_chip(desc);
612 
613 	kstat_incr_irqs_this_cpu(irq, desc);
614 
615 	if (chip->irq_ack)
616 		chip->irq_ack(&desc->irq_data);
617 
618 	handle_irq_event_percpu(desc, desc->action);
619 
620 	if (chip->irq_eoi)
621 		chip->irq_eoi(&desc->irq_data);
622 }
623 
624 void
625 __irq_set_handler(unsigned int irq, irq_flow_handler_t handle, int is_chained,
626 		  const char *name)
627 {
628 	unsigned long flags;
629 	struct irq_desc *desc = irq_get_desc_buslock(irq, &flags);
630 
631 	if (!desc)
632 		return;
633 
634 	if (!handle) {
635 		handle = handle_bad_irq;
636 	} else {
637 		if (WARN_ON(desc->irq_data.chip == &no_irq_chip))
638 			goto out;
639 	}
640 
641 	/* Uninstall? */
642 	if (handle == handle_bad_irq) {
643 		if (desc->irq_data.chip != &no_irq_chip)
644 			mask_ack_irq(desc);
645 		irq_compat_set_disabled(desc);
646 		desc->istate |= IRQS_DISABLED;
647 		desc->depth = 1;
648 	}
649 	desc->handle_irq = handle;
650 	desc->name = name;
651 
652 	if (handle != handle_bad_irq && is_chained) {
653 		irq_settings_set_noprobe(desc);
654 		irq_settings_set_norequest(desc);
655 		irq_startup(desc);
656 	}
657 out:
658 	irq_put_desc_busunlock(desc, flags);
659 }
660 EXPORT_SYMBOL_GPL(__irq_set_handler);
661 
662 void
663 irq_set_chip_and_handler_name(unsigned int irq, struct irq_chip *chip,
664 			      irq_flow_handler_t handle, const char *name)
665 {
666 	irq_set_chip(irq, chip);
667 	__irq_set_handler(irq, handle, 0, name);
668 }
669 
670 void irq_modify_status(unsigned int irq, unsigned long clr, unsigned long set)
671 {
672 	unsigned long flags;
673 	struct irq_desc *desc = irq_get_desc_lock(irq, &flags);
674 
675 	if (!desc)
676 		return;
677 	irq_settings_clr_and_set(desc, clr, set);
678 
679 	irqd_clear(&desc->irq_data, IRQD_NO_BALANCING | IRQD_PER_CPU |
680 		   IRQD_TRIGGER_MASK | IRQD_LEVEL | IRQD_MOVE_PCNTXT);
681 	if (irq_settings_has_no_balance_set(desc))
682 		irqd_set(&desc->irq_data, IRQD_NO_BALANCING);
683 	if (irq_settings_is_per_cpu(desc))
684 		irqd_set(&desc->irq_data, IRQD_PER_CPU);
685 	if (irq_settings_can_move_pcntxt(desc))
686 		irqd_set(&desc->irq_data, IRQD_MOVE_PCNTXT);
687 
688 	irqd_set(&desc->irq_data, irq_settings_get_trigger_mask(desc));
689 
690 	irq_put_desc_unlock(desc, flags);
691 }
692