1# SPDX-License-Identifier: GPL-2.0-only 2menu "IRQ subsystem" 3# Options selectable by the architecture code 4 5# Make sparse irq Kconfig switch below available 6config MAY_HAVE_SPARSE_IRQ 7 bool 8 9# Legacy support, required for itanic 10config GENERIC_IRQ_LEGACY 11 bool 12 13# Enable the generic irq autoprobe mechanism 14config GENERIC_IRQ_PROBE 15 bool 16 17# Use the generic /proc/interrupts implementation 18config GENERIC_IRQ_SHOW 19 bool 20 21# Print level/edge extra information 22config GENERIC_IRQ_SHOW_LEVEL 23 bool 24 25# Supports effective affinity mask 26config GENERIC_IRQ_EFFECTIVE_AFF_MASK 27 bool 28 29# Facility to allocate a hardware interrupt. This is legacy support 30# and should not be used in new code. Use irq domains instead. 31config GENERIC_IRQ_LEGACY_ALLOC_HWIRQ 32 bool 33 34# Support for delayed migration from interrupt context 35config GENERIC_PENDING_IRQ 36 bool 37 38# Support for generic irq migrating off cpu before the cpu is offline. 39config GENERIC_IRQ_MIGRATION 40 bool 41 42# Alpha specific irq affinity mechanism 43config AUTO_IRQ_AFFINITY 44 bool 45 46# Interrupt injection mechanism 47config GENERIC_IRQ_INJECTION 48 bool 49 50# Tasklet based software resend for pending interrupts on enable_irq() 51config HARDIRQS_SW_RESEND 52 bool 53 54# Edge style eoi based handler (cell) 55config IRQ_EDGE_EOI_HANDLER 56 bool 57 58# Generic configurable interrupt chip implementation 59config GENERIC_IRQ_CHIP 60 bool 61 select IRQ_DOMAIN 62 63# Generic irq_domain hw <--> linux irq number translation 64config IRQ_DOMAIN 65 bool 66 67# Support for simulated interrupts 68config IRQ_SIM 69 bool 70 select IRQ_WORK 71 select IRQ_DOMAIN 72 73# Support for hierarchical irq domains 74config IRQ_DOMAIN_HIERARCHY 75 bool 76 select IRQ_DOMAIN 77 78# Support for hierarchical fasteoi+edge and fasteoi+level handlers 79config IRQ_FASTEOI_HIERARCHY_HANDLERS 80 bool 81 82# Generic IRQ IPI support 83config GENERIC_IRQ_IPI 84 bool 85 86# Generic MSI interrupt support 87config GENERIC_MSI_IRQ 88 bool 89 90# Generic MSI hierarchical interrupt domain support 91config GENERIC_MSI_IRQ_DOMAIN 92 bool 93 select IRQ_DOMAIN_HIERARCHY 94 select GENERIC_MSI_IRQ 95 96config IRQ_MSI_IOMMU 97 bool 98 99config HANDLE_DOMAIN_IRQ 100 bool 101 102config IRQ_TIMINGS 103 bool 104 105config GENERIC_IRQ_MATRIX_ALLOCATOR 106 bool 107 108config GENERIC_IRQ_RESERVATION_MODE 109 bool 110 111# Support forced irq threading 112config IRQ_FORCED_THREADING 113 bool 114 115config SPARSE_IRQ 116 bool "Support sparse irq numbering" if MAY_HAVE_SPARSE_IRQ 117 help 118 119 Sparse irq numbering is useful for distro kernels that want 120 to define a high CONFIG_NR_CPUS value but still want to have 121 low kernel memory footprint on smaller machines. 122 123 ( Sparse irqs can also be beneficial on NUMA boxes, as they spread 124 out the interrupt descriptors in a more NUMA-friendly way. ) 125 126 If you don't know what to do here, say N. 127 128config GENERIC_IRQ_DEBUGFS 129 bool "Expose irq internals in debugfs" 130 depends on DEBUG_FS 131 select GENERIC_IRQ_INJECTION 132 default n 133 help 134 135 Exposes internal state information through debugfs. Mostly for 136 developers and debugging of hard to diagnose interrupt problems. 137 138 If you don't know what to do here, say N. 139 140endmenu 141 142config GENERIC_IRQ_MULTI_HANDLER 143 bool 144 help 145 Allow to specify the low level IRQ handler at run time. 146