xref: /openbmc/linux/kernel/irq/Kconfig (revision 3dc167ba)
1# SPDX-License-Identifier: GPL-2.0-only
2menu "IRQ subsystem"
3# Options selectable by the architecture code
4
5# Make sparse irq Kconfig switch below available
6config MAY_HAVE_SPARSE_IRQ
7       bool
8
9# Legacy support, required for itanic
10config GENERIC_IRQ_LEGACY
11       bool
12
13# Enable the generic irq autoprobe mechanism
14config GENERIC_IRQ_PROBE
15	bool
16
17# Use the generic /proc/interrupts implementation
18config GENERIC_IRQ_SHOW
19       bool
20
21# Print level/edge extra information
22config GENERIC_IRQ_SHOW_LEVEL
23       bool
24
25# Supports effective affinity mask
26config GENERIC_IRQ_EFFECTIVE_AFF_MASK
27       bool
28
29# Facility to allocate a hardware interrupt. This is legacy support
30# and should not be used in new code. Use irq domains instead.
31config GENERIC_IRQ_LEGACY_ALLOC_HWIRQ
32       bool
33
34# Support for delayed migration from interrupt context
35config GENERIC_PENDING_IRQ
36	bool
37
38# Support for generic irq migrating off cpu before the cpu is offline.
39config GENERIC_IRQ_MIGRATION
40	bool
41
42# Alpha specific irq affinity mechanism
43config AUTO_IRQ_AFFINITY
44       bool
45
46# Interrupt injection mechanism
47config GENERIC_IRQ_INJECTION
48	bool
49
50# Tasklet based software resend for pending interrupts on enable_irq()
51config HARDIRQS_SW_RESEND
52       bool
53
54# Preflow handler support for fasteoi (sparc64)
55config IRQ_PREFLOW_FASTEOI
56       bool
57
58# Edge style eoi based handler (cell)
59config IRQ_EDGE_EOI_HANDLER
60       bool
61
62# Generic configurable interrupt chip implementation
63config GENERIC_IRQ_CHIP
64       bool
65       select IRQ_DOMAIN
66
67# Generic irq_domain hw <--> linux irq number translation
68config IRQ_DOMAIN
69	bool
70
71# Support for simulated interrupts
72config IRQ_SIM
73	bool
74	select IRQ_WORK
75	select IRQ_DOMAIN
76
77# Support for hierarchical irq domains
78config IRQ_DOMAIN_HIERARCHY
79	bool
80	select IRQ_DOMAIN
81
82# Support for hierarchical fasteoi+edge and fasteoi+level handlers
83config IRQ_FASTEOI_HIERARCHY_HANDLERS
84	bool
85
86# Generic IRQ IPI support
87config GENERIC_IRQ_IPI
88	bool
89
90# Generic MSI interrupt support
91config GENERIC_MSI_IRQ
92	bool
93
94# Generic MSI hierarchical interrupt domain support
95config GENERIC_MSI_IRQ_DOMAIN
96	bool
97	select IRQ_DOMAIN_HIERARCHY
98	select GENERIC_MSI_IRQ
99
100config IRQ_MSI_IOMMU
101	bool
102
103config HANDLE_DOMAIN_IRQ
104	bool
105
106config IRQ_TIMINGS
107	bool
108
109config GENERIC_IRQ_MATRIX_ALLOCATOR
110	bool
111
112config GENERIC_IRQ_RESERVATION_MODE
113	bool
114
115# Support forced irq threading
116config IRQ_FORCED_THREADING
117       bool
118
119config SPARSE_IRQ
120	bool "Support sparse irq numbering" if MAY_HAVE_SPARSE_IRQ
121	help
122
123	  Sparse irq numbering is useful for distro kernels that want
124	  to define a high CONFIG_NR_CPUS value but still want to have
125	  low kernel memory footprint on smaller machines.
126
127	  ( Sparse irqs can also be beneficial on NUMA boxes, as they spread
128	    out the interrupt descriptors in a more NUMA-friendly way. )
129
130	  If you don't know what to do here, say N.
131
132config GENERIC_IRQ_DEBUGFS
133	bool "Expose irq internals in debugfs"
134	depends on DEBUG_FS
135	select GENERIC_IRQ_INJECTION
136	default n
137	help
138
139	  Exposes internal state information through debugfs. Mostly for
140	  developers and debugging of hard to diagnose interrupt problems.
141
142	  If you don't know what to do here, say N.
143
144endmenu
145
146config GENERIC_IRQ_MULTI_HANDLER
147	bool
148	help
149	  Allow to specify the low level IRQ handler at run time.
150