xref: /openbmc/linux/kernel/dma/swiotlb.c (revision c4f7ac64)
1 // SPDX-License-Identifier: GPL-2.0-only
2 /*
3  * Dynamic DMA mapping support.
4  *
5  * This implementation is a fallback for platforms that do not support
6  * I/O TLBs (aka DMA address translation hardware).
7  * Copyright (C) 2000 Asit Mallick <Asit.K.Mallick@intel.com>
8  * Copyright (C) 2000 Goutham Rao <goutham.rao@intel.com>
9  * Copyright (C) 2000, 2003 Hewlett-Packard Co
10  *	David Mosberger-Tang <davidm@hpl.hp.com>
11  *
12  * 03/05/07 davidm	Switch from PCI-DMA to generic device DMA API.
13  * 00/12/13 davidm	Rename to swiotlb.c and add mark_clean() to avoid
14  *			unnecessary i-cache flushing.
15  * 04/07/.. ak		Better overflow handling. Assorted fixes.
16  * 05/09/10 linville	Add support for syncing ranges, support syncing for
17  *			DMA_BIDIRECTIONAL mappings, miscellaneous cleanup.
18  * 08/12/11 beckyb	Add highmem support
19  */
20 
21 #define pr_fmt(fmt) "software IO TLB: " fmt
22 
23 #include <linux/cache.h>
24 #include <linux/dma-direct.h>
25 #include <linux/dma-map-ops.h>
26 #include <linux/mm.h>
27 #include <linux/export.h>
28 #include <linux/spinlock.h>
29 #include <linux/string.h>
30 #include <linux/swiotlb.h>
31 #include <linux/pfn.h>
32 #include <linux/types.h>
33 #include <linux/ctype.h>
34 #include <linux/highmem.h>
35 #include <linux/gfp.h>
36 #include <linux/scatterlist.h>
37 #include <linux/mem_encrypt.h>
38 #include <linux/set_memory.h>
39 #ifdef CONFIG_DEBUG_FS
40 #include <linux/debugfs.h>
41 #endif
42 
43 #include <asm/io.h>
44 #include <asm/dma.h>
45 
46 #include <linux/init.h>
47 #include <linux/memblock.h>
48 #include <linux/iommu-helper.h>
49 
50 #define CREATE_TRACE_POINTS
51 #include <trace/events/swiotlb.h>
52 
53 #define SLABS_PER_PAGE (1 << (PAGE_SHIFT - IO_TLB_SHIFT))
54 
55 /*
56  * Minimum IO TLB size to bother booting with.  Systems with mainly
57  * 64bit capable cards will only lightly use the swiotlb.  If we can't
58  * allocate a contiguous 1MB, we're probably in trouble anyway.
59  */
60 #define IO_TLB_MIN_SLABS ((1<<20) >> IO_TLB_SHIFT)
61 
62 #define INVALID_PHYS_ADDR (~(phys_addr_t)0)
63 
64 enum swiotlb_force swiotlb_force;
65 
66 struct io_tlb_mem *io_tlb_default_mem;
67 
68 /*
69  * Max segment that we can provide which (if pages are contingous) will
70  * not be bounced (unless SWIOTLB_FORCE is set).
71  */
72 static unsigned int max_segment;
73 
74 static unsigned long default_nslabs = IO_TLB_DEFAULT_SIZE >> IO_TLB_SHIFT;
75 
76 static int __init
77 setup_io_tlb_npages(char *str)
78 {
79 	if (isdigit(*str)) {
80 		/* avoid tail segment of size < IO_TLB_SEGSIZE */
81 		default_nslabs =
82 			ALIGN(simple_strtoul(str, &str, 0), IO_TLB_SEGSIZE);
83 	}
84 	if (*str == ',')
85 		++str;
86 	if (!strcmp(str, "force"))
87 		swiotlb_force = SWIOTLB_FORCE;
88 	else if (!strcmp(str, "noforce"))
89 		swiotlb_force = SWIOTLB_NO_FORCE;
90 
91 	return 0;
92 }
93 early_param("swiotlb", setup_io_tlb_npages);
94 
95 unsigned int swiotlb_max_segment(void)
96 {
97 	return io_tlb_default_mem ? max_segment : 0;
98 }
99 EXPORT_SYMBOL_GPL(swiotlb_max_segment);
100 
101 void swiotlb_set_max_segment(unsigned int val)
102 {
103 	if (swiotlb_force == SWIOTLB_FORCE)
104 		max_segment = 1;
105 	else
106 		max_segment = rounddown(val, PAGE_SIZE);
107 }
108 
109 unsigned long swiotlb_size_or_default(void)
110 {
111 	return default_nslabs << IO_TLB_SHIFT;
112 }
113 
114 void __init swiotlb_adjust_size(unsigned long size)
115 {
116 	/*
117 	 * If swiotlb parameter has not been specified, give a chance to
118 	 * architectures such as those supporting memory encryption to
119 	 * adjust/expand SWIOTLB size for their use.
120 	 */
121 	if (default_nslabs != IO_TLB_DEFAULT_SIZE >> IO_TLB_SHIFT)
122 		return;
123 	size = ALIGN(size, IO_TLB_SIZE);
124 	default_nslabs = ALIGN(size >> IO_TLB_SHIFT, IO_TLB_SEGSIZE);
125 	pr_info("SWIOTLB bounce buffer size adjusted to %luMB", size >> 20);
126 }
127 
128 void swiotlb_print_info(void)
129 {
130 	struct io_tlb_mem *mem = io_tlb_default_mem;
131 
132 	if (!mem) {
133 		pr_warn("No low mem\n");
134 		return;
135 	}
136 
137 	pr_info("mapped [mem %pa-%pa] (%luMB)\n", &mem->start, &mem->end,
138 	       (mem->nslabs << IO_TLB_SHIFT) >> 20);
139 }
140 
141 static inline unsigned long io_tlb_offset(unsigned long val)
142 {
143 	return val & (IO_TLB_SEGSIZE - 1);
144 }
145 
146 static inline unsigned long nr_slots(u64 val)
147 {
148 	return DIV_ROUND_UP(val, IO_TLB_SIZE);
149 }
150 
151 /*
152  * Early SWIOTLB allocation may be too early to allow an architecture to
153  * perform the desired operations.  This function allows the architecture to
154  * call SWIOTLB when the operations are possible.  It needs to be called
155  * before the SWIOTLB memory is used.
156  */
157 void __init swiotlb_update_mem_attributes(void)
158 {
159 	struct io_tlb_mem *mem = io_tlb_default_mem;
160 	void *vaddr;
161 	unsigned long bytes;
162 
163 	if (!mem || mem->late_alloc)
164 		return;
165 	vaddr = phys_to_virt(mem->start);
166 	bytes = PAGE_ALIGN(mem->nslabs << IO_TLB_SHIFT);
167 	set_memory_decrypted((unsigned long)vaddr, bytes >> PAGE_SHIFT);
168 	memset(vaddr, 0, bytes);
169 }
170 
171 int __init swiotlb_init_with_tbl(char *tlb, unsigned long nslabs, int verbose)
172 {
173 	unsigned long bytes = nslabs << IO_TLB_SHIFT, i;
174 	struct io_tlb_mem *mem;
175 	size_t alloc_size;
176 
177 	if (swiotlb_force == SWIOTLB_NO_FORCE)
178 		return 0;
179 
180 	/* protect against double initialization */
181 	if (WARN_ON_ONCE(io_tlb_default_mem))
182 		return -ENOMEM;
183 
184 	alloc_size = PAGE_ALIGN(struct_size(mem, slots, nslabs));
185 	mem = memblock_alloc(alloc_size, PAGE_SIZE);
186 	if (!mem)
187 		panic("%s: Failed to allocate %zu bytes align=0x%lx\n",
188 		      __func__, alloc_size, PAGE_SIZE);
189 	mem->nslabs = nslabs;
190 	mem->start = __pa(tlb);
191 	mem->end = mem->start + bytes;
192 	mem->index = 0;
193 	spin_lock_init(&mem->lock);
194 	for (i = 0; i < mem->nslabs; i++) {
195 		mem->slots[i].list = IO_TLB_SEGSIZE - io_tlb_offset(i);
196 		mem->slots[i].orig_addr = INVALID_PHYS_ADDR;
197 		mem->slots[i].alloc_size = 0;
198 	}
199 
200 	io_tlb_default_mem = mem;
201 	if (verbose)
202 		swiotlb_print_info();
203 	swiotlb_set_max_segment(mem->nslabs << IO_TLB_SHIFT);
204 	return 0;
205 }
206 
207 /*
208  * Statically reserve bounce buffer space and initialize bounce buffer data
209  * structures for the software IO TLB used to implement the DMA API.
210  */
211 void  __init
212 swiotlb_init(int verbose)
213 {
214 	size_t bytes = PAGE_ALIGN(default_nslabs << IO_TLB_SHIFT);
215 	void *tlb;
216 
217 	if (swiotlb_force == SWIOTLB_NO_FORCE)
218 		return;
219 
220 	/* Get IO TLB memory from the low pages */
221 	tlb = memblock_alloc_low(bytes, PAGE_SIZE);
222 	if (!tlb)
223 		goto fail;
224 	if (swiotlb_init_with_tbl(tlb, default_nslabs, verbose))
225 		goto fail_free_mem;
226 	return;
227 
228 fail_free_mem:
229 	memblock_free_early(__pa(tlb), bytes);
230 fail:
231 	pr_warn("Cannot allocate buffer");
232 }
233 
234 /*
235  * Systems with larger DMA zones (those that don't support ISA) can
236  * initialize the swiotlb later using the slab allocator if needed.
237  * This should be just like above, but with some error catching.
238  */
239 int
240 swiotlb_late_init_with_default_size(size_t default_size)
241 {
242 	unsigned long nslabs =
243 		ALIGN(default_size >> IO_TLB_SHIFT, IO_TLB_SEGSIZE);
244 	unsigned long bytes;
245 	unsigned char *vstart = NULL;
246 	unsigned int order;
247 	int rc = 0;
248 
249 	if (swiotlb_force == SWIOTLB_NO_FORCE)
250 		return 0;
251 
252 	/*
253 	 * Get IO TLB memory from the low pages
254 	 */
255 	order = get_order(nslabs << IO_TLB_SHIFT);
256 	nslabs = SLABS_PER_PAGE << order;
257 	bytes = nslabs << IO_TLB_SHIFT;
258 
259 	while ((SLABS_PER_PAGE << order) > IO_TLB_MIN_SLABS) {
260 		vstart = (void *)__get_free_pages(GFP_DMA | __GFP_NOWARN,
261 						  order);
262 		if (vstart)
263 			break;
264 		order--;
265 	}
266 
267 	if (!vstart)
268 		return -ENOMEM;
269 
270 	if (order != get_order(bytes)) {
271 		pr_warn("only able to allocate %ld MB\n",
272 			(PAGE_SIZE << order) >> 20);
273 		nslabs = SLABS_PER_PAGE << order;
274 	}
275 	rc = swiotlb_late_init_with_tbl(vstart, nslabs);
276 	if (rc)
277 		free_pages((unsigned long)vstart, order);
278 
279 	return rc;
280 }
281 
282 int
283 swiotlb_late_init_with_tbl(char *tlb, unsigned long nslabs)
284 {
285 	unsigned long bytes = nslabs << IO_TLB_SHIFT, i;
286 	struct io_tlb_mem *mem;
287 
288 	if (swiotlb_force == SWIOTLB_NO_FORCE)
289 		return 0;
290 
291 	/* protect against double initialization */
292 	if (WARN_ON_ONCE(io_tlb_default_mem))
293 		return -ENOMEM;
294 
295 	mem = (void *)__get_free_pages(GFP_KERNEL,
296 		get_order(struct_size(mem, slots, nslabs)));
297 	if (!mem)
298 		return -ENOMEM;
299 
300 	mem->nslabs = nslabs;
301 	mem->start = virt_to_phys(tlb);
302 	mem->end = mem->start + bytes;
303 	mem->index = 0;
304 	mem->late_alloc = 1;
305 	spin_lock_init(&mem->lock);
306 	for (i = 0; i < mem->nslabs; i++) {
307 		mem->slots[i].list = IO_TLB_SEGSIZE - io_tlb_offset(i);
308 		mem->slots[i].orig_addr = INVALID_PHYS_ADDR;
309 		mem->slots[i].alloc_size = 0;
310 	}
311 
312 	set_memory_decrypted((unsigned long)tlb, bytes >> PAGE_SHIFT);
313 	memset(tlb, 0, bytes);
314 
315 	io_tlb_default_mem = mem;
316 	swiotlb_print_info();
317 	swiotlb_set_max_segment(mem->nslabs << IO_TLB_SHIFT);
318 	return 0;
319 }
320 
321 void __init swiotlb_exit(void)
322 {
323 	struct io_tlb_mem *mem = io_tlb_default_mem;
324 	size_t size;
325 
326 	if (!mem)
327 		return;
328 
329 	size = struct_size(mem, slots, mem->nslabs);
330 	if (mem->late_alloc)
331 		free_pages((unsigned long)mem, get_order(size));
332 	else
333 		memblock_free_late(__pa(mem), PAGE_ALIGN(size));
334 	io_tlb_default_mem = NULL;
335 }
336 
337 /*
338  * Bounce: copy the swiotlb buffer from or back to the original dma location
339  */
340 static void swiotlb_bounce(struct device *dev, phys_addr_t tlb_addr, size_t size,
341 			   enum dma_data_direction dir)
342 {
343 	struct io_tlb_mem *mem = io_tlb_default_mem;
344 	int index = (tlb_addr - mem->start) >> IO_TLB_SHIFT;
345 	phys_addr_t orig_addr = mem->slots[index].orig_addr;
346 	size_t alloc_size = mem->slots[index].alloc_size;
347 	unsigned long pfn = PFN_DOWN(orig_addr);
348 	unsigned char *vaddr = phys_to_virt(tlb_addr);
349 
350 	if (orig_addr == INVALID_PHYS_ADDR)
351 		return;
352 
353 	if (size > alloc_size) {
354 		dev_WARN_ONCE(dev, 1,
355 			"Buffer overflow detected. Allocation size: %zu. Mapping size: %zu.\n",
356 			alloc_size, size);
357 		size = alloc_size;
358 	}
359 
360 	if (PageHighMem(pfn_to_page(pfn))) {
361 		/* The buffer does not have a mapping.  Map it in and copy */
362 		unsigned int offset = orig_addr & ~PAGE_MASK;
363 		char *buffer;
364 		unsigned int sz = 0;
365 		unsigned long flags;
366 
367 		while (size) {
368 			sz = min_t(size_t, PAGE_SIZE - offset, size);
369 
370 			local_irq_save(flags);
371 			buffer = kmap_atomic(pfn_to_page(pfn));
372 			if (dir == DMA_TO_DEVICE)
373 				memcpy(vaddr, buffer + offset, sz);
374 			else
375 				memcpy(buffer + offset, vaddr, sz);
376 			kunmap_atomic(buffer);
377 			local_irq_restore(flags);
378 
379 			size -= sz;
380 			pfn++;
381 			vaddr += sz;
382 			offset = 0;
383 		}
384 	} else if (dir == DMA_TO_DEVICE) {
385 		memcpy(vaddr, phys_to_virt(orig_addr), size);
386 	} else {
387 		memcpy(phys_to_virt(orig_addr), vaddr, size);
388 	}
389 }
390 
391 #define slot_addr(start, idx)	((start) + ((idx) << IO_TLB_SHIFT))
392 
393 /*
394  * Return the offset into a iotlb slot required to keep the device happy.
395  */
396 static unsigned int swiotlb_align_offset(struct device *dev, u64 addr)
397 {
398 	return addr & dma_get_min_align_mask(dev) & (IO_TLB_SIZE - 1);
399 }
400 
401 /*
402  * Carefully handle integer overflow which can occur when boundary_mask == ~0UL.
403  */
404 static inline unsigned long get_max_slots(unsigned long boundary_mask)
405 {
406 	if (boundary_mask == ~0UL)
407 		return 1UL << (BITS_PER_LONG - IO_TLB_SHIFT);
408 	return nr_slots(boundary_mask + 1);
409 }
410 
411 static unsigned int wrap_index(struct io_tlb_mem *mem, unsigned int index)
412 {
413 	if (index >= mem->nslabs)
414 		return 0;
415 	return index;
416 }
417 
418 /*
419  * Find a suitable number of IO TLB entries size that will fit this request and
420  * allocate a buffer from that IO TLB pool.
421  */
422 static int find_slots(struct device *dev, phys_addr_t orig_addr,
423 		size_t alloc_size)
424 {
425 	struct io_tlb_mem *mem = io_tlb_default_mem;
426 	unsigned long boundary_mask = dma_get_seg_boundary(dev);
427 	dma_addr_t tbl_dma_addr =
428 		phys_to_dma_unencrypted(dev, mem->start) & boundary_mask;
429 	unsigned long max_slots = get_max_slots(boundary_mask);
430 	unsigned int iotlb_align_mask =
431 		dma_get_min_align_mask(dev) & ~(IO_TLB_SIZE - 1);
432 	unsigned int nslots = nr_slots(alloc_size), stride;
433 	unsigned int index, wrap, count = 0, i;
434 	unsigned long flags;
435 
436 	BUG_ON(!nslots);
437 
438 	/*
439 	 * For mappings with an alignment requirement don't bother looping to
440 	 * unaligned slots once we found an aligned one.  For allocations of
441 	 * PAGE_SIZE or larger only look for page aligned allocations.
442 	 */
443 	stride = (iotlb_align_mask >> IO_TLB_SHIFT) + 1;
444 	if (alloc_size >= PAGE_SIZE)
445 		stride = max(stride, stride << (PAGE_SHIFT - IO_TLB_SHIFT));
446 
447 	spin_lock_irqsave(&mem->lock, flags);
448 	if (unlikely(nslots > mem->nslabs - mem->used))
449 		goto not_found;
450 
451 	index = wrap = wrap_index(mem, ALIGN(mem->index, stride));
452 	do {
453 		if ((slot_addr(tbl_dma_addr, index) & iotlb_align_mask) !=
454 		    (orig_addr & iotlb_align_mask)) {
455 			index = wrap_index(mem, index + 1);
456 			continue;
457 		}
458 
459 		/*
460 		 * If we find a slot that indicates we have 'nslots' number of
461 		 * contiguous buffers, we allocate the buffers from that slot
462 		 * and mark the entries as '0' indicating unavailable.
463 		 */
464 		if (!iommu_is_span_boundary(index, nslots,
465 					    nr_slots(tbl_dma_addr),
466 					    max_slots)) {
467 			if (mem->slots[index].list >= nslots)
468 				goto found;
469 		}
470 		index = wrap_index(mem, index + stride);
471 	} while (index != wrap);
472 
473 not_found:
474 	spin_unlock_irqrestore(&mem->lock, flags);
475 	return -1;
476 
477 found:
478 	for (i = index; i < index + nslots; i++)
479 		mem->slots[i].list = 0;
480 	for (i = index - 1;
481 	     io_tlb_offset(i) != IO_TLB_SEGSIZE - 1 &&
482 	     mem->slots[i].list; i--)
483 		mem->slots[i].list = ++count;
484 
485 	/*
486 	 * Update the indices to avoid searching in the next round.
487 	 */
488 	if (index + nslots < mem->nslabs)
489 		mem->index = index + nslots;
490 	else
491 		mem->index = 0;
492 	mem->used += nslots;
493 
494 	spin_unlock_irqrestore(&mem->lock, flags);
495 	return index;
496 }
497 
498 phys_addr_t swiotlb_tbl_map_single(struct device *dev, phys_addr_t orig_addr,
499 		size_t mapping_size, size_t alloc_size,
500 		enum dma_data_direction dir, unsigned long attrs)
501 {
502 	struct io_tlb_mem *mem = io_tlb_default_mem;
503 	unsigned int offset = swiotlb_align_offset(dev, orig_addr);
504 	unsigned int i;
505 	int index;
506 	phys_addr_t tlb_addr;
507 
508 	if (!mem)
509 		panic("Can not allocate SWIOTLB buffer earlier and can't now provide you with the DMA bounce buffer");
510 
511 	if (mem_encrypt_active())
512 		pr_warn_once("Memory encryption is active and system is using DMA bounce buffers\n");
513 
514 	if (mapping_size > alloc_size) {
515 		dev_warn_once(dev, "Invalid sizes (mapping: %zd bytes, alloc: %zd bytes)",
516 			      mapping_size, alloc_size);
517 		return (phys_addr_t)DMA_MAPPING_ERROR;
518 	}
519 
520 	index = find_slots(dev, orig_addr, alloc_size + offset);
521 	if (index == -1) {
522 		if (!(attrs & DMA_ATTR_NO_WARN))
523 			dev_warn_ratelimited(dev,
524 	"swiotlb buffer is full (sz: %zd bytes), total %lu (slots), used %lu (slots)\n",
525 				 alloc_size, mem->nslabs, mem->used);
526 		return (phys_addr_t)DMA_MAPPING_ERROR;
527 	}
528 
529 	/*
530 	 * Save away the mapping from the original address to the DMA address.
531 	 * This is needed when we sync the memory.  Then we sync the buffer if
532 	 * needed.
533 	 */
534 	for (i = 0; i < nr_slots(alloc_size + offset); i++) {
535 		mem->slots[index + i].orig_addr = slot_addr(orig_addr, i);
536 		mem->slots[index + i].alloc_size =
537 			alloc_size - (i << IO_TLB_SHIFT);
538 	}
539 	tlb_addr = slot_addr(mem->start, index) + offset;
540 	if (!(attrs & DMA_ATTR_SKIP_CPU_SYNC) &&
541 	    (dir == DMA_TO_DEVICE || dir == DMA_BIDIRECTIONAL))
542 		swiotlb_bounce(dev, tlb_addr, mapping_size, DMA_TO_DEVICE);
543 	return tlb_addr;
544 }
545 
546 /*
547  * tlb_addr is the physical address of the bounce buffer to unmap.
548  */
549 void swiotlb_tbl_unmap_single(struct device *hwdev, phys_addr_t tlb_addr,
550 			      size_t mapping_size, enum dma_data_direction dir,
551 			      unsigned long attrs)
552 {
553 	struct io_tlb_mem *mem = io_tlb_default_mem;
554 	unsigned long flags;
555 	unsigned int offset = swiotlb_align_offset(hwdev, tlb_addr);
556 	int index = (tlb_addr - offset - mem->start) >> IO_TLB_SHIFT;
557 	int nslots = nr_slots(mem->slots[index].alloc_size + offset);
558 	int count, i;
559 
560 	/*
561 	 * First, sync the memory before unmapping the entry
562 	 */
563 	if (!(attrs & DMA_ATTR_SKIP_CPU_SYNC) &&
564 	    (dir == DMA_FROM_DEVICE || dir == DMA_BIDIRECTIONAL))
565 		swiotlb_bounce(hwdev, tlb_addr, mapping_size, DMA_FROM_DEVICE);
566 
567 	/*
568 	 * Return the buffer to the free list by setting the corresponding
569 	 * entries to indicate the number of contiguous entries available.
570 	 * While returning the entries to the free list, we merge the entries
571 	 * with slots below and above the pool being returned.
572 	 */
573 	spin_lock_irqsave(&mem->lock, flags);
574 	if (index + nslots < ALIGN(index + 1, IO_TLB_SEGSIZE))
575 		count = mem->slots[index + nslots].list;
576 	else
577 		count = 0;
578 
579 	/*
580 	 * Step 1: return the slots to the free list, merging the slots with
581 	 * superceeding slots
582 	 */
583 	for (i = index + nslots - 1; i >= index; i--) {
584 		mem->slots[i].list = ++count;
585 		mem->slots[i].orig_addr = INVALID_PHYS_ADDR;
586 		mem->slots[i].alloc_size = 0;
587 	}
588 
589 	/*
590 	 * Step 2: merge the returned slots with the preceding slots, if
591 	 * available (non zero)
592 	 */
593 	for (i = index - 1;
594 	     io_tlb_offset(i) != IO_TLB_SEGSIZE - 1 && mem->slots[i].list;
595 	     i--)
596 		mem->slots[i].list = ++count;
597 	mem->used -= nslots;
598 	spin_unlock_irqrestore(&mem->lock, flags);
599 }
600 
601 void swiotlb_sync_single_for_device(struct device *dev, phys_addr_t tlb_addr,
602 		size_t size, enum dma_data_direction dir)
603 {
604 	if (dir == DMA_TO_DEVICE || dir == DMA_BIDIRECTIONAL)
605 		swiotlb_bounce(dev, tlb_addr, size, DMA_TO_DEVICE);
606 	else
607 		BUG_ON(dir != DMA_FROM_DEVICE);
608 }
609 
610 void swiotlb_sync_single_for_cpu(struct device *dev, phys_addr_t tlb_addr,
611 		size_t size, enum dma_data_direction dir)
612 {
613 	if (dir == DMA_FROM_DEVICE || dir == DMA_BIDIRECTIONAL)
614 		swiotlb_bounce(dev, tlb_addr, size, DMA_FROM_DEVICE);
615 	else
616 		BUG_ON(dir != DMA_TO_DEVICE);
617 }
618 
619 /*
620  * Create a swiotlb mapping for the buffer at @paddr, and in case of DMAing
621  * to the device copy the data into it as well.
622  */
623 dma_addr_t swiotlb_map(struct device *dev, phys_addr_t paddr, size_t size,
624 		enum dma_data_direction dir, unsigned long attrs)
625 {
626 	phys_addr_t swiotlb_addr;
627 	dma_addr_t dma_addr;
628 
629 	trace_swiotlb_bounced(dev, phys_to_dma(dev, paddr), size,
630 			      swiotlb_force);
631 
632 	swiotlb_addr = swiotlb_tbl_map_single(dev, paddr, size, size, dir,
633 			attrs);
634 	if (swiotlb_addr == (phys_addr_t)DMA_MAPPING_ERROR)
635 		return DMA_MAPPING_ERROR;
636 
637 	/* Ensure that the address returned is DMA'ble */
638 	dma_addr = phys_to_dma_unencrypted(dev, swiotlb_addr);
639 	if (unlikely(!dma_capable(dev, dma_addr, size, true))) {
640 		swiotlb_tbl_unmap_single(dev, swiotlb_addr, size, dir,
641 			attrs | DMA_ATTR_SKIP_CPU_SYNC);
642 		dev_WARN_ONCE(dev, 1,
643 			"swiotlb addr %pad+%zu overflow (mask %llx, bus limit %llx).\n",
644 			&dma_addr, size, *dev->dma_mask, dev->bus_dma_limit);
645 		return DMA_MAPPING_ERROR;
646 	}
647 
648 	if (!dev_is_dma_coherent(dev) && !(attrs & DMA_ATTR_SKIP_CPU_SYNC))
649 		arch_sync_dma_for_device(swiotlb_addr, size, dir);
650 	return dma_addr;
651 }
652 
653 size_t swiotlb_max_mapping_size(struct device *dev)
654 {
655 	return ((size_t)IO_TLB_SIZE) * IO_TLB_SEGSIZE;
656 }
657 
658 bool is_swiotlb_active(void)
659 {
660 	return io_tlb_default_mem != NULL;
661 }
662 EXPORT_SYMBOL_GPL(is_swiotlb_active);
663 
664 #ifdef CONFIG_DEBUG_FS
665 
666 static int __init swiotlb_create_debugfs(void)
667 {
668 	struct io_tlb_mem *mem = io_tlb_default_mem;
669 
670 	if (!mem)
671 		return 0;
672 	mem->debugfs = debugfs_create_dir("swiotlb", NULL);
673 	debugfs_create_ulong("io_tlb_nslabs", 0400, mem->debugfs, &mem->nslabs);
674 	debugfs_create_ulong("io_tlb_used", 0400, mem->debugfs, &mem->used);
675 	return 0;
676 }
677 
678 late_initcall(swiotlb_create_debugfs);
679 
680 #endif
681