1 /****************************************************************************** 2 * arch-x86/mca.h 3 * Guest OS machine check interface to x86 Xen. 4 * 5 * Contributed by Advanced Micro Devices, Inc. 6 * Author: Christoph Egger <Christoph.Egger@amd.com> 7 * 8 * Updated by Intel Corporation 9 * Author: Liu, Jinsong <jinsong.liu@intel.com> 10 * 11 * Permission is hereby granted, free of charge, to any person obtaining a copy 12 * of this software and associated documentation files (the "Software"), to 13 * deal in the Software without restriction, including without limitation the 14 * rights to use, copy, modify, merge, publish, distribute, sublicense, and/or 15 * sell copies of the Software, and to permit persons to whom the Software is 16 * furnished to do so, subject to the following conditions: 17 * 18 * The above copyright notice and this permission notice shall be included in 19 * all copies or substantial portions of the Software. 20 * 21 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 22 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 23 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE 24 * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 25 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING 26 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER 27 * DEALINGS IN THE SOFTWARE. 28 */ 29 30 #ifndef __XEN_PUBLIC_ARCH_X86_MCA_H__ 31 #define __XEN_PUBLIC_ARCH_X86_MCA_H__ 32 33 /* Hypercall */ 34 #define __HYPERVISOR_mca __HYPERVISOR_arch_0 35 36 #define XEN_MCA_INTERFACE_VERSION 0x01ecc003 37 38 /* IN: Dom0 calls hypercall to retrieve nonurgent error log entry */ 39 #define XEN_MC_NONURGENT 0x1 40 /* IN: Dom0 calls hypercall to retrieve urgent error log entry */ 41 #define XEN_MC_URGENT 0x2 42 /* IN: Dom0 acknowledges previosly-fetched error log entry */ 43 #define XEN_MC_ACK 0x4 44 45 /* OUT: All is ok */ 46 #define XEN_MC_OK 0x0 47 /* OUT: Domain could not fetch data. */ 48 #define XEN_MC_FETCHFAILED 0x1 49 /* OUT: There was no machine check data to fetch. */ 50 #define XEN_MC_NODATA 0x2 51 52 #ifndef __ASSEMBLY__ 53 /* vIRQ injected to Dom0 */ 54 #define VIRQ_MCA VIRQ_ARCH_0 55 56 /* 57 * mc_info entry types 58 * mca machine check info are recorded in mc_info entries. 59 * when fetch mca info, it can use MC_TYPE_... to distinguish 60 * different mca info. 61 */ 62 #define MC_TYPE_GLOBAL 0 63 #define MC_TYPE_BANK 1 64 #define MC_TYPE_EXTENDED 2 65 #define MC_TYPE_RECOVERY 3 66 67 struct mcinfo_common { 68 uint16_t type; /* structure type */ 69 uint16_t size; /* size of this struct in bytes */ 70 }; 71 72 #define MC_FLAG_CORRECTABLE (1 << 0) 73 #define MC_FLAG_UNCORRECTABLE (1 << 1) 74 #define MC_FLAG_RECOVERABLE (1 << 2) 75 #define MC_FLAG_POLLED (1 << 3) 76 #define MC_FLAG_RESET (1 << 4) 77 #define MC_FLAG_CMCI (1 << 5) 78 #define MC_FLAG_MCE (1 << 6) 79 80 /* contains x86 global mc information */ 81 struct mcinfo_global { 82 struct mcinfo_common common; 83 84 uint16_t mc_domid; /* running domain at the time in error */ 85 uint16_t mc_vcpuid; /* virtual cpu scheduled for mc_domid */ 86 uint32_t mc_socketid; /* physical socket of the physical core */ 87 uint16_t mc_coreid; /* physical impacted core */ 88 uint16_t mc_core_threadid; /* core thread of physical core */ 89 uint32_t mc_apicid; 90 uint32_t mc_flags; 91 uint64_t mc_gstatus; /* global status */ 92 }; 93 94 /* contains x86 bank mc information */ 95 struct mcinfo_bank { 96 struct mcinfo_common common; 97 98 uint16_t mc_bank; /* bank nr */ 99 uint16_t mc_domid; /* domain referenced by mc_addr if valid */ 100 uint64_t mc_status; /* bank status */ 101 uint64_t mc_addr; /* bank address */ 102 uint64_t mc_misc; 103 uint64_t mc_ctrl2; 104 uint64_t mc_tsc; 105 }; 106 107 struct mcinfo_msr { 108 uint64_t reg; /* MSR */ 109 uint64_t value; /* MSR value */ 110 }; 111 112 /* contains mc information from other or additional mc MSRs */ 113 struct mcinfo_extended { 114 struct mcinfo_common common; 115 uint32_t mc_msrs; /* Number of msr with valid values. */ 116 /* 117 * Currently Intel extended MSR (32/64) include all gp registers 118 * and E(R)FLAGS, E(R)IP, E(R)MISC, up to 11/19 of them might be 119 * useful at present. So expand this array to 16/32 to leave room. 120 */ 121 struct mcinfo_msr mc_msr[sizeof(void *) * 4]; 122 }; 123 124 /* Recovery Action flags. Giving recovery result information to DOM0 */ 125 126 /* Xen takes successful recovery action, the error is recovered */ 127 #define REC_ACTION_RECOVERED (0x1 << 0) 128 /* No action is performed by XEN */ 129 #define REC_ACTION_NONE (0x1 << 1) 130 /* It's possible DOM0 might take action ownership in some case */ 131 #define REC_ACTION_NEED_RESET (0x1 << 2) 132 133 /* 134 * Different Recovery Action types, if the action is performed successfully, 135 * REC_ACTION_RECOVERED flag will be returned. 136 */ 137 138 /* Page Offline Action */ 139 #define MC_ACTION_PAGE_OFFLINE (0x1 << 0) 140 /* CPU offline Action */ 141 #define MC_ACTION_CPU_OFFLINE (0x1 << 1) 142 /* L3 cache disable Action */ 143 #define MC_ACTION_CACHE_SHRINK (0x1 << 2) 144 145 /* 146 * Below interface used between XEN/DOM0 for passing XEN's recovery action 147 * information to DOM0. 148 */ 149 struct page_offline_action { 150 /* Params for passing the offlined page number to DOM0 */ 151 uint64_t mfn; 152 uint64_t status; 153 }; 154 155 struct cpu_offline_action { 156 /* Params for passing the identity of the offlined CPU to DOM0 */ 157 uint32_t mc_socketid; 158 uint16_t mc_coreid; 159 uint16_t mc_core_threadid; 160 }; 161 162 #define MAX_UNION_SIZE 16 163 struct mcinfo_recovery { 164 struct mcinfo_common common; 165 uint16_t mc_bank; /* bank nr */ 166 uint8_t action_flags; 167 uint8_t action_types; 168 union { 169 struct page_offline_action page_retire; 170 struct cpu_offline_action cpu_offline; 171 uint8_t pad[MAX_UNION_SIZE]; 172 } action_info; 173 }; 174 175 176 #define MCINFO_MAXSIZE 768 177 struct mc_info { 178 /* Number of mcinfo_* entries in mi_data */ 179 uint32_t mi_nentries; 180 uint32_t flags; 181 uint64_t mi_data[(MCINFO_MAXSIZE - 1) / 8]; 182 }; 183 DEFINE_GUEST_HANDLE_STRUCT(mc_info); 184 185 #define __MC_MSR_ARRAYSIZE 8 186 #define __MC_NMSRS 1 187 #define MC_NCAPS 7 188 struct mcinfo_logical_cpu { 189 uint32_t mc_cpunr; 190 uint32_t mc_chipid; 191 uint16_t mc_coreid; 192 uint16_t mc_threadid; 193 uint32_t mc_apicid; 194 uint32_t mc_clusterid; 195 uint32_t mc_ncores; 196 uint32_t mc_ncores_active; 197 uint32_t mc_nthreads; 198 uint32_t mc_cpuid_level; 199 uint32_t mc_family; 200 uint32_t mc_vendor; 201 uint32_t mc_model; 202 uint32_t mc_step; 203 char mc_vendorid[16]; 204 char mc_brandid[64]; 205 uint32_t mc_cpu_caps[MC_NCAPS]; 206 uint32_t mc_cache_size; 207 uint32_t mc_cache_alignment; 208 uint32_t mc_nmsrvals; 209 struct mcinfo_msr mc_msrvalues[__MC_MSR_ARRAYSIZE]; 210 }; 211 DEFINE_GUEST_HANDLE_STRUCT(mcinfo_logical_cpu); 212 213 /* 214 * Prototype: 215 * uint32_t x86_mcinfo_nentries(struct mc_info *mi); 216 */ 217 #define x86_mcinfo_nentries(_mi) \ 218 ((_mi)->mi_nentries) 219 /* 220 * Prototype: 221 * struct mcinfo_common *x86_mcinfo_first(struct mc_info *mi); 222 */ 223 #define x86_mcinfo_first(_mi) \ 224 ((struct mcinfo_common *)(_mi)->mi_data) 225 /* 226 * Prototype: 227 * struct mcinfo_common *x86_mcinfo_next(struct mcinfo_common *mic); 228 */ 229 #define x86_mcinfo_next(_mic) \ 230 ((struct mcinfo_common *)((uint8_t *)(_mic) + (_mic)->size)) 231 232 /* 233 * Prototype: 234 * void x86_mcinfo_lookup(void *ret, struct mc_info *mi, uint16_t type); 235 */ 236 static inline void x86_mcinfo_lookup(struct mcinfo_common **ret, 237 struct mc_info *mi, uint16_t type) 238 { 239 uint32_t i; 240 struct mcinfo_common *mic; 241 bool found = 0; 242 243 if (!ret || !mi) 244 return; 245 246 mic = x86_mcinfo_first(mi); 247 for (i = 0; i < x86_mcinfo_nentries(mi); i++) { 248 if (mic->type == type) { 249 found = 1; 250 break; 251 } 252 mic = x86_mcinfo_next(mic); 253 } 254 255 *ret = found ? mic : NULL; 256 } 257 258 /* 259 * Fetch machine check data from hypervisor. 260 */ 261 #define XEN_MC_fetch 1 262 struct xen_mc_fetch { 263 /* 264 * IN: XEN_MC_NONURGENT, XEN_MC_URGENT, 265 * XEN_MC_ACK if ack'king an earlier fetch 266 * OUT: XEN_MC_OK, XEN_MC_FETCHAILED, XEN_MC_NODATA 267 */ 268 uint32_t flags; 269 uint32_t _pad0; 270 /* OUT: id for ack, IN: id we are ack'ing */ 271 uint64_t fetch_id; 272 273 /* OUT variables. */ 274 GUEST_HANDLE(mc_info) data; 275 }; 276 DEFINE_GUEST_HANDLE_STRUCT(xen_mc_fetch); 277 278 279 /* 280 * This tells the hypervisor to notify a DomU about the machine check error 281 */ 282 #define XEN_MC_notifydomain 2 283 struct xen_mc_notifydomain { 284 /* IN variables */ 285 uint16_t mc_domid; /* The unprivileged domain to notify */ 286 uint16_t mc_vcpuid; /* The vcpu in mc_domid to notify */ 287 288 /* IN/OUT variables */ 289 uint32_t flags; 290 }; 291 DEFINE_GUEST_HANDLE_STRUCT(xen_mc_notifydomain); 292 293 #define XEN_MC_physcpuinfo 3 294 struct xen_mc_physcpuinfo { 295 /* IN/OUT */ 296 uint32_t ncpus; 297 uint32_t _pad0; 298 /* OUT */ 299 GUEST_HANDLE(mcinfo_logical_cpu) info; 300 }; 301 302 #define XEN_MC_msrinject 4 303 #define MC_MSRINJ_MAXMSRS 8 304 struct xen_mc_msrinject { 305 /* IN */ 306 uint32_t mcinj_cpunr; /* target processor id */ 307 uint32_t mcinj_flags; /* see MC_MSRINJ_F_* below */ 308 uint32_t mcinj_count; /* 0 .. count-1 in array are valid */ 309 uint32_t _pad0; 310 struct mcinfo_msr mcinj_msr[MC_MSRINJ_MAXMSRS]; 311 }; 312 313 /* Flags for mcinj_flags above; bits 16-31 are reserved */ 314 #define MC_MSRINJ_F_INTERPOSE 0x1 315 316 #define XEN_MC_mceinject 5 317 struct xen_mc_mceinject { 318 unsigned int mceinj_cpunr; /* target processor id */ 319 }; 320 321 struct xen_mc { 322 uint32_t cmd; 323 uint32_t interface_version; /* XEN_MCA_INTERFACE_VERSION */ 324 union { 325 struct xen_mc_fetch mc_fetch; 326 struct xen_mc_notifydomain mc_notifydomain; 327 struct xen_mc_physcpuinfo mc_physcpuinfo; 328 struct xen_mc_msrinject mc_msrinject; 329 struct xen_mc_mceinject mc_mceinject; 330 } u; 331 }; 332 DEFINE_GUEST_HANDLE_STRUCT(xen_mc); 333 334 /* 335 * Fields are zero when not available. Also, this struct is shared with 336 * userspace mcelog and thus must keep existing fields at current offsets. 337 * Only add new fields to the end of the structure 338 */ 339 struct xen_mce { 340 __u64 status; 341 __u64 misc; 342 __u64 addr; 343 __u64 mcgstatus; 344 __u64 ip; 345 __u64 tsc; /* cpu time stamp counter */ 346 __u64 time; /* wall time_t when error was detected */ 347 __u8 cpuvendor; /* cpu vendor as encoded in system.h */ 348 __u8 inject_flags; /* software inject flags */ 349 __u16 pad; 350 __u32 cpuid; /* CPUID 1 EAX */ 351 __u8 cs; /* code segment */ 352 __u8 bank; /* machine check bank */ 353 __u8 cpu; /* cpu number; obsolete; use extcpu now */ 354 __u8 finished; /* entry is valid */ 355 __u32 extcpu; /* linux cpu number that detected the error */ 356 __u32 socketid; /* CPU socket ID */ 357 __u32 apicid; /* CPU initial apic ID */ 358 __u64 mcgcap; /* MCGCAP MSR: machine check capabilities of CPU */ 359 __u64 synd; /* MCA_SYND MSR: only valid on SMCA systems */ 360 __u64 ipid; /* MCA_IPID MSR: only valid on SMCA systems */ 361 __u64 ppin; /* Protected Processor Inventory Number */ 362 }; 363 364 /* 365 * This structure contains all data related to the MCE log. Also 366 * carries a signature to make it easier to find from external 367 * debugging tools. Each entry is only valid when its finished flag 368 * is set. 369 */ 370 371 #define XEN_MCE_LOG_LEN 32 372 373 struct xen_mce_log { 374 char signature[12]; /* "MACHINECHECK" */ 375 unsigned len; /* = XEN_MCE_LOG_LEN */ 376 unsigned next; 377 unsigned flags; 378 unsigned recordlen; /* length of struct xen_mce */ 379 struct xen_mce entry[XEN_MCE_LOG_LEN]; 380 }; 381 382 #define XEN_MCE_OVERFLOW 0 /* bit 0 in flags means overflow */ 383 384 #define XEN_MCE_LOG_SIGNATURE "MACHINECHECK" 385 386 #define MCE_GET_RECORD_LEN _IOR('M', 1, int) 387 #define MCE_GET_LOG_LEN _IOR('M', 2, int) 388 #define MCE_GETCLEAR_FLAGS _IOR('M', 3, int) 389 390 #endif /* __ASSEMBLY__ */ 391 #endif /* __XEN_PUBLIC_ARCH_X86_MCA_H__ */ 392