1 /* 2 * Permission is hereby granted, free of charge, to any person obtaining a copy 3 * of this software and associated documentation files (the "Software"), to 4 * deal in the Software without restriction, including without limitation the 5 * rights to use, copy, modify, merge, publish, distribute, sublicense, and/or 6 * sell copies of the Software, and to permit persons to whom the Software is 7 * furnished to do so, subject to the following conditions: 8 * 9 * The above copyright notice and this permission notice shall be included in 10 * all copies or substantial portions of the Software. 11 * 12 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 13 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 14 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE 15 * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 16 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING 17 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER 18 * DEALINGS IN THE SOFTWARE. 19 */ 20 21 #ifndef __XEN_PUBLIC_PHYSDEV_H__ 22 #define __XEN_PUBLIC_PHYSDEV_H__ 23 24 /* 25 * Prototype for this hypercall is: 26 * int physdev_op(int cmd, void *args) 27 * @cmd == PHYSDEVOP_??? (physdev operation). 28 * @args == Operation-specific extra arguments (NULL if none). 29 */ 30 31 /* 32 * Notify end-of-interrupt (EOI) for the specified IRQ. 33 * @arg == pointer to physdev_eoi structure. 34 */ 35 #define PHYSDEVOP_eoi 12 36 struct physdev_eoi { 37 /* IN */ 38 uint32_t irq; 39 }; 40 41 /* 42 * Register a shared page for the hypervisor to indicate whether the guest 43 * must issue PHYSDEVOP_eoi. The semantics of PHYSDEVOP_eoi change slightly 44 * once the guest used this function in that the associated event channel 45 * will automatically get unmasked. The page registered is used as a bit 46 * array indexed by Xen's PIRQ value. 47 */ 48 #define PHYSDEVOP_pirq_eoi_gmfn_v1 17 49 /* 50 * Register a shared page for the hypervisor to indicate whether the 51 * guest must issue PHYSDEVOP_eoi. This hypercall is very similar to 52 * PHYSDEVOP_pirq_eoi_gmfn_v1 but it doesn't change the semantics of 53 * PHYSDEVOP_eoi. The page registered is used as a bit array indexed by 54 * Xen's PIRQ value. 55 */ 56 #define PHYSDEVOP_pirq_eoi_gmfn_v2 28 57 struct physdev_pirq_eoi_gmfn { 58 /* IN */ 59 xen_ulong_t gmfn; 60 }; 61 62 /* 63 * Query the status of an IRQ line. 64 * @arg == pointer to physdev_irq_status_query structure. 65 */ 66 #define PHYSDEVOP_irq_status_query 5 67 struct physdev_irq_status_query { 68 /* IN */ 69 uint32_t irq; 70 /* OUT */ 71 uint32_t flags; /* XENIRQSTAT_* */ 72 }; 73 74 /* Need to call PHYSDEVOP_eoi when the IRQ has been serviced? */ 75 #define _XENIRQSTAT_needs_eoi (0) 76 #define XENIRQSTAT_needs_eoi (1U<<_XENIRQSTAT_needs_eoi) 77 78 /* IRQ shared by multiple guests? */ 79 #define _XENIRQSTAT_shared (1) 80 #define XENIRQSTAT_shared (1U<<_XENIRQSTAT_shared) 81 82 /* 83 * Set the current VCPU's I/O privilege level. 84 * @arg == pointer to physdev_set_iopl structure. 85 */ 86 #define PHYSDEVOP_set_iopl 6 87 struct physdev_set_iopl { 88 /* IN */ 89 uint32_t iopl; 90 }; 91 92 /* 93 * Set the current VCPU's I/O-port permissions bitmap. 94 * @arg == pointer to physdev_set_iobitmap structure. 95 */ 96 #define PHYSDEVOP_set_iobitmap 7 97 struct physdev_set_iobitmap { 98 /* IN */ 99 uint8_t * bitmap; 100 uint32_t nr_ports; 101 }; 102 103 /* 104 * Read or write an IO-APIC register. 105 * @arg == pointer to physdev_apic structure. 106 */ 107 #define PHYSDEVOP_apic_read 8 108 #define PHYSDEVOP_apic_write 9 109 struct physdev_apic { 110 /* IN */ 111 unsigned long apic_physbase; 112 uint32_t reg; 113 /* IN or OUT */ 114 uint32_t value; 115 }; 116 117 /* 118 * Allocate or free a physical upcall vector for the specified IRQ line. 119 * @arg == pointer to physdev_irq structure. 120 */ 121 #define PHYSDEVOP_alloc_irq_vector 10 122 #define PHYSDEVOP_free_irq_vector 11 123 struct physdev_irq { 124 /* IN */ 125 uint32_t irq; 126 /* IN or OUT */ 127 uint32_t vector; 128 }; 129 130 #define MAP_PIRQ_TYPE_MSI 0x0 131 #define MAP_PIRQ_TYPE_GSI 0x1 132 #define MAP_PIRQ_TYPE_UNKNOWN 0x2 133 #define MAP_PIRQ_TYPE_MSI_SEG 0x3 134 135 #define PHYSDEVOP_map_pirq 13 136 struct physdev_map_pirq { 137 domid_t domid; 138 /* IN */ 139 int type; 140 /* IN */ 141 int index; 142 /* IN or OUT */ 143 int pirq; 144 /* IN - high 16 bits hold segment for MAP_PIRQ_TYPE_MSI_SEG */ 145 int bus; 146 /* IN */ 147 int devfn; 148 /* IN */ 149 int entry_nr; 150 /* IN */ 151 uint64_t table_base; 152 }; 153 154 #define PHYSDEVOP_unmap_pirq 14 155 struct physdev_unmap_pirq { 156 domid_t domid; 157 /* IN */ 158 int pirq; 159 }; 160 161 #define PHYSDEVOP_manage_pci_add 15 162 #define PHYSDEVOP_manage_pci_remove 16 163 struct physdev_manage_pci { 164 /* IN */ 165 uint8_t bus; 166 uint8_t devfn; 167 }; 168 169 #define PHYSDEVOP_restore_msi 19 170 struct physdev_restore_msi { 171 /* IN */ 172 uint8_t bus; 173 uint8_t devfn; 174 }; 175 176 #define PHYSDEVOP_manage_pci_add_ext 20 177 struct physdev_manage_pci_ext { 178 /* IN */ 179 uint8_t bus; 180 uint8_t devfn; 181 unsigned is_extfn; 182 unsigned is_virtfn; 183 struct { 184 uint8_t bus; 185 uint8_t devfn; 186 } physfn; 187 }; 188 189 /* 190 * Argument to physdev_op_compat() hypercall. Superceded by new physdev_op() 191 * hypercall since 0x00030202. 192 */ 193 struct physdev_op { 194 uint32_t cmd; 195 union { 196 struct physdev_irq_status_query irq_status_query; 197 struct physdev_set_iopl set_iopl; 198 struct physdev_set_iobitmap set_iobitmap; 199 struct physdev_apic apic_op; 200 struct physdev_irq irq_op; 201 } u; 202 }; 203 204 #define PHYSDEVOP_setup_gsi 21 205 struct physdev_setup_gsi { 206 int gsi; 207 /* IN */ 208 uint8_t triggering; 209 /* IN */ 210 uint8_t polarity; 211 /* IN */ 212 }; 213 214 #define PHYSDEVOP_get_nr_pirqs 22 215 struct physdev_nr_pirqs { 216 /* OUT */ 217 uint32_t nr_pirqs; 218 }; 219 220 /* type is MAP_PIRQ_TYPE_GSI or MAP_PIRQ_TYPE_MSI 221 * the hypercall returns a free pirq */ 222 #define PHYSDEVOP_get_free_pirq 23 223 struct physdev_get_free_pirq { 224 /* IN */ 225 int type; 226 /* OUT */ 227 uint32_t pirq; 228 }; 229 230 #define XEN_PCI_DEV_EXTFN 0x1 231 #define XEN_PCI_DEV_VIRTFN 0x2 232 #define XEN_PCI_DEV_PXM 0x4 233 234 #define PHYSDEVOP_pci_device_add 25 235 struct physdev_pci_device_add { 236 /* IN */ 237 uint16_t seg; 238 uint8_t bus; 239 uint8_t devfn; 240 uint32_t flags; 241 struct { 242 uint8_t bus; 243 uint8_t devfn; 244 } physfn; 245 #if defined(__STDC_VERSION__) && __STDC_VERSION__ >= 199901L 246 uint32_t optarr[]; 247 #elif defined(__GNUC__) 248 uint32_t optarr[0]; 249 #endif 250 }; 251 252 #define PHYSDEVOP_pci_device_remove 26 253 #define PHYSDEVOP_restore_msi_ext 27 254 /* 255 * Dom0 should use these two to announce MMIO resources assigned to 256 * MSI-X capable devices won't (prepare) or may (release) change. 257 */ 258 #define PHYSDEVOP_prepare_msix 30 259 #define PHYSDEVOP_release_msix 31 260 struct physdev_pci_device { 261 /* IN */ 262 uint16_t seg; 263 uint8_t bus; 264 uint8_t devfn; 265 }; 266 267 #define PHYSDEVOP_DBGP_RESET_PREPARE 1 268 #define PHYSDEVOP_DBGP_RESET_DONE 2 269 270 #define PHYSDEVOP_DBGP_BUS_UNKNOWN 0 271 #define PHYSDEVOP_DBGP_BUS_PCI 1 272 273 #define PHYSDEVOP_dbgp_op 29 274 struct physdev_dbgp_op { 275 /* IN */ 276 uint8_t op; 277 uint8_t bus; 278 union { 279 struct physdev_pci_device pci; 280 } u; 281 }; 282 283 /* 284 * Notify that some PIRQ-bound event channels have been unmasked. 285 * ** This command is obsolete since interface version 0x00030202 and is ** 286 * ** unsupported by newer versions of Xen. ** 287 */ 288 #define PHYSDEVOP_IRQ_UNMASK_NOTIFY 4 289 290 /* 291 * These all-capitals physdev operation names are superceded by the new names 292 * (defined above) since interface version 0x00030202. 293 */ 294 #define PHYSDEVOP_IRQ_STATUS_QUERY PHYSDEVOP_irq_status_query 295 #define PHYSDEVOP_SET_IOPL PHYSDEVOP_set_iopl 296 #define PHYSDEVOP_SET_IOBITMAP PHYSDEVOP_set_iobitmap 297 #define PHYSDEVOP_APIC_READ PHYSDEVOP_apic_read 298 #define PHYSDEVOP_APIC_WRITE PHYSDEVOP_apic_write 299 #define PHYSDEVOP_ASSIGN_VECTOR PHYSDEVOP_alloc_irq_vector 300 #define PHYSDEVOP_FREE_VECTOR PHYSDEVOP_free_irq_vector 301 #define PHYSDEVOP_IRQ_NEEDS_UNMASK_NOTIFY XENIRQSTAT_needs_eoi 302 #define PHYSDEVOP_IRQ_SHARED XENIRQSTAT_shared 303 304 #endif /* __XEN_PUBLIC_PHYSDEV_H__ */ 305