1 /* include/video/samsung_fimd.h 2 * 3 * Copyright 2008 Openmoko, Inc. 4 * Copyright 2008 Simtec Electronics 5 * http://armlinux.simtec.co.uk/ 6 * Ben Dooks <ben@simtec.co.uk> 7 * 8 * S3C Platform - new-style fimd and framebuffer register definitions 9 * 10 * This is the register set for the fimd and new style framebuffer interface 11 * found from the S3C2443 onwards into the S3C2416, S3C2450, the 12 * S3C64XX series such as the S3C6400 and S3C6410, and EXYNOS series. 13 * 14 * This program is free software; you can redistribute it and/or modify 15 * it under the terms of the GNU General Public License version 2 as 16 * published by the Free Software Foundation. 17 */ 18 19 /* VIDCON0 */ 20 21 #define VIDCON0 0x00 22 #define VIDCON0_DSI_EN (1 << 30) 23 #define VIDCON0_INTERLACE (1 << 29) 24 #define VIDCON0_VIDOUT_MASK (0x7 << 26) 25 #define VIDCON0_VIDOUT_SHIFT 26 26 #define VIDCON0_VIDOUT_RGB (0x0 << 26) 27 #define VIDCON0_VIDOUT_TV (0x1 << 26) 28 #define VIDCON0_VIDOUT_I80_LDI0 (0x2 << 26) 29 #define VIDCON0_VIDOUT_I80_LDI1 (0x3 << 26) 30 #define VIDCON0_VIDOUT_WB_RGB (0x4 << 26) 31 #define VIDCON0_VIDOUT_WB_I80_LDI0 (0x6 << 26) 32 #define VIDCON0_VIDOUT_WB_I80_LDI1 (0x7 << 26) 33 34 #define VIDCON0_L1_DATA_MASK (0x7 << 23) 35 #define VIDCON0_L1_DATA_SHIFT 23 36 #define VIDCON0_L1_DATA_16BPP (0x0 << 23) 37 #define VIDCON0_L1_DATA_18BPP16 (0x1 << 23) 38 #define VIDCON0_L1_DATA_18BPP9 (0x2 << 23) 39 #define VIDCON0_L1_DATA_24BPP (0x3 << 23) 40 #define VIDCON0_L1_DATA_18BPP (0x4 << 23) 41 #define VIDCON0_L1_DATA_16BPP8 (0x5 << 23) 42 43 #define VIDCON0_L0_DATA_MASK (0x7 << 20) 44 #define VIDCON0_L0_DATA_SHIFT 20 45 #define VIDCON0_L0_DATA_16BPP (0x0 << 20) 46 #define VIDCON0_L0_DATA_18BPP16 (0x1 << 20) 47 #define VIDCON0_L0_DATA_18BPP9 (0x2 << 20) 48 #define VIDCON0_L0_DATA_24BPP (0x3 << 20) 49 #define VIDCON0_L0_DATA_18BPP (0x4 << 20) 50 #define VIDCON0_L0_DATA_16BPP8 (0x5 << 20) 51 52 #define VIDCON0_PNRMODE_MASK (0x3 << 17) 53 #define VIDCON0_PNRMODE_SHIFT 17 54 #define VIDCON0_PNRMODE_RGB (0x0 << 17) 55 #define VIDCON0_PNRMODE_BGR (0x1 << 17) 56 #define VIDCON0_PNRMODE_SERIAL_RGB (0x2 << 17) 57 #define VIDCON0_PNRMODE_SERIAL_BGR (0x3 << 17) 58 59 #define VIDCON0_CLKVALUP (1 << 16) 60 #define VIDCON0_CLKVAL_F_MASK (0xff << 6) 61 #define VIDCON0_CLKVAL_F_SHIFT 6 62 #define VIDCON0_CLKVAL_F_LIMIT 0xff 63 #define VIDCON0_CLKVAL_F(_x) ((_x) << 6) 64 #define VIDCON0_VLCKFREE (1 << 5) 65 #define VIDCON0_CLKDIR (1 << 4) 66 67 #define VIDCON0_CLKSEL_MASK (0x3 << 2) 68 #define VIDCON0_CLKSEL_SHIFT 2 69 #define VIDCON0_CLKSEL_HCLK (0x0 << 2) 70 #define VIDCON0_CLKSEL_LCD (0x1 << 2) 71 #define VIDCON0_CLKSEL_27M (0x3 << 2) 72 73 #define VIDCON0_ENVID (1 << 1) 74 #define VIDCON0_ENVID_F (1 << 0) 75 76 #define VIDCON1 0x04 77 #define VIDCON1_LINECNT_MASK (0x7ff << 16) 78 #define VIDCON1_LINECNT_SHIFT 16 79 #define VIDCON1_LINECNT_GET(_v) (((_v) >> 16) & 0x7ff) 80 #define VIDCON1_FSTATUS_EVEN (1 << 15) 81 #define VIDCON1_VSTATUS_MASK (0x3 << 13) 82 #define VIDCON1_VSTATUS_SHIFT 13 83 #define VIDCON1_VSTATUS_VSYNC (0x0 << 13) 84 #define VIDCON1_VSTATUS_BACKPORCH (0x1 << 13) 85 #define VIDCON1_VSTATUS_ACTIVE (0x2 << 13) 86 #define VIDCON1_VSTATUS_FRONTPORCH (0x3 << 13) 87 #define VIDCON1_VCLK_MASK (0x3 << 9) 88 #define VIDCON1_VCLK_HOLD (0x0 << 9) 89 #define VIDCON1_VCLK_RUN (0x1 << 9) 90 91 #define VIDCON1_INV_VCLK (1 << 7) 92 #define VIDCON1_INV_HSYNC (1 << 6) 93 #define VIDCON1_INV_VSYNC (1 << 5) 94 #define VIDCON1_INV_VDEN (1 << 4) 95 96 /* VIDCON2 */ 97 98 #define VIDCON2 0x08 99 #define VIDCON2_EN601 (1 << 23) 100 #define VIDCON2_TVFMTSEL_SW (1 << 14) 101 102 #define VIDCON2_TVFMTSEL1_MASK (0x3 << 12) 103 #define VIDCON2_TVFMTSEL1_SHIFT 12 104 #define VIDCON2_TVFMTSEL1_RGB (0x0 << 12) 105 #define VIDCON2_TVFMTSEL1_YUV422 (0x1 << 12) 106 #define VIDCON2_TVFMTSEL1_YUV444 (0x2 << 12) 107 108 #define VIDCON2_ORGYCbCr (1 << 8) 109 #define VIDCON2_YUVORDCrCb (1 << 7) 110 111 /* PRTCON (S3C6410) 112 * Might not be present in the S3C6410 documentation, 113 * but tests prove it's there almost for sure; shouldn't hurt in any case. 114 */ 115 #define PRTCON 0x0c 116 #define PRTCON_PROTECT (1 << 11) 117 118 /* VIDTCON0 */ 119 120 #define VIDTCON0 0x10 121 #define VIDTCON0_VBPDE_MASK (0xff << 24) 122 #define VIDTCON0_VBPDE_SHIFT 24 123 #define VIDTCON0_VBPDE_LIMIT 0xff 124 #define VIDTCON0_VBPDE(_x) ((_x) << 24) 125 126 #define VIDTCON0_VBPD_MASK (0xff << 16) 127 #define VIDTCON0_VBPD_SHIFT 16 128 #define VIDTCON0_VBPD_LIMIT 0xff 129 #define VIDTCON0_VBPD(_x) ((_x) << 16) 130 131 #define VIDTCON0_VFPD_MASK (0xff << 8) 132 #define VIDTCON0_VFPD_SHIFT 8 133 #define VIDTCON0_VFPD_LIMIT 0xff 134 #define VIDTCON0_VFPD(_x) ((_x) << 8) 135 136 #define VIDTCON0_VSPW_MASK (0xff << 0) 137 #define VIDTCON0_VSPW_SHIFT 0 138 #define VIDTCON0_VSPW_LIMIT 0xff 139 #define VIDTCON0_VSPW(_x) ((_x) << 0) 140 141 /* VIDTCON1 */ 142 143 #define VIDTCON1 0x14 144 #define VIDTCON1_VFPDE_MASK (0xff << 24) 145 #define VIDTCON1_VFPDE_SHIFT 24 146 #define VIDTCON1_VFPDE_LIMIT 0xff 147 #define VIDTCON1_VFPDE(_x) ((_x) << 24) 148 149 #define VIDTCON1_HBPD_MASK (0xff << 16) 150 #define VIDTCON1_HBPD_SHIFT 16 151 #define VIDTCON1_HBPD_LIMIT 0xff 152 #define VIDTCON1_HBPD(_x) ((_x) << 16) 153 154 #define VIDTCON1_HFPD_MASK (0xff << 8) 155 #define VIDTCON1_HFPD_SHIFT 8 156 #define VIDTCON1_HFPD_LIMIT 0xff 157 #define VIDTCON1_HFPD(_x) ((_x) << 8) 158 159 #define VIDTCON1_HSPW_MASK (0xff << 0) 160 #define VIDTCON1_HSPW_SHIFT 0 161 #define VIDTCON1_HSPW_LIMIT 0xff 162 #define VIDTCON1_HSPW(_x) ((_x) << 0) 163 164 #define VIDTCON2 0x18 165 #define VIDTCON2_LINEVAL_E(_x) ((((_x) & 0x800) >> 11) << 23) 166 #define VIDTCON2_LINEVAL_MASK (0x7ff << 11) 167 #define VIDTCON2_LINEVAL_SHIFT 11 168 #define VIDTCON2_LINEVAL_LIMIT 0x7ff 169 #define VIDTCON2_LINEVAL(_x) (((_x) & 0x7ff) << 11) 170 171 #define VIDTCON2_HOZVAL_E(_x) ((((_x) & 0x800) >> 11) << 22) 172 #define VIDTCON2_HOZVAL_MASK (0x7ff << 0) 173 #define VIDTCON2_HOZVAL_SHIFT 0 174 #define VIDTCON2_HOZVAL_LIMIT 0x7ff 175 #define VIDTCON2_HOZVAL(_x) (((_x) & 0x7ff) << 0) 176 177 /* WINCONx */ 178 179 #define WINCON(_win) (0x20 + ((_win) * 4)) 180 #define WINCONx_CSCCON_EQ601 (0x0 << 28) 181 #define WINCONx_CSCCON_EQ709 (0x1 << 28) 182 #define WINCONx_CSCWIDTH_MASK (0x3 << 26) 183 #define WINCONx_CSCWIDTH_SHIFT 26 184 #define WINCONx_CSCWIDTH_WIDE (0x0 << 26) 185 #define WINCONx_CSCWIDTH_NARROW (0x3 << 26) 186 #define WINCONx_ENLOCAL (1 << 22) 187 #define WINCONx_BUFSTATUS (1 << 21) 188 #define WINCONx_BUFSEL (1 << 20) 189 #define WINCONx_BUFAUTOEN (1 << 19) 190 #define WINCONx_BITSWP (1 << 18) 191 #define WINCONx_BYTSWP (1 << 17) 192 #define WINCONx_HAWSWP (1 << 16) 193 #define WINCONx_WSWP (1 << 15) 194 #define WINCONx_YCbCr (1 << 13) 195 #define WINCONx_BURSTLEN_MASK (0x3 << 9) 196 #define WINCONx_BURSTLEN_SHIFT 9 197 #define WINCONx_BURSTLEN_16WORD (0x0 << 9) 198 #define WINCONx_BURSTLEN_8WORD (0x1 << 9) 199 #define WINCONx_BURSTLEN_4WORD (0x2 << 9) 200 #define WINCONx_ENWIN (1 << 0) 201 202 #define WINCON0_BPPMODE_MASK (0xf << 2) 203 #define WINCON0_BPPMODE_SHIFT 2 204 #define WINCON0_BPPMODE_1BPP (0x0 << 2) 205 #define WINCON0_BPPMODE_2BPP (0x1 << 2) 206 #define WINCON0_BPPMODE_4BPP (0x2 << 2) 207 #define WINCON0_BPPMODE_8BPP_PALETTE (0x3 << 2) 208 #define WINCON0_BPPMODE_16BPP_565 (0x5 << 2) 209 #define WINCON0_BPPMODE_16BPP_1555 (0x7 << 2) 210 #define WINCON0_BPPMODE_18BPP_666 (0x8 << 2) 211 #define WINCON0_BPPMODE_24BPP_888 (0xb << 2) 212 213 #define WINCON1_LOCALSEL_CAMIF (1 << 23) 214 #define WINCON1_BLD_PIX (1 << 6) 215 #define WINCON1_BPPMODE_MASK (0xf << 2) 216 #define WINCON1_BPPMODE_SHIFT 2 217 #define WINCON1_BPPMODE_1BPP (0x0 << 2) 218 #define WINCON1_BPPMODE_2BPP (0x1 << 2) 219 #define WINCON1_BPPMODE_4BPP (0x2 << 2) 220 #define WINCON1_BPPMODE_8BPP_PALETTE (0x3 << 2) 221 #define WINCON1_BPPMODE_8BPP_1232 (0x4 << 2) 222 #define WINCON1_BPPMODE_16BPP_565 (0x5 << 2) 223 #define WINCON1_BPPMODE_16BPP_A1555 (0x6 << 2) 224 #define WINCON1_BPPMODE_16BPP_I1555 (0x7 << 2) 225 #define WINCON1_BPPMODE_18BPP_666 (0x8 << 2) 226 #define WINCON1_BPPMODE_18BPP_A1665 (0x9 << 2) 227 #define WINCON1_BPPMODE_19BPP_A1666 (0xa << 2) 228 #define WINCON1_BPPMODE_24BPP_888 (0xb << 2) 229 #define WINCON1_BPPMODE_24BPP_A1887 (0xc << 2) 230 #define WINCON1_BPPMODE_25BPP_A1888 (0xd << 2) 231 #define WINCON1_BPPMODE_28BPP_A4888 (0xd << 2) 232 #define WINCON1_ALPHA_SEL (1 << 1) 233 234 /* S5PV210 */ 235 #define SHADOWCON 0x34 236 #define SHADOWCON_WINx_PROTECT(_win) (1 << (10 + (_win))) 237 /* DMA channels (all windows) */ 238 #define SHADOWCON_CHx_ENABLE(_win) (1 << (_win)) 239 /* Local input channels (windows 0-2) */ 240 #define SHADOWCON_CHx_LOCAL_ENABLE(_win) (1 << (5 + (_win))) 241 242 /* VIDOSDx */ 243 244 #define VIDOSD_BASE 0x40 245 #define VIDOSDxA_TOPLEFT_X_E(_x) ((((_x) & 0x800) >> 11) << 23) 246 #define VIDOSDxA_TOPLEFT_X_MASK (0x7ff << 11) 247 #define VIDOSDxA_TOPLEFT_X_SHIFT 11 248 #define VIDOSDxA_TOPLEFT_X_LIMIT 0x7ff 249 #define VIDOSDxA_TOPLEFT_X(_x) (((_x) & 0x7ff) << 11) 250 251 #define VIDOSDxA_TOPLEFT_Y_E(_x) ((((_x) & 0x800) >> 11) << 22) 252 #define VIDOSDxA_TOPLEFT_Y_MASK (0x7ff << 0) 253 #define VIDOSDxA_TOPLEFT_Y_SHIFT 0 254 #define VIDOSDxA_TOPLEFT_Y_LIMIT 0x7ff 255 #define VIDOSDxA_TOPLEFT_Y(_x) (((_x) & 0x7ff) << 0) 256 257 #define VIDOSDxB_BOTRIGHT_X_E(_x) ((((_x) & 0x800) >> 11) << 23) 258 #define VIDOSDxB_BOTRIGHT_X_MASK (0x7ff << 11) 259 #define VIDOSDxB_BOTRIGHT_X_SHIFT 11 260 #define VIDOSDxB_BOTRIGHT_X_LIMIT 0x7ff 261 #define VIDOSDxB_BOTRIGHT_X(_x) (((_x) & 0x7ff) << 11) 262 263 #define VIDOSDxB_BOTRIGHT_Y_E(_x) ((((_x) & 0x800) >> 11) << 22) 264 #define VIDOSDxB_BOTRIGHT_Y_MASK (0x7ff << 0) 265 #define VIDOSDxB_BOTRIGHT_Y_SHIFT 0 266 #define VIDOSDxB_BOTRIGHT_Y_LIMIT 0x7ff 267 #define VIDOSDxB_BOTRIGHT_Y(_x) (((_x) & 0x7ff) << 0) 268 269 /* For VIDOSD[1..4]C */ 270 #define VIDISD14C_ALPHA0_R(_x) ((_x) << 20) 271 #define VIDISD14C_ALPHA0_G_MASK (0xf << 16) 272 #define VIDISD14C_ALPHA0_G_SHIFT 16 273 #define VIDISD14C_ALPHA0_G_LIMIT 0xf 274 #define VIDISD14C_ALPHA0_G(_x) ((_x) << 16) 275 #define VIDISD14C_ALPHA0_B_MASK (0xf << 12) 276 #define VIDISD14C_ALPHA0_B_SHIFT 12 277 #define VIDISD14C_ALPHA0_B_LIMIT 0xf 278 #define VIDISD14C_ALPHA0_B(_x) ((_x) << 12) 279 #define VIDISD14C_ALPHA1_R_MASK (0xf << 8) 280 #define VIDISD14C_ALPHA1_R_SHIFT 8 281 #define VIDISD14C_ALPHA1_R_LIMIT 0xf 282 #define VIDISD14C_ALPHA1_R(_x) ((_x) << 8) 283 #define VIDISD14C_ALPHA1_G_MASK (0xf << 4) 284 #define VIDISD14C_ALPHA1_G_SHIFT 4 285 #define VIDISD14C_ALPHA1_G_LIMIT 0xf 286 #define VIDISD14C_ALPHA1_G(_x) ((_x) << 4) 287 #define VIDISD14C_ALPHA1_B_MASK (0xf << 0) 288 #define VIDISD14C_ALPHA1_B_SHIFT 0 289 #define VIDISD14C_ALPHA1_B_LIMIT 0xf 290 #define VIDISD14C_ALPHA1_B(_x) ((_x) << 0) 291 292 #define VIDW_ALPHA 0x021c 293 #define VIDW_ALPHA_R(_x) ((_x) << 16) 294 #define VIDW_ALPHA_G(_x) ((_x) << 8) 295 #define VIDW_ALPHA_B(_x) ((_x) << 0) 296 297 /* Video buffer addresses */ 298 #define VIDW_BUF_START(_buff) (0xA0 + ((_buff) * 8)) 299 #define VIDW_BUF_START_S(_buff) (0x40A0 + ((_buff) * 8)) 300 #define VIDW_BUF_START1(_buff) (0xA4 + ((_buff) * 8)) 301 #define VIDW_BUF_END(_buff) (0xD0 + ((_buff) * 8)) 302 #define VIDW_BUF_END1(_buff) (0xD4 + ((_buff) * 8)) 303 #define VIDW_BUF_SIZE(_buff) (0x100 + ((_buff) * 4)) 304 305 #define VIDW_BUF_SIZE_OFFSET_E(_x) ((((_x) & 0x2000) >> 13) << 27) 306 #define VIDW_BUF_SIZE_OFFSET_MASK (0x1fff << 13) 307 #define VIDW_BUF_SIZE_OFFSET_SHIFT 13 308 #define VIDW_BUF_SIZE_OFFSET_LIMIT 0x1fff 309 #define VIDW_BUF_SIZE_OFFSET(_x) (((_x) & 0x1fff) << 13) 310 311 #define VIDW_BUF_SIZE_PAGEWIDTH_E(_x) ((((_x) & 0x2000) >> 13) << 26) 312 #define VIDW_BUF_SIZE_PAGEWIDTH_MASK (0x1fff << 0) 313 #define VIDW_BUF_SIZE_PAGEWIDTH_SHIFT 0 314 #define VIDW_BUF_SIZE_PAGEWIDTH_LIMIT 0x1fff 315 #define VIDW_BUF_SIZE_PAGEWIDTH(_x) (((_x) & 0x1fff) << 0) 316 317 /* Interrupt controls and status */ 318 319 #define VIDINTCON0 0x130 320 #define VIDINTCON0_FIFOINTERVAL_MASK (0x3f << 20) 321 #define VIDINTCON0_FIFOINTERVAL_SHIFT 20 322 #define VIDINTCON0_FIFOINTERVAL_LIMIT 0x3f 323 #define VIDINTCON0_FIFOINTERVAL(_x) ((_x) << 20) 324 325 #define VIDINTCON0_INT_SYSMAINCON (1 << 19) 326 #define VIDINTCON0_INT_SYSSUBCON (1 << 18) 327 #define VIDINTCON0_INT_I80IFDONE (1 << 17) 328 329 #define VIDINTCON0_FRAMESEL0_MASK (0x3 << 15) 330 #define VIDINTCON0_FRAMESEL0_SHIFT 15 331 #define VIDINTCON0_FRAMESEL0_BACKPORCH (0x0 << 15) 332 #define VIDINTCON0_FRAMESEL0_VSYNC (0x1 << 15) 333 #define VIDINTCON0_FRAMESEL0_ACTIVE (0x2 << 15) 334 #define VIDINTCON0_FRAMESEL0_FRONTPORCH (0x3 << 15) 335 336 #define VIDINTCON0_FRAMESEL1 (1 << 13) 337 #define VIDINTCON0_FRAMESEL1_MASK (0x3 << 13) 338 #define VIDINTCON0_FRAMESEL1_NONE (0x0 << 13) 339 #define VIDINTCON0_FRAMESEL1_BACKPORCH (0x1 << 13) 340 #define VIDINTCON0_FRAMESEL1_VSYNC (0x2 << 13) 341 #define VIDINTCON0_FRAMESEL1_FRONTPORCH (0x3 << 13) 342 343 #define VIDINTCON0_INT_FRAME (1 << 12) 344 #define VIDINTCON0_FIFIOSEL_MASK (0x7f << 5) 345 #define VIDINTCON0_FIFIOSEL_SHIFT 5 346 #define VIDINTCON0_FIFIOSEL_WINDOW0 (0x1 << 5) 347 #define VIDINTCON0_FIFIOSEL_WINDOW1 (0x2 << 5) 348 #define VIDINTCON0_FIFIOSEL_WINDOW2 (0x10 << 5) 349 #define VIDINTCON0_FIFIOSEL_WINDOW3 (0x20 << 5) 350 #define VIDINTCON0_FIFIOSEL_WINDOW4 (0x40 << 5) 351 352 #define VIDINTCON0_FIFOLEVEL_MASK (0x7 << 2) 353 #define VIDINTCON0_FIFOLEVEL_SHIFT 2 354 #define VIDINTCON0_FIFOLEVEL_TO25PC (0x0 << 2) 355 #define VIDINTCON0_FIFOLEVEL_TO50PC (0x1 << 2) 356 #define VIDINTCON0_FIFOLEVEL_TO75PC (0x2 << 2) 357 #define VIDINTCON0_FIFOLEVEL_EMPTY (0x3 << 2) 358 #define VIDINTCON0_FIFOLEVEL_FULL (0x4 << 2) 359 360 #define VIDINTCON0_INT_FIFO_MASK (0x3 << 0) 361 #define VIDINTCON0_INT_FIFO_SHIFT 0 362 #define VIDINTCON0_INT_ENABLE (1 << 0) 363 364 #define VIDINTCON1 0x134 365 #define VIDINTCON1_INT_I80 (1 << 2) 366 #define VIDINTCON1_INT_FRAME (1 << 1) 367 #define VIDINTCON1_INT_FIFO (1 << 0) 368 369 /* Window colour-key control registers */ 370 #define WKEYCON 0x140 371 372 #define WKEYCON0 0x00 373 #define WKEYCON1 0x04 374 375 #define WxKEYCON0_KEYBL_EN (1 << 26) 376 #define WxKEYCON0_KEYEN_F (1 << 25) 377 #define WxKEYCON0_DIRCON (1 << 24) 378 #define WxKEYCON0_COMPKEY_MASK (0xffffff << 0) 379 #define WxKEYCON0_COMPKEY_SHIFT 0 380 #define WxKEYCON0_COMPKEY_LIMIT 0xffffff 381 #define WxKEYCON0_COMPKEY(_x) ((_x) << 0) 382 #define WxKEYCON1_COLVAL_MASK (0xffffff << 0) 383 #define WxKEYCON1_COLVAL_SHIFT 0 384 #define WxKEYCON1_COLVAL_LIMIT 0xffffff 385 #define WxKEYCON1_COLVAL(_x) ((_x) << 0) 386 387 /* Dithering control */ 388 #define DITHMODE 0x170 389 #define DITHMODE_R_POS_MASK (0x3 << 5) 390 #define DITHMODE_R_POS_SHIFT 5 391 #define DITHMODE_R_POS_8BIT (0x0 << 5) 392 #define DITHMODE_R_POS_6BIT (0x1 << 5) 393 #define DITHMODE_R_POS_5BIT (0x2 << 5) 394 #define DITHMODE_G_POS_MASK (0x3 << 3) 395 #define DITHMODE_G_POS_SHIFT 3 396 #define DITHMODE_G_POS_8BIT (0x0 << 3) 397 #define DITHMODE_G_POS_6BIT (0x1 << 3) 398 #define DITHMODE_G_POS_5BIT (0x2 << 3) 399 #define DITHMODE_B_POS_MASK (0x3 << 1) 400 #define DITHMODE_B_POS_SHIFT 1 401 #define DITHMODE_B_POS_8BIT (0x0 << 1) 402 #define DITHMODE_B_POS_6BIT (0x1 << 1) 403 #define DITHMODE_B_POS_5BIT (0x2 << 1) 404 #define DITHMODE_DITH_EN (1 << 0) 405 406 /* Window blanking (MAP) */ 407 #define WINxMAP(_win) (0x180 + ((_win) * 4)) 408 #define WINxMAP_MAP (1 << 24) 409 #define WINxMAP_MAP_COLOUR_MASK (0xffffff << 0) 410 #define WINxMAP_MAP_COLOUR_SHIFT 0 411 #define WINxMAP_MAP_COLOUR_LIMIT 0xffffff 412 #define WINxMAP_MAP_COLOUR(_x) ((_x) << 0) 413 414 /* Winodw palette control */ 415 #define WPALCON 0x1A0 416 #define WPALCON_PAL_UPDATE (1 << 9) 417 #define WPALCON_W4PAL_16BPP_A555 (1 << 8) 418 #define WPALCON_W3PAL_16BPP_A555 (1 << 7) 419 #define WPALCON_W2PAL_16BPP_A555 (1 << 6) 420 #define WPALCON_W1PAL_MASK (0x7 << 3) 421 #define WPALCON_W1PAL_SHIFT 3 422 #define WPALCON_W1PAL_25BPP_A888 (0x0 << 3) 423 #define WPALCON_W1PAL_24BPP (0x1 << 3) 424 #define WPALCON_W1PAL_19BPP_A666 (0x2 << 3) 425 #define WPALCON_W1PAL_18BPP_A665 (0x3 << 3) 426 #define WPALCON_W1PAL_18BPP (0x4 << 3) 427 #define WPALCON_W1PAL_16BPP_A555 (0x5 << 3) 428 #define WPALCON_W1PAL_16BPP_565 (0x6 << 3) 429 #define WPALCON_W0PAL_MASK (0x7 << 0) 430 #define WPALCON_W0PAL_SHIFT 0 431 #define WPALCON_W0PAL_25BPP_A888 (0x0 << 0) 432 #define WPALCON_W0PAL_24BPP (0x1 << 0) 433 #define WPALCON_W0PAL_19BPP_A666 (0x2 << 0) 434 #define WPALCON_W0PAL_18BPP_A665 (0x3 << 0) 435 #define WPALCON_W0PAL_18BPP (0x4 << 0) 436 #define WPALCON_W0PAL_16BPP_A555 (0x5 << 0) 437 #define WPALCON_W0PAL_16BPP_565 (0x6 << 0) 438 439 /* Blending equation control */ 440 #define BLENDCON 0x260 441 #define BLENDCON_NEW_MASK (1 << 0) 442 #define BLENDCON_NEW_8BIT_ALPHA_VALUE (1 << 0) 443 #define BLENDCON_NEW_4BIT_ALPHA_VALUE (0 << 0) 444 445 /* Display port clock control */ 446 #define DP_MIE_CLKCON 0x27c 447 #define DP_MIE_CLK_DISABLE 0x0 448 #define DP_MIE_CLK_DP_ENABLE 0x2 449 #define DP_MIE_CLK_MIE_ENABLE 0x3 450 451 /* Notes on per-window bpp settings 452 * 453 * Value Win0 Win1 Win2 Win3 Win 4 454 * 0000 1(P) 1(P) 1(P) 1(P) 1(P) 455 * 0001 2(P) 2(P) 2(P) 2(P) 2(P) 456 * 0010 4(P) 4(P) 4(P) 4(P) -none- 457 * 0011 8(P) 8(P) -none- -none- -none- 458 * 0100 -none- 8(A232) 8(A232) -none- -none- 459 * 0101 16(565) 16(565) 16(565) 16(565) 16(565) 460 * 0110 -none- 16(A555) 16(A555) 16(A555) 16(A555) 461 * 0111 16(I555) 16(I565) 16(I555) 16(I555) 16(I555) 462 * 1000 18(666) 18(666) 18(666) 18(666) 18(666) 463 * 1001 -none- 18(A665) 18(A665) 18(A665) 16(A665) 464 * 1010 -none- 19(A666) 19(A666) 19(A666) 19(A666) 465 * 1011 24(888) 24(888) 24(888) 24(888) 24(888) 466 * 1100 -none- 24(A887) 24(A887) 24(A887) 24(A887) 467 * 1101 -none- 25(A888) 25(A888) 25(A888) 25(A888) 468 * 1110 -none- -none- -none- -none- -none- 469 * 1111 -none- -none- -none- -none- -none- 470 */ 471 472 /* FIMD Version 8 register offset definitions */ 473 #define FIMD_V8_VIDTCON0 0x20010 474 #define FIMD_V8_VIDTCON1 0x20014 475 #define FIMD_V8_VIDTCON2 0x20018 476 #define FIMD_V8_VIDTCON3 0x2001C 477 #define FIMD_V8_VIDCON1 0x20004 478