11da177e4SLinus Torvalds /* 27901c799SRalf Baechle * linux/include/video/pmagb-b-fb.h 31da177e4SLinus Torvalds * 47901c799SRalf Baechle * TURBOchannel PMAGB-B Smart Frame Buffer (SFB) card support, 51da177e4SLinus Torvalds * Copyright (C) 1999, 2000, 2001 by 61da177e4SLinus Torvalds * Michael Engel <engel@unix-ag.org> and 71da177e4SLinus Torvalds * Karsten Merker <merker@linuxtag.org> 87901c799SRalf Baechle * Copyright (c) 2005 Maciej W. Rozycki 97901c799SRalf Baechle * 101da177e4SLinus Torvalds * This file is subject to the terms and conditions of the GNU General 111da177e4SLinus Torvalds * Public License. See the file COPYING in the main directory of this 121da177e4SLinus Torvalds * archive for more details. 131da177e4SLinus Torvalds */ 141da177e4SLinus Torvalds 157901c799SRalf Baechle /* IOmem resource offsets. */ 167901c799SRalf Baechle #define PMAGB_B_ROM 0x000000 /* REX option ROM */ 177901c799SRalf Baechle #define PMAGB_B_SFB 0x100000 /* SFB ASIC */ 187901c799SRalf Baechle #define PMAGB_B_GP0 0x140000 /* general purpose output 0 */ 197901c799SRalf Baechle #define PMAGB_B_GP1 0x180000 /* general purpose output 1 */ 207901c799SRalf Baechle #define PMAGB_B_BT459 0x1c0000 /* Bt459 RAMDAC */ 217901c799SRalf Baechle #define PMAGB_B_FBMEM 0x200000 /* frame buffer */ 227901c799SRalf Baechle #define PMAGB_B_SIZE 0x400000 /* address space size */ 231da177e4SLinus Torvalds 247901c799SRalf Baechle /* IOmem register offsets. */ 257901c799SRalf Baechle #define SFB_REG_VID_HOR 0x64 /* video horizontal setup */ 267901c799SRalf Baechle #define SFB_REG_VID_VER 0x68 /* video vertical setup */ 277901c799SRalf Baechle #define SFB_REG_VID_BASE 0x6c /* video base address */ 287901c799SRalf Baechle #define SFB_REG_TCCLK_COUNT 0x78 /* TURBOchannel clock count */ 297901c799SRalf Baechle #define SFB_REG_VIDCLK_COUNT 0x7c /* video clock count */ 301da177e4SLinus Torvalds 317901c799SRalf Baechle /* Video horizontal setup register constants. All bits are r/w. */ 327901c799SRalf Baechle #define SFB_VID_HOR_BP_SHIFT 0x15 /* back porch */ 337901c799SRalf Baechle #define SFB_VID_HOR_BP_MASK 0x7f 347901c799SRalf Baechle #define SFB_VID_HOR_SYN_SHIFT 0x0e /* sync pulse */ 357901c799SRalf Baechle #define SFB_VID_HOR_SYN_MASK 0x7f 367901c799SRalf Baechle #define SFB_VID_HOR_FP_SHIFT 0x09 /* front porch */ 377901c799SRalf Baechle #define SFB_VID_HOR_FP_MASK 0x1f 387901c799SRalf Baechle #define SFB_VID_HOR_PIX_SHIFT 0x00 /* active video */ 397901c799SRalf Baechle #define SFB_VID_HOR_PIX_MASK 0x1ff 401da177e4SLinus Torvalds 417901c799SRalf Baechle /* Video vertical setup register constants. All bits are r/w. */ 427901c799SRalf Baechle #define SFB_VID_VER_BP_SHIFT 0x16 /* back porch */ 437901c799SRalf Baechle #define SFB_VID_VER_BP_MASK 0x3f 447901c799SRalf Baechle #define SFB_VID_VER_SYN_SHIFT 0x10 /* sync pulse */ 457901c799SRalf Baechle #define SFB_VID_VER_SYN_MASK 0x3f 467901c799SRalf Baechle #define SFB_VID_VER_FP_SHIFT 0x0b /* front porch */ 477901c799SRalf Baechle #define SFB_VID_VER_FP_MASK 0x1f 487901c799SRalf Baechle #define SFB_VID_VER_SL_SHIFT 0x00 /* active scan lines */ 497901c799SRalf Baechle #define SFB_VID_VER_SL_MASK 0x7ff 501da177e4SLinus Torvalds 517901c799SRalf Baechle /* Video base address register constants. All bits are r/w. */ 527901c799SRalf Baechle #define SFB_VID_BASE_MASK 0x1ff /* video base row address */ 537901c799SRalf Baechle 547901c799SRalf Baechle /* Bt459 register offsets, byte-wide registers. */ 557901c799SRalf Baechle #define BT459_ADDR_LO 0x0 /* address low */ 567901c799SRalf Baechle #define BT459_ADDR_HI 0x4 /* address high */ 577901c799SRalf Baechle #define BT459_DATA 0x8 /* data window register */ 587901c799SRalf Baechle #define BT459_CMAP 0xc /* color map window register */ 59