1 /* SPDX-License-Identifier: GPL-2.0-or-later */ 2 /* 3 * Header file for AT91/AT32 LCD Controller 4 * 5 * Data structure and register user interface 6 * 7 * Copyright (C) 2007 Atmel Corporation 8 */ 9 #ifndef __ATMEL_LCDC_H__ 10 #define __ATMEL_LCDC_H__ 11 12 #include <linux/workqueue.h> 13 14 /* Way LCD wires are connected to the chip: 15 * Some Atmel chips use BGR color mode (instead of standard RGB) 16 * A swapped wiring onboard can bring to RGB mode. 17 */ 18 #define ATMEL_LCDC_WIRING_BGR 0 19 #define ATMEL_LCDC_WIRING_RGB 1 20 21 22 /* LCD Controller info data structure, stored in device platform_data */ 23 struct atmel_lcdfb_pdata { 24 unsigned int guard_time; 25 bool lcdcon_is_backlight; 26 bool lcdcon_pol_negative; 27 u8 default_bpp; 28 u8 lcd_wiring_mode; 29 unsigned int default_lcdcon2; 30 unsigned int default_dmacon; 31 void (*atmel_lcdfb_power_control)(struct atmel_lcdfb_pdata *pdata, int on); 32 struct fb_monspecs *default_monspecs; 33 34 struct list_head pwr_gpios; 35 }; 36 37 #define ATMEL_LCDC_DMABADDR1 0x00 38 #define ATMEL_LCDC_DMABADDR2 0x04 39 #define ATMEL_LCDC_DMAFRMPT1 0x08 40 #define ATMEL_LCDC_DMAFRMPT2 0x0c 41 #define ATMEL_LCDC_DMAFRMADD1 0x10 42 #define ATMEL_LCDC_DMAFRMADD2 0x14 43 44 #define ATMEL_LCDC_DMAFRMCFG 0x18 45 #define ATMEL_LCDC_FRSIZE (0x7fffff << 0) 46 #define ATMEL_LCDC_BLENGTH_OFFSET 24 47 #define ATMEL_LCDC_BLENGTH (0x7f << ATMEL_LCDC_BLENGTH_OFFSET) 48 49 #define ATMEL_LCDC_DMACON 0x1c 50 #define ATMEL_LCDC_DMAEN (0x1 << 0) 51 #define ATMEL_LCDC_DMARST (0x1 << 1) 52 #define ATMEL_LCDC_DMABUSY (0x1 << 2) 53 #define ATMEL_LCDC_DMAUPDT (0x1 << 3) 54 #define ATMEL_LCDC_DMA2DEN (0x1 << 4) 55 56 #define ATMEL_LCDC_DMA2DCFG 0x20 57 #define ATMEL_LCDC_ADDRINC_OFFSET 0 58 #define ATMEL_LCDC_ADDRINC (0xffff) 59 #define ATMEL_LCDC_PIXELOFF_OFFSET 24 60 #define ATMEL_LCDC_PIXELOFF (0x1f << 24) 61 62 #define ATMEL_LCDC_LCDCON1 0x0800 63 #define ATMEL_LCDC_BYPASS (1 << 0) 64 #define ATMEL_LCDC_CLKVAL_OFFSET 12 65 #define ATMEL_LCDC_CLKVAL (0x1ff << ATMEL_LCDC_CLKVAL_OFFSET) 66 #define ATMEL_LCDC_LINCNT (0x7ff << 21) 67 68 #define ATMEL_LCDC_LCDCON2 0x0804 69 #define ATMEL_LCDC_DISTYPE (3 << 0) 70 #define ATMEL_LCDC_DISTYPE_STNMONO (0 << 0) 71 #define ATMEL_LCDC_DISTYPE_STNCOLOR (1 << 0) 72 #define ATMEL_LCDC_DISTYPE_TFT (2 << 0) 73 #define ATMEL_LCDC_SCANMOD (1 << 2) 74 #define ATMEL_LCDC_SCANMOD_SINGLE (0 << 2) 75 #define ATMEL_LCDC_SCANMOD_DUAL (1 << 2) 76 #define ATMEL_LCDC_IFWIDTH (3 << 3) 77 #define ATMEL_LCDC_IFWIDTH_4 (0 << 3) 78 #define ATMEL_LCDC_IFWIDTH_8 (1 << 3) 79 #define ATMEL_LCDC_IFWIDTH_16 (2 << 3) 80 #define ATMEL_LCDC_PIXELSIZE (7 << 5) 81 #define ATMEL_LCDC_PIXELSIZE_1 (0 << 5) 82 #define ATMEL_LCDC_PIXELSIZE_2 (1 << 5) 83 #define ATMEL_LCDC_PIXELSIZE_4 (2 << 5) 84 #define ATMEL_LCDC_PIXELSIZE_8 (3 << 5) 85 #define ATMEL_LCDC_PIXELSIZE_16 (4 << 5) 86 #define ATMEL_LCDC_PIXELSIZE_24 (5 << 5) 87 #define ATMEL_LCDC_PIXELSIZE_32 (6 << 5) 88 #define ATMEL_LCDC_INVVD (1 << 8) 89 #define ATMEL_LCDC_INVVD_NORMAL (0 << 8) 90 #define ATMEL_LCDC_INVVD_INVERTED (1 << 8) 91 #define ATMEL_LCDC_INVFRAME (1 << 9 ) 92 #define ATMEL_LCDC_INVFRAME_NORMAL (0 << 9) 93 #define ATMEL_LCDC_INVFRAME_INVERTED (1 << 9) 94 #define ATMEL_LCDC_INVLINE (1 << 10) 95 #define ATMEL_LCDC_INVLINE_NORMAL (0 << 10) 96 #define ATMEL_LCDC_INVLINE_INVERTED (1 << 10) 97 #define ATMEL_LCDC_INVCLK (1 << 11) 98 #define ATMEL_LCDC_INVCLK_NORMAL (0 << 11) 99 #define ATMEL_LCDC_INVCLK_INVERTED (1 << 11) 100 #define ATMEL_LCDC_INVDVAL (1 << 12) 101 #define ATMEL_LCDC_INVDVAL_NORMAL (0 << 12) 102 #define ATMEL_LCDC_INVDVAL_INVERTED (1 << 12) 103 #define ATMEL_LCDC_CLKMOD (1 << 15) 104 #define ATMEL_LCDC_CLKMOD_ACTIVEDISPLAY (0 << 15) 105 #define ATMEL_LCDC_CLKMOD_ALWAYSACTIVE (1 << 15) 106 #define ATMEL_LCDC_MEMOR (1 << 31) 107 #define ATMEL_LCDC_MEMOR_BIG (0 << 31) 108 #define ATMEL_LCDC_MEMOR_LITTLE (1 << 31) 109 110 #define ATMEL_LCDC_TIM1 0x0808 111 #define ATMEL_LCDC_VFP (0xffU << 0) 112 #define ATMEL_LCDC_VBP_OFFSET 8 113 #define ATMEL_LCDC_VBP (0xffU << ATMEL_LCDC_VBP_OFFSET) 114 #define ATMEL_LCDC_VPW_OFFSET 16 115 #define ATMEL_LCDC_VPW (0x3fU << ATMEL_LCDC_VPW_OFFSET) 116 #define ATMEL_LCDC_VHDLY_OFFSET 24 117 #define ATMEL_LCDC_VHDLY (0xfU << ATMEL_LCDC_VHDLY_OFFSET) 118 119 #define ATMEL_LCDC_TIM2 0x080c 120 #define ATMEL_LCDC_HBP (0xffU << 0) 121 #define ATMEL_LCDC_HPW_OFFSET 8 122 #define ATMEL_LCDC_HPW (0x3fU << ATMEL_LCDC_HPW_OFFSET) 123 #define ATMEL_LCDC_HFP_OFFSET 21 124 #define ATMEL_LCDC_HFP (0x7ffU << ATMEL_LCDC_HFP_OFFSET) 125 126 #define ATMEL_LCDC_LCDFRMCFG 0x0810 127 #define ATMEL_LCDC_LINEVAL (0x7ff << 0) 128 #define ATMEL_LCDC_HOZVAL_OFFSET 21 129 #define ATMEL_LCDC_HOZVAL (0x7ff << ATMEL_LCDC_HOZVAL_OFFSET) 130 131 #define ATMEL_LCDC_FIFO 0x0814 132 #define ATMEL_LCDC_FIFOTH (0xffff) 133 134 #define ATMEL_LCDC_MVAL 0x0818 135 136 #define ATMEL_LCDC_DP1_2 0x081c 137 #define ATMEL_LCDC_DP4_7 0x0820 138 #define ATMEL_LCDC_DP3_5 0x0824 139 #define ATMEL_LCDC_DP2_3 0x0828 140 #define ATMEL_LCDC_DP5_7 0x082c 141 #define ATMEL_LCDC_DP3_4 0x0830 142 #define ATMEL_LCDC_DP4_5 0x0834 143 #define ATMEL_LCDC_DP6_7 0x0838 144 #define ATMEL_LCDC_DP1_2_VAL (0xff) 145 #define ATMEL_LCDC_DP4_7_VAL (0xfffffff) 146 #define ATMEL_LCDC_DP3_5_VAL (0xfffff) 147 #define ATMEL_LCDC_DP2_3_VAL (0xfff) 148 #define ATMEL_LCDC_DP5_7_VAL (0xfffffff) 149 #define ATMEL_LCDC_DP3_4_VAL (0xffff) 150 #define ATMEL_LCDC_DP4_5_VAL (0xfffff) 151 #define ATMEL_LCDC_DP6_7_VAL (0xfffffff) 152 153 #define ATMEL_LCDC_PWRCON 0x083c 154 #define ATMEL_LCDC_PWR (1 << 0) 155 #define ATMEL_LCDC_GUARDT_OFFSET 1 156 #define ATMEL_LCDC_GUARDT (0x7f << ATMEL_LCDC_GUARDT_OFFSET) 157 #define ATMEL_LCDC_BUSY (1 << 31) 158 159 #define ATMEL_LCDC_CONTRAST_CTR 0x0840 160 #define ATMEL_LCDC_PS (3 << 0) 161 #define ATMEL_LCDC_PS_DIV1 (0 << 0) 162 #define ATMEL_LCDC_PS_DIV2 (1 << 0) 163 #define ATMEL_LCDC_PS_DIV4 (2 << 0) 164 #define ATMEL_LCDC_PS_DIV8 (3 << 0) 165 #define ATMEL_LCDC_POL (1 << 2) 166 #define ATMEL_LCDC_POL_NEGATIVE (0 << 2) 167 #define ATMEL_LCDC_POL_POSITIVE (1 << 2) 168 #define ATMEL_LCDC_ENA (1 << 3) 169 #define ATMEL_LCDC_ENA_PWMDISABLE (0 << 3) 170 #define ATMEL_LCDC_ENA_PWMENABLE (1 << 3) 171 172 #define ATMEL_LCDC_CONTRAST_VAL 0x0844 173 #define ATMEL_LCDC_CVAL (0xff) 174 175 #define ATMEL_LCDC_IER 0x0848 176 #define ATMEL_LCDC_IDR 0x084c 177 #define ATMEL_LCDC_IMR 0x0850 178 #define ATMEL_LCDC_ISR 0x0854 179 #define ATMEL_LCDC_ICR 0x0858 180 #define ATMEL_LCDC_LNI (1 << 0) 181 #define ATMEL_LCDC_LSTLNI (1 << 1) 182 #define ATMEL_LCDC_EOFI (1 << 2) 183 #define ATMEL_LCDC_UFLWI (1 << 4) 184 #define ATMEL_LCDC_OWRI (1 << 5) 185 #define ATMEL_LCDC_MERI (1 << 6) 186 187 #define ATMEL_LCDC_LUT(n) (0x0c00 + ((n)*4)) 188 189 #endif /* __ATMEL_LCDC_H__ */ 190