1 /* SPDX-License-Identifier: GPL-2.0-or-later */ 2 /* 3 * Universal Flash Storage Host controller driver 4 * Copyright (C) 2011-2013 Samsung India Software Operations 5 * Copyright (c) 2013-2016, The Linux Foundation. All rights reserved. 6 * 7 * Authors: 8 * Santosh Yaraganavi <santosh.sy@samsung.com> 9 * Vinayak Holikatti <h.vinayak@samsung.com> 10 */ 11 12 #ifndef _UFSHCD_H 13 #define _UFSHCD_H 14 15 #include <linux/bitfield.h> 16 #include <linux/blk-crypto-profile.h> 17 #include <linux/blk-mq.h> 18 #include <linux/devfreq.h> 19 #include <linux/pm_runtime.h> 20 #include <scsi/scsi_device.h> 21 #include <ufs/unipro.h> 22 #include <ufs/ufs.h> 23 #include <ufs/ufs_quirks.h> 24 #include <ufs/ufshci.h> 25 26 #define UFSHCD "ufshcd" 27 28 struct ufs_hba; 29 30 enum dev_cmd_type { 31 DEV_CMD_TYPE_NOP = 0x0, 32 DEV_CMD_TYPE_QUERY = 0x1, 33 }; 34 35 enum ufs_event_type { 36 /* uic specific errors */ 37 UFS_EVT_PA_ERR = 0, 38 UFS_EVT_DL_ERR, 39 UFS_EVT_NL_ERR, 40 UFS_EVT_TL_ERR, 41 UFS_EVT_DME_ERR, 42 43 /* fatal errors */ 44 UFS_EVT_AUTO_HIBERN8_ERR, 45 UFS_EVT_FATAL_ERR, 46 UFS_EVT_LINK_STARTUP_FAIL, 47 UFS_EVT_RESUME_ERR, 48 UFS_EVT_SUSPEND_ERR, 49 UFS_EVT_WL_SUSP_ERR, 50 UFS_EVT_WL_RES_ERR, 51 52 /* abnormal events */ 53 UFS_EVT_DEV_RESET, 54 UFS_EVT_HOST_RESET, 55 UFS_EVT_ABORT, 56 57 UFS_EVT_CNT, 58 }; 59 60 /** 61 * struct uic_command - UIC command structure 62 * @command: UIC command 63 * @argument1: UIC command argument 1 64 * @argument2: UIC command argument 2 65 * @argument3: UIC command argument 3 66 * @cmd_active: Indicate if UIC command is outstanding 67 * @done: UIC command completion 68 */ 69 struct uic_command { 70 u32 command; 71 u32 argument1; 72 u32 argument2; 73 u32 argument3; 74 int cmd_active; 75 struct completion done; 76 }; 77 78 /* Used to differentiate the power management options */ 79 enum ufs_pm_op { 80 UFS_RUNTIME_PM, 81 UFS_SYSTEM_PM, 82 UFS_SHUTDOWN_PM, 83 }; 84 85 /* Host <-> Device UniPro Link state */ 86 enum uic_link_state { 87 UIC_LINK_OFF_STATE = 0, /* Link powered down or disabled */ 88 UIC_LINK_ACTIVE_STATE = 1, /* Link is in Fast/Slow/Sleep state */ 89 UIC_LINK_HIBERN8_STATE = 2, /* Link is in Hibernate state */ 90 UIC_LINK_BROKEN_STATE = 3, /* Link is in broken state */ 91 }; 92 93 #define ufshcd_is_link_off(hba) ((hba)->uic_link_state == UIC_LINK_OFF_STATE) 94 #define ufshcd_is_link_active(hba) ((hba)->uic_link_state == \ 95 UIC_LINK_ACTIVE_STATE) 96 #define ufshcd_is_link_hibern8(hba) ((hba)->uic_link_state == \ 97 UIC_LINK_HIBERN8_STATE) 98 #define ufshcd_is_link_broken(hba) ((hba)->uic_link_state == \ 99 UIC_LINK_BROKEN_STATE) 100 #define ufshcd_set_link_off(hba) ((hba)->uic_link_state = UIC_LINK_OFF_STATE) 101 #define ufshcd_set_link_active(hba) ((hba)->uic_link_state = \ 102 UIC_LINK_ACTIVE_STATE) 103 #define ufshcd_set_link_hibern8(hba) ((hba)->uic_link_state = \ 104 UIC_LINK_HIBERN8_STATE) 105 #define ufshcd_set_link_broken(hba) ((hba)->uic_link_state = \ 106 UIC_LINK_BROKEN_STATE) 107 108 #define ufshcd_set_ufs_dev_active(h) \ 109 ((h)->curr_dev_pwr_mode = UFS_ACTIVE_PWR_MODE) 110 #define ufshcd_set_ufs_dev_sleep(h) \ 111 ((h)->curr_dev_pwr_mode = UFS_SLEEP_PWR_MODE) 112 #define ufshcd_set_ufs_dev_poweroff(h) \ 113 ((h)->curr_dev_pwr_mode = UFS_POWERDOWN_PWR_MODE) 114 #define ufshcd_set_ufs_dev_deepsleep(h) \ 115 ((h)->curr_dev_pwr_mode = UFS_DEEPSLEEP_PWR_MODE) 116 #define ufshcd_is_ufs_dev_active(h) \ 117 ((h)->curr_dev_pwr_mode == UFS_ACTIVE_PWR_MODE) 118 #define ufshcd_is_ufs_dev_sleep(h) \ 119 ((h)->curr_dev_pwr_mode == UFS_SLEEP_PWR_MODE) 120 #define ufshcd_is_ufs_dev_poweroff(h) \ 121 ((h)->curr_dev_pwr_mode == UFS_POWERDOWN_PWR_MODE) 122 #define ufshcd_is_ufs_dev_deepsleep(h) \ 123 ((h)->curr_dev_pwr_mode == UFS_DEEPSLEEP_PWR_MODE) 124 125 /* 126 * UFS Power management levels. 127 * Each level is in increasing order of power savings, except DeepSleep 128 * which is lower than PowerDown with power on but not PowerDown with 129 * power off. 130 */ 131 enum ufs_pm_level { 132 UFS_PM_LVL_0, 133 UFS_PM_LVL_1, 134 UFS_PM_LVL_2, 135 UFS_PM_LVL_3, 136 UFS_PM_LVL_4, 137 UFS_PM_LVL_5, 138 UFS_PM_LVL_6, 139 UFS_PM_LVL_MAX 140 }; 141 142 struct ufs_pm_lvl_states { 143 enum ufs_dev_pwr_mode dev_state; 144 enum uic_link_state link_state; 145 }; 146 147 /** 148 * struct ufshcd_lrb - local reference block 149 * @utr_descriptor_ptr: UTRD address of the command 150 * @ucd_req_ptr: UCD address of the command 151 * @ucd_rsp_ptr: Response UPIU address for this command 152 * @ucd_prdt_ptr: PRDT address of the command 153 * @utrd_dma_addr: UTRD dma address for debug 154 * @ucd_prdt_dma_addr: PRDT dma address for debug 155 * @ucd_rsp_dma_addr: UPIU response dma address for debug 156 * @ucd_req_dma_addr: UPIU request dma address for debug 157 * @cmd: pointer to SCSI command 158 * @scsi_status: SCSI status of the command 159 * @command_type: SCSI, UFS, Query. 160 * @task_tag: Task tag of the command 161 * @lun: LUN of the command 162 * @intr_cmd: Interrupt command (doesn't participate in interrupt aggregation) 163 * @issue_time_stamp: time stamp for debug purposes (CLOCK_MONOTONIC) 164 * @issue_time_stamp_local_clock: time stamp for debug purposes (local_clock) 165 * @compl_time_stamp: time stamp for statistics (CLOCK_MONOTONIC) 166 * @compl_time_stamp_local_clock: time stamp for debug purposes (local_clock) 167 * @crypto_key_slot: the key slot to use for inline crypto (-1 if none) 168 * @data_unit_num: the data unit number for the first block for inline crypto 169 * @req_abort_skip: skip request abort task flag 170 */ 171 struct ufshcd_lrb { 172 struct utp_transfer_req_desc *utr_descriptor_ptr; 173 struct utp_upiu_req *ucd_req_ptr; 174 struct utp_upiu_rsp *ucd_rsp_ptr; 175 struct ufshcd_sg_entry *ucd_prdt_ptr; 176 177 dma_addr_t utrd_dma_addr; 178 dma_addr_t ucd_req_dma_addr; 179 dma_addr_t ucd_rsp_dma_addr; 180 dma_addr_t ucd_prdt_dma_addr; 181 182 struct scsi_cmnd *cmd; 183 int scsi_status; 184 185 int command_type; 186 int task_tag; 187 u8 lun; /* UPIU LUN id field is only 8-bit wide */ 188 bool intr_cmd; 189 ktime_t issue_time_stamp; 190 u64 issue_time_stamp_local_clock; 191 ktime_t compl_time_stamp; 192 u64 compl_time_stamp_local_clock; 193 #ifdef CONFIG_SCSI_UFS_CRYPTO 194 int crypto_key_slot; 195 u64 data_unit_num; 196 #endif 197 198 bool req_abort_skip; 199 }; 200 201 /** 202 * struct ufs_query - holds relevant data structures for query request 203 * @request: request upiu and function 204 * @descriptor: buffer for sending/receiving descriptor 205 * @response: response upiu and response 206 */ 207 struct ufs_query { 208 struct ufs_query_req request; 209 u8 *descriptor; 210 struct ufs_query_res response; 211 }; 212 213 /** 214 * struct ufs_dev_cmd - all assosiated fields with device management commands 215 * @type: device management command type - Query, NOP OUT 216 * @lock: lock to allow one command at a time 217 * @complete: internal commands completion 218 * @query: Device management query information 219 */ 220 struct ufs_dev_cmd { 221 enum dev_cmd_type type; 222 struct mutex lock; 223 struct completion *complete; 224 struct ufs_query query; 225 }; 226 227 /** 228 * struct ufs_clk_info - UFS clock related info 229 * @list: list headed by hba->clk_list_head 230 * @clk: clock node 231 * @name: clock name 232 * @max_freq: maximum frequency supported by the clock 233 * @min_freq: min frequency that can be used for clock scaling 234 * @curr_freq: indicates the current frequency that it is set to 235 * @keep_link_active: indicates that the clk should not be disabled if 236 * link is active 237 * @enabled: variable to check against multiple enable/disable 238 */ 239 struct ufs_clk_info { 240 struct list_head list; 241 struct clk *clk; 242 const char *name; 243 u32 max_freq; 244 u32 min_freq; 245 u32 curr_freq; 246 bool keep_link_active; 247 bool enabled; 248 }; 249 250 enum ufs_notify_change_status { 251 PRE_CHANGE, 252 POST_CHANGE, 253 }; 254 255 struct ufs_pa_layer_attr { 256 u32 gear_rx; 257 u32 gear_tx; 258 u32 lane_rx; 259 u32 lane_tx; 260 u32 pwr_rx; 261 u32 pwr_tx; 262 u32 hs_rate; 263 }; 264 265 struct ufs_pwr_mode_info { 266 bool is_valid; 267 struct ufs_pa_layer_attr info; 268 }; 269 270 /** 271 * struct ufs_hba_variant_ops - variant specific callbacks 272 * @name: variant name 273 * @init: called when the driver is initialized 274 * @exit: called to cleanup everything done in init 275 * @get_ufs_hci_version: called to get UFS HCI version 276 * @clk_scale_notify: notifies that clks are scaled up/down 277 * @setup_clocks: called before touching any of the controller registers 278 * @hce_enable_notify: called before and after HCE enable bit is set to allow 279 * variant specific Uni-Pro initialization. 280 * @link_startup_notify: called before and after Link startup is carried out 281 * to allow variant specific Uni-Pro initialization. 282 * @pwr_change_notify: called before and after a power mode change 283 * is carried out to allow vendor spesific capabilities 284 * to be set. 285 * @setup_xfer_req: called before any transfer request is issued 286 * to set some things 287 * @setup_task_mgmt: called before any task management request is issued 288 * to set some things 289 * @hibern8_notify: called around hibern8 enter/exit 290 * @apply_dev_quirks: called to apply device specific quirks 291 * @fixup_dev_quirks: called to modify device specific quirks 292 * @suspend: called during host controller PM callback 293 * @resume: called during host controller PM callback 294 * @dbg_register_dump: used to dump controller debug information 295 * @phy_initialization: used to initialize phys 296 * @device_reset: called to issue a reset pulse on the UFS device 297 * @config_scaling_param: called to configure clock scaling parameters 298 * @program_key: program or evict an inline encryption key 299 * @event_notify: called to notify important events 300 */ 301 struct ufs_hba_variant_ops { 302 const char *name; 303 int (*init)(struct ufs_hba *); 304 void (*exit)(struct ufs_hba *); 305 u32 (*get_ufs_hci_version)(struct ufs_hba *); 306 int (*clk_scale_notify)(struct ufs_hba *, bool, 307 enum ufs_notify_change_status); 308 int (*setup_clocks)(struct ufs_hba *, bool, 309 enum ufs_notify_change_status); 310 int (*hce_enable_notify)(struct ufs_hba *, 311 enum ufs_notify_change_status); 312 int (*link_startup_notify)(struct ufs_hba *, 313 enum ufs_notify_change_status); 314 int (*pwr_change_notify)(struct ufs_hba *, 315 enum ufs_notify_change_status status, 316 struct ufs_pa_layer_attr *, 317 struct ufs_pa_layer_attr *); 318 void (*setup_xfer_req)(struct ufs_hba *hba, int tag, 319 bool is_scsi_cmd); 320 void (*setup_task_mgmt)(struct ufs_hba *, int, u8); 321 void (*hibern8_notify)(struct ufs_hba *, enum uic_cmd_dme, 322 enum ufs_notify_change_status); 323 int (*apply_dev_quirks)(struct ufs_hba *hba); 324 void (*fixup_dev_quirks)(struct ufs_hba *hba); 325 int (*suspend)(struct ufs_hba *, enum ufs_pm_op, 326 enum ufs_notify_change_status); 327 int (*resume)(struct ufs_hba *, enum ufs_pm_op); 328 void (*dbg_register_dump)(struct ufs_hba *hba); 329 int (*phy_initialization)(struct ufs_hba *); 330 int (*device_reset)(struct ufs_hba *hba); 331 void (*config_scaling_param)(struct ufs_hba *hba, 332 struct devfreq_dev_profile *profile, 333 struct devfreq_simple_ondemand_data *data); 334 int (*program_key)(struct ufs_hba *hba, 335 const union ufs_crypto_cfg_entry *cfg, int slot); 336 void (*event_notify)(struct ufs_hba *hba, 337 enum ufs_event_type evt, void *data); 338 }; 339 340 /* clock gating state */ 341 enum clk_gating_state { 342 CLKS_OFF, 343 CLKS_ON, 344 REQ_CLKS_OFF, 345 REQ_CLKS_ON, 346 }; 347 348 /** 349 * struct ufs_clk_gating - UFS clock gating related info 350 * @gate_work: worker to turn off clocks after some delay as specified in 351 * delay_ms 352 * @ungate_work: worker to turn on clocks that will be used in case of 353 * interrupt context 354 * @state: the current clocks state 355 * @delay_ms: gating delay in ms 356 * @is_suspended: clk gating is suspended when set to 1 which can be used 357 * during suspend/resume 358 * @delay_attr: sysfs attribute to control delay_attr 359 * @enable_attr: sysfs attribute to enable/disable clock gating 360 * @is_enabled: Indicates the current status of clock gating 361 * @is_initialized: Indicates whether clock gating is initialized or not 362 * @active_reqs: number of requests that are pending and should be waited for 363 * completion before gating clocks. 364 * @clk_gating_workq: workqueue for clock gating work. 365 */ 366 struct ufs_clk_gating { 367 struct delayed_work gate_work; 368 struct work_struct ungate_work; 369 enum clk_gating_state state; 370 unsigned long delay_ms; 371 bool is_suspended; 372 struct device_attribute delay_attr; 373 struct device_attribute enable_attr; 374 bool is_enabled; 375 bool is_initialized; 376 int active_reqs; 377 struct workqueue_struct *clk_gating_workq; 378 }; 379 380 struct ufs_saved_pwr_info { 381 struct ufs_pa_layer_attr info; 382 bool is_valid; 383 }; 384 385 /** 386 * struct ufs_clk_scaling - UFS clock scaling related data 387 * @active_reqs: number of requests that are pending. If this is zero when 388 * devfreq ->target() function is called then schedule "suspend_work" to 389 * suspend devfreq. 390 * @tot_busy_t: Total busy time in current polling window 391 * @window_start_t: Start time (in jiffies) of the current polling window 392 * @busy_start_t: Start time of current busy period 393 * @enable_attr: sysfs attribute to enable/disable clock scaling 394 * @saved_pwr_info: UFS power mode may also be changed during scaling and this 395 * one keeps track of previous power mode. 396 * @workq: workqueue to schedule devfreq suspend/resume work 397 * @suspend_work: worker to suspend devfreq 398 * @resume_work: worker to resume devfreq 399 * @min_gear: lowest HS gear to scale down to 400 * @is_enabled: tracks if scaling is currently enabled or not, controlled by 401 * clkscale_enable sysfs node 402 * @is_allowed: tracks if scaling is currently allowed or not, used to block 403 * clock scaling which is not invoked from devfreq governor 404 * @is_initialized: Indicates whether clock scaling is initialized or not 405 * @is_busy_started: tracks if busy period has started or not 406 * @is_suspended: tracks if devfreq is suspended or not 407 */ 408 struct ufs_clk_scaling { 409 int active_reqs; 410 unsigned long tot_busy_t; 411 ktime_t window_start_t; 412 ktime_t busy_start_t; 413 struct device_attribute enable_attr; 414 struct ufs_saved_pwr_info saved_pwr_info; 415 struct workqueue_struct *workq; 416 struct work_struct suspend_work; 417 struct work_struct resume_work; 418 u32 min_gear; 419 bool is_enabled; 420 bool is_allowed; 421 bool is_initialized; 422 bool is_busy_started; 423 bool is_suspended; 424 }; 425 426 #define UFS_EVENT_HIST_LENGTH 8 427 /** 428 * struct ufs_event_hist - keeps history of errors 429 * @pos: index to indicate cyclic buffer position 430 * @val: cyclic buffer for registers value 431 * @tstamp: cyclic buffer for time stamp 432 * @cnt: error counter 433 */ 434 struct ufs_event_hist { 435 int pos; 436 u32 val[UFS_EVENT_HIST_LENGTH]; 437 u64 tstamp[UFS_EVENT_HIST_LENGTH]; 438 unsigned long long cnt; 439 }; 440 441 /** 442 * struct ufs_stats - keeps usage/err statistics 443 * @last_intr_status: record the last interrupt status. 444 * @last_intr_ts: record the last interrupt timestamp. 445 * @hibern8_exit_cnt: Counter to keep track of number of exits, 446 * reset this after link-startup. 447 * @last_hibern8_exit_tstamp: Set time after the hibern8 exit. 448 * Clear after the first successful command completion. 449 * @event: array with event history. 450 */ 451 struct ufs_stats { 452 u32 last_intr_status; 453 u64 last_intr_ts; 454 455 u32 hibern8_exit_cnt; 456 u64 last_hibern8_exit_tstamp; 457 struct ufs_event_hist event[UFS_EVT_CNT]; 458 }; 459 460 /** 461 * enum ufshcd_state - UFS host controller state 462 * @UFSHCD_STATE_RESET: Link is not operational. Postpone SCSI command 463 * processing. 464 * @UFSHCD_STATE_OPERATIONAL: The host controller is operational and can process 465 * SCSI commands. 466 * @UFSHCD_STATE_EH_SCHEDULED_NON_FATAL: The error handler has been scheduled. 467 * SCSI commands may be submitted to the controller. 468 * @UFSHCD_STATE_EH_SCHEDULED_FATAL: The error handler has been scheduled. Fail 469 * newly submitted SCSI commands with error code DID_BAD_TARGET. 470 * @UFSHCD_STATE_ERROR: An unrecoverable error occurred, e.g. link recovery 471 * failed. Fail all SCSI commands with error code DID_ERROR. 472 */ 473 enum ufshcd_state { 474 UFSHCD_STATE_RESET, 475 UFSHCD_STATE_OPERATIONAL, 476 UFSHCD_STATE_EH_SCHEDULED_NON_FATAL, 477 UFSHCD_STATE_EH_SCHEDULED_FATAL, 478 UFSHCD_STATE_ERROR, 479 }; 480 481 enum ufshcd_quirks { 482 /* Interrupt aggregation support is broken */ 483 UFSHCD_QUIRK_BROKEN_INTR_AGGR = 1 << 0, 484 485 /* 486 * delay before each dme command is required as the unipro 487 * layer has shown instabilities 488 */ 489 UFSHCD_QUIRK_DELAY_BEFORE_DME_CMDS = 1 << 1, 490 491 /* 492 * If UFS host controller is having issue in processing LCC (Line 493 * Control Command) coming from device then enable this quirk. 494 * When this quirk is enabled, host controller driver should disable 495 * the LCC transmission on UFS device (by clearing TX_LCC_ENABLE 496 * attribute of device to 0). 497 */ 498 UFSHCD_QUIRK_BROKEN_LCC = 1 << 2, 499 500 /* 501 * The attribute PA_RXHSUNTERMCAP specifies whether or not the 502 * inbound Link supports unterminated line in HS mode. Setting this 503 * attribute to 1 fixes moving to HS gear. 504 */ 505 UFSHCD_QUIRK_BROKEN_PA_RXHSUNTERMCAP = 1 << 3, 506 507 /* 508 * This quirk needs to be enabled if the host controller only allows 509 * accessing the peer dme attributes in AUTO mode (FAST AUTO or 510 * SLOW AUTO). 511 */ 512 UFSHCD_QUIRK_DME_PEER_ACCESS_AUTO_MODE = 1 << 4, 513 514 /* 515 * This quirk needs to be enabled if the host controller doesn't 516 * advertise the correct version in UFS_VER register. If this quirk 517 * is enabled, standard UFS host driver will call the vendor specific 518 * ops (get_ufs_hci_version) to get the correct version. 519 */ 520 UFSHCD_QUIRK_BROKEN_UFS_HCI_VERSION = 1 << 5, 521 522 /* 523 * Clear handling for transfer/task request list is just opposite. 524 */ 525 UFSHCI_QUIRK_BROKEN_REQ_LIST_CLR = 1 << 6, 526 527 /* 528 * This quirk needs to be enabled if host controller doesn't allow 529 * that the interrupt aggregation timer and counter are reset by s/w. 530 */ 531 UFSHCI_QUIRK_SKIP_RESET_INTR_AGGR = 1 << 7, 532 533 /* 534 * This quirks needs to be enabled if host controller cannot be 535 * enabled via HCE register. 536 */ 537 UFSHCI_QUIRK_BROKEN_HCE = 1 << 8, 538 539 /* 540 * This quirk needs to be enabled if the host controller regards 541 * resolution of the values of PRDTO and PRDTL in UTRD as byte. 542 */ 543 UFSHCD_QUIRK_PRDT_BYTE_GRAN = 1 << 9, 544 545 /* 546 * This quirk needs to be enabled if the host controller reports 547 * OCS FATAL ERROR with device error through sense data 548 */ 549 UFSHCD_QUIRK_BROKEN_OCS_FATAL_ERROR = 1 << 10, 550 551 /* 552 * This quirk needs to be enabled if the host controller has 553 * auto-hibernate capability but it doesn't work. 554 */ 555 UFSHCD_QUIRK_BROKEN_AUTO_HIBERN8 = 1 << 11, 556 557 /* 558 * This quirk needs to disable manual flush for write booster 559 */ 560 UFSHCI_QUIRK_SKIP_MANUAL_WB_FLUSH_CTRL = 1 << 12, 561 562 /* 563 * This quirk needs to disable unipro timeout values 564 * before power mode change 565 */ 566 UFSHCD_QUIRK_SKIP_DEF_UNIPRO_TIMEOUT_SETTING = 1 << 13, 567 568 /* 569 * This quirk allows only sg entries aligned with page size. 570 */ 571 UFSHCD_QUIRK_ALIGN_SG_WITH_PAGE_SIZE = 1 << 14, 572 573 /* 574 * This quirk needs to be enabled if the host controller does not 575 * support UIC command 576 */ 577 UFSHCD_QUIRK_BROKEN_UIC_CMD = 1 << 15, 578 579 /* 580 * This quirk needs to be enabled if the host controller cannot 581 * support physical host configuration. 582 */ 583 UFSHCD_QUIRK_SKIP_PH_CONFIGURATION = 1 << 16, 584 585 /* 586 * This quirk needs to be enabled if the host controller has 587 * 64-bit addressing supported capability but it doesn't work. 588 */ 589 UFSHCD_QUIRK_BROKEN_64BIT_ADDRESS = 1 << 17, 590 591 /* 592 * This quirk needs to be enabled if the host controller has 593 * auto-hibernate capability but it's FASTAUTO only. 594 */ 595 UFSHCD_QUIRK_HIBERN_FASTAUTO = 1 << 18, 596 }; 597 598 enum ufshcd_caps { 599 /* Allow dynamic clk gating */ 600 UFSHCD_CAP_CLK_GATING = 1 << 0, 601 602 /* Allow hiberb8 with clk gating */ 603 UFSHCD_CAP_HIBERN8_WITH_CLK_GATING = 1 << 1, 604 605 /* Allow dynamic clk scaling */ 606 UFSHCD_CAP_CLK_SCALING = 1 << 2, 607 608 /* Allow auto bkops to enabled during runtime suspend */ 609 UFSHCD_CAP_AUTO_BKOPS_SUSPEND = 1 << 3, 610 611 /* 612 * This capability allows host controller driver to use the UFS HCI's 613 * interrupt aggregation capability. 614 * CAUTION: Enabling this might reduce overall UFS throughput. 615 */ 616 UFSHCD_CAP_INTR_AGGR = 1 << 4, 617 618 /* 619 * This capability allows the device auto-bkops to be always enabled 620 * except during suspend (both runtime and suspend). 621 * Enabling this capability means that device will always be allowed 622 * to do background operation when it's active but it might degrade 623 * the performance of ongoing read/write operations. 624 */ 625 UFSHCD_CAP_KEEP_AUTO_BKOPS_ENABLED_EXCEPT_SUSPEND = 1 << 5, 626 627 /* 628 * This capability allows host controller driver to automatically 629 * enable runtime power management by itself instead of waiting 630 * for userspace to control the power management. 631 */ 632 UFSHCD_CAP_RPM_AUTOSUSPEND = 1 << 6, 633 634 /* 635 * This capability allows the host controller driver to turn-on 636 * WriteBooster, if the underlying device supports it and is 637 * provisioned to be used. This would increase the write performance. 638 */ 639 UFSHCD_CAP_WB_EN = 1 << 7, 640 641 /* 642 * This capability allows the host controller driver to use the 643 * inline crypto engine, if it is present 644 */ 645 UFSHCD_CAP_CRYPTO = 1 << 8, 646 647 /* 648 * This capability allows the controller regulators to be put into 649 * lpm mode aggressively during clock gating. 650 * This would increase power savings. 651 */ 652 UFSHCD_CAP_AGGR_POWER_COLLAPSE = 1 << 9, 653 654 /* 655 * This capability allows the host controller driver to use DeepSleep, 656 * if it is supported by the UFS device. The host controller driver must 657 * support device hardware reset via the hba->device_reset() callback, 658 * in order to exit DeepSleep state. 659 */ 660 UFSHCD_CAP_DEEPSLEEP = 1 << 10, 661 662 /* 663 * This capability allows the host controller driver to use temperature 664 * notification if it is supported by the UFS device. 665 */ 666 UFSHCD_CAP_TEMP_NOTIF = 1 << 11, 667 668 /* 669 * Enable WriteBooster when scaling up the clock and disable 670 * WriteBooster when scaling the clock down. 671 */ 672 UFSHCD_CAP_WB_WITH_CLK_SCALING = 1 << 12, 673 }; 674 675 struct ufs_hba_variant_params { 676 struct devfreq_dev_profile devfreq_profile; 677 struct devfreq_simple_ondemand_data ondemand_data; 678 u16 hba_enable_delay_us; 679 u32 wb_flush_threshold; 680 }; 681 682 #ifdef CONFIG_SCSI_UFS_HPB 683 /** 684 * struct ufshpb_dev_info - UFSHPB device related info 685 * @num_lu: the number of user logical unit to check whether all lu finished 686 * initialization 687 * @rgn_size: device reported HPB region size 688 * @srgn_size: device reported HPB sub-region size 689 * @slave_conf_cnt: counter to check all lu finished initialization 690 * @hpb_disabled: flag to check if HPB is disabled 691 * @max_hpb_single_cmd: device reported bMAX_DATA_SIZE_FOR_SINGLE_CMD value 692 * @is_legacy: flag to check HPB 1.0 693 * @control_mode: either host or device 694 */ 695 struct ufshpb_dev_info { 696 int num_lu; 697 int rgn_size; 698 int srgn_size; 699 atomic_t slave_conf_cnt; 700 bool hpb_disabled; 701 u8 max_hpb_single_cmd; 702 bool is_legacy; 703 u8 control_mode; 704 }; 705 #endif 706 707 struct ufs_hba_monitor { 708 unsigned long chunk_size; 709 710 unsigned long nr_sec_rw[2]; 711 ktime_t total_busy[2]; 712 713 unsigned long nr_req[2]; 714 /* latencies*/ 715 ktime_t lat_sum[2]; 716 ktime_t lat_max[2]; 717 ktime_t lat_min[2]; 718 719 u32 nr_queued[2]; 720 ktime_t busy_start_ts[2]; 721 722 ktime_t enabled_ts; 723 bool enabled; 724 }; 725 726 /** 727 * struct ufs_hba - per adapter private structure 728 * @mmio_base: UFSHCI base register address 729 * @ucdl_base_addr: UFS Command Descriptor base address 730 * @utrdl_base_addr: UTP Transfer Request Descriptor base address 731 * @utmrdl_base_addr: UTP Task Management Descriptor base address 732 * @ucdl_dma_addr: UFS Command Descriptor DMA address 733 * @utrdl_dma_addr: UTRDL DMA address 734 * @utmrdl_dma_addr: UTMRDL DMA address 735 * @host: Scsi_Host instance of the driver 736 * @dev: device handle 737 * @ufs_device_wlun: WLUN that controls the entire UFS device. 738 * @hwmon_device: device instance registered with the hwmon core. 739 * @curr_dev_pwr_mode: active UFS device power mode. 740 * @uic_link_state: active state of the link to the UFS device. 741 * @rpm_lvl: desired UFS power management level during runtime PM. 742 * @spm_lvl: desired UFS power management level during system PM. 743 * @pm_op_in_progress: whether or not a PM operation is in progress. 744 * @ahit: value of Auto-Hibernate Idle Timer register. 745 * @lrb: local reference block 746 * @outstanding_tasks: Bits representing outstanding task requests 747 * @outstanding_lock: Protects @outstanding_reqs. 748 * @outstanding_reqs: Bits representing outstanding transfer requests 749 * @capabilities: UFS Controller Capabilities 750 * @nutrs: Transfer Request Queue depth supported by controller 751 * @nutmrs: Task Management Queue depth supported by controller 752 * @reserved_slot: Used to submit device commands. Protected by @dev_cmd.lock. 753 * @ufs_version: UFS Version to which controller complies 754 * @vops: pointer to variant specific operations 755 * @vps: pointer to variant specific parameters 756 * @priv: pointer to variant specific private data 757 * @irq: Irq number of the controller 758 * @is_irq_enabled: whether or not the UFS controller interrupt is enabled. 759 * @dev_ref_clk_freq: reference clock frequency 760 * @quirks: bitmask with information about deviations from the UFSHCI standard. 761 * @dev_quirks: bitmask with information about deviations from the UFS standard. 762 * @tmf_tag_set: TMF tag set. 763 * @tmf_queue: Used to allocate TMF tags. 764 * @tmf_rqs: array with pointers to TMF requests while these are in progress. 765 * @active_uic_cmd: handle of active UIC command 766 * @uic_cmd_mutex: mutex for UIC command 767 * @uic_async_done: completion used during UIC processing 768 * @ufshcd_state: UFSHCD state 769 * @eh_flags: Error handling flags 770 * @intr_mask: Interrupt Mask Bits 771 * @ee_ctrl_mask: Exception event control mask 772 * @ee_drv_mask: Exception event mask for driver 773 * @ee_usr_mask: Exception event mask for user (set via debugfs) 774 * @ee_ctrl_mutex: Used to serialize exception event information. 775 * @is_powered: flag to check if HBA is powered 776 * @shutting_down: flag to check if shutdown has been invoked 777 * @host_sem: semaphore used to serialize concurrent contexts 778 * @eh_wq: Workqueue that eh_work works on 779 * @eh_work: Worker to handle UFS errors that require s/w attention 780 * @eeh_work: Worker to handle exception events 781 * @errors: HBA errors 782 * @uic_error: UFS interconnect layer error status 783 * @saved_err: sticky error mask 784 * @saved_uic_err: sticky UIC error mask 785 * @ufs_stats: various error counters 786 * @force_reset: flag to force eh_work perform a full reset 787 * @force_pmc: flag to force a power mode change 788 * @silence_err_logs: flag to silence error logs 789 * @dev_cmd: ufs device management command information 790 * @last_dme_cmd_tstamp: time stamp of the last completed DME command 791 * @nop_out_timeout: NOP OUT timeout value 792 * @dev_info: information about the UFS device 793 * @auto_bkops_enabled: to track whether bkops is enabled in device 794 * @vreg_info: UFS device voltage regulator information 795 * @clk_list_head: UFS host controller clocks list node head 796 * @req_abort_count: number of times ufshcd_abort() has been called 797 * @lanes_per_direction: number of lanes per data direction between the UFS 798 * controller and the UFS device. 799 * @pwr_info: holds current power mode 800 * @max_pwr_info: keeps the device max valid pwm 801 * @clk_gating: information related to clock gating 802 * @caps: bitmask with information about UFS controller capabilities 803 * @devfreq: frequency scaling information owned by the devfreq core 804 * @clk_scaling: frequency scaling information owned by the UFS driver 805 * @is_sys_suspended: whether or not the entire system has been suspended 806 * @urgent_bkops_lvl: keeps track of urgent bkops level for device 807 * @is_urgent_bkops_lvl_checked: keeps track if the urgent bkops level for 808 * device is known or not. 809 * @clk_scaling_lock: used to serialize device commands and clock scaling 810 * @desc_size: descriptor sizes reported by device 811 * @scsi_block_reqs_cnt: reference counting for scsi block requests 812 * @bsg_dev: struct device associated with the BSG queue 813 * @bsg_queue: BSG queue associated with the UFS controller 814 * @rpm_dev_flush_recheck_work: used to suspend from RPM (runtime power 815 * management) after the UFS device has finished a WriteBooster buffer 816 * flush or auto BKOP. 817 * @ufshpb_dev: information related to HPB (Host Performance Booster). 818 * @monitor: statistics about UFS commands 819 * @crypto_capabilities: Content of crypto capabilities register (0x100) 820 * @crypto_cap_array: Array of crypto capabilities 821 * @crypto_cfg_register: Start of the crypto cfg array 822 * @crypto_profile: the crypto profile of this hba (if applicable) 823 * @debugfs_root: UFS controller debugfs root directory 824 * @debugfs_ee_work: used to restore ee_ctrl_mask after a delay 825 * @debugfs_ee_rate_limit_ms: user configurable delay after which to restore 826 * ee_ctrl_mask 827 * @luns_avail: number of regular and well known LUNs supported by the UFS 828 * device 829 * @complete_put: whether or not to call ufshcd_rpm_put() from inside 830 * ufshcd_resume_complete() 831 */ 832 struct ufs_hba { 833 void __iomem *mmio_base; 834 835 /* Virtual memory reference */ 836 struct utp_transfer_cmd_desc *ucdl_base_addr; 837 struct utp_transfer_req_desc *utrdl_base_addr; 838 struct utp_task_req_desc *utmrdl_base_addr; 839 840 /* DMA memory reference */ 841 dma_addr_t ucdl_dma_addr; 842 dma_addr_t utrdl_dma_addr; 843 dma_addr_t utmrdl_dma_addr; 844 845 struct Scsi_Host *host; 846 struct device *dev; 847 struct scsi_device *ufs_device_wlun; 848 849 #ifdef CONFIG_SCSI_UFS_HWMON 850 struct device *hwmon_device; 851 #endif 852 853 enum ufs_dev_pwr_mode curr_dev_pwr_mode; 854 enum uic_link_state uic_link_state; 855 /* Desired UFS power management level during runtime PM */ 856 enum ufs_pm_level rpm_lvl; 857 /* Desired UFS power management level during system PM */ 858 enum ufs_pm_level spm_lvl; 859 int pm_op_in_progress; 860 861 /* Auto-Hibernate Idle Timer register value */ 862 u32 ahit; 863 864 struct ufshcd_lrb *lrb; 865 866 unsigned long outstanding_tasks; 867 spinlock_t outstanding_lock; 868 unsigned long outstanding_reqs; 869 870 u32 capabilities; 871 int nutrs; 872 int nutmrs; 873 u32 reserved_slot; 874 u32 ufs_version; 875 const struct ufs_hba_variant_ops *vops; 876 struct ufs_hba_variant_params *vps; 877 void *priv; 878 unsigned int irq; 879 bool is_irq_enabled; 880 enum ufs_ref_clk_freq dev_ref_clk_freq; 881 882 unsigned int quirks; /* Deviations from standard UFSHCI spec. */ 883 884 /* Device deviations from standard UFS device spec. */ 885 unsigned int dev_quirks; 886 887 struct blk_mq_tag_set tmf_tag_set; 888 struct request_queue *tmf_queue; 889 struct request **tmf_rqs; 890 891 struct uic_command *active_uic_cmd; 892 struct mutex uic_cmd_mutex; 893 struct completion *uic_async_done; 894 895 enum ufshcd_state ufshcd_state; 896 u32 eh_flags; 897 u32 intr_mask; 898 u16 ee_ctrl_mask; 899 u16 ee_drv_mask; 900 u16 ee_usr_mask; 901 struct mutex ee_ctrl_mutex; 902 bool is_powered; 903 bool shutting_down; 904 struct semaphore host_sem; 905 906 /* Work Queues */ 907 struct workqueue_struct *eh_wq; 908 struct work_struct eh_work; 909 struct work_struct eeh_work; 910 911 /* HBA Errors */ 912 u32 errors; 913 u32 uic_error; 914 u32 saved_err; 915 u32 saved_uic_err; 916 struct ufs_stats ufs_stats; 917 bool force_reset; 918 bool force_pmc; 919 bool silence_err_logs; 920 921 /* Device management request data */ 922 struct ufs_dev_cmd dev_cmd; 923 ktime_t last_dme_cmd_tstamp; 924 int nop_out_timeout; 925 926 /* Keeps information of the UFS device connected to this host */ 927 struct ufs_dev_info dev_info; 928 bool auto_bkops_enabled; 929 struct ufs_vreg_info vreg_info; 930 struct list_head clk_list_head; 931 932 /* Number of requests aborts */ 933 int req_abort_count; 934 935 /* Number of lanes available (1 or 2) for Rx/Tx */ 936 u32 lanes_per_direction; 937 struct ufs_pa_layer_attr pwr_info; 938 struct ufs_pwr_mode_info max_pwr_info; 939 940 struct ufs_clk_gating clk_gating; 941 /* Control to enable/disable host capabilities */ 942 u32 caps; 943 944 struct devfreq *devfreq; 945 struct ufs_clk_scaling clk_scaling; 946 bool is_sys_suspended; 947 948 enum bkops_status urgent_bkops_lvl; 949 bool is_urgent_bkops_lvl_checked; 950 951 struct rw_semaphore clk_scaling_lock; 952 unsigned char desc_size[QUERY_DESC_IDN_MAX]; 953 atomic_t scsi_block_reqs_cnt; 954 955 struct device bsg_dev; 956 struct request_queue *bsg_queue; 957 struct delayed_work rpm_dev_flush_recheck_work; 958 959 #ifdef CONFIG_SCSI_UFS_HPB 960 struct ufshpb_dev_info ufshpb_dev; 961 #endif 962 963 struct ufs_hba_monitor monitor; 964 965 #ifdef CONFIG_SCSI_UFS_CRYPTO 966 union ufs_crypto_capabilities crypto_capabilities; 967 union ufs_crypto_cap_entry *crypto_cap_array; 968 u32 crypto_cfg_register; 969 struct blk_crypto_profile crypto_profile; 970 #endif 971 #ifdef CONFIG_DEBUG_FS 972 struct dentry *debugfs_root; 973 struct delayed_work debugfs_ee_work; 974 u32 debugfs_ee_rate_limit_ms; 975 #endif 976 u32 luns_avail; 977 bool complete_put; 978 }; 979 980 /* Returns true if clocks can be gated. Otherwise false */ 981 static inline bool ufshcd_is_clkgating_allowed(struct ufs_hba *hba) 982 { 983 return hba->caps & UFSHCD_CAP_CLK_GATING; 984 } 985 static inline bool ufshcd_can_hibern8_during_gating(struct ufs_hba *hba) 986 { 987 return hba->caps & UFSHCD_CAP_HIBERN8_WITH_CLK_GATING; 988 } 989 static inline int ufshcd_is_clkscaling_supported(struct ufs_hba *hba) 990 { 991 return hba->caps & UFSHCD_CAP_CLK_SCALING; 992 } 993 static inline bool ufshcd_can_autobkops_during_suspend(struct ufs_hba *hba) 994 { 995 return hba->caps & UFSHCD_CAP_AUTO_BKOPS_SUSPEND; 996 } 997 static inline bool ufshcd_is_rpm_autosuspend_allowed(struct ufs_hba *hba) 998 { 999 return hba->caps & UFSHCD_CAP_RPM_AUTOSUSPEND; 1000 } 1001 1002 static inline bool ufshcd_is_intr_aggr_allowed(struct ufs_hba *hba) 1003 { 1004 return (hba->caps & UFSHCD_CAP_INTR_AGGR) && 1005 !(hba->quirks & UFSHCD_QUIRK_BROKEN_INTR_AGGR); 1006 } 1007 1008 static inline bool ufshcd_can_aggressive_pc(struct ufs_hba *hba) 1009 { 1010 return !!(ufshcd_is_link_hibern8(hba) && 1011 (hba->caps & UFSHCD_CAP_AGGR_POWER_COLLAPSE)); 1012 } 1013 1014 static inline bool ufshcd_is_auto_hibern8_supported(struct ufs_hba *hba) 1015 { 1016 return (hba->capabilities & MASK_AUTO_HIBERN8_SUPPORT) && 1017 !(hba->quirks & UFSHCD_QUIRK_BROKEN_AUTO_HIBERN8); 1018 } 1019 1020 static inline bool ufshcd_is_auto_hibern8_enabled(struct ufs_hba *hba) 1021 { 1022 return FIELD_GET(UFSHCI_AHIBERN8_TIMER_MASK, hba->ahit); 1023 } 1024 1025 static inline bool ufshcd_is_wb_allowed(struct ufs_hba *hba) 1026 { 1027 return hba->caps & UFSHCD_CAP_WB_EN; 1028 } 1029 1030 static inline bool ufshcd_enable_wb_if_scaling_up(struct ufs_hba *hba) 1031 { 1032 return hba->caps & UFSHCD_CAP_WB_WITH_CLK_SCALING; 1033 } 1034 1035 #define ufshcd_writel(hba, val, reg) \ 1036 writel((val), (hba)->mmio_base + (reg)) 1037 #define ufshcd_readl(hba, reg) \ 1038 readl((hba)->mmio_base + (reg)) 1039 1040 /** 1041 * ufshcd_rmwl - perform read/modify/write for a controller register 1042 * @hba: per adapter instance 1043 * @mask: mask to apply on read value 1044 * @val: actual value to write 1045 * @reg: register address 1046 */ 1047 static inline void ufshcd_rmwl(struct ufs_hba *hba, u32 mask, u32 val, u32 reg) 1048 { 1049 u32 tmp; 1050 1051 tmp = ufshcd_readl(hba, reg); 1052 tmp &= ~mask; 1053 tmp |= (val & mask); 1054 ufshcd_writel(hba, tmp, reg); 1055 } 1056 1057 int ufshcd_alloc_host(struct device *, struct ufs_hba **); 1058 void ufshcd_dealloc_host(struct ufs_hba *); 1059 int ufshcd_hba_enable(struct ufs_hba *hba); 1060 int ufshcd_init(struct ufs_hba *, void __iomem *, unsigned int); 1061 int ufshcd_link_recovery(struct ufs_hba *hba); 1062 int ufshcd_make_hba_operational(struct ufs_hba *hba); 1063 void ufshcd_remove(struct ufs_hba *); 1064 int ufshcd_uic_hibern8_enter(struct ufs_hba *hba); 1065 int ufshcd_uic_hibern8_exit(struct ufs_hba *hba); 1066 void ufshcd_delay_us(unsigned long us, unsigned long tolerance); 1067 void ufshcd_parse_dev_ref_clk_freq(struct ufs_hba *hba, struct clk *refclk); 1068 void ufshcd_update_evt_hist(struct ufs_hba *hba, u32 id, u32 val); 1069 void ufshcd_hba_stop(struct ufs_hba *hba); 1070 void ufshcd_schedule_eh_work(struct ufs_hba *hba); 1071 1072 static inline void check_upiu_size(void) 1073 { 1074 BUILD_BUG_ON(ALIGNED_UPIU_SIZE < 1075 GENERAL_UPIU_REQUEST_SIZE + QUERY_DESC_MAX_SIZE); 1076 } 1077 1078 /** 1079 * ufshcd_set_variant - set variant specific data to the hba 1080 * @hba: per adapter instance 1081 * @variant: pointer to variant specific data 1082 */ 1083 static inline void ufshcd_set_variant(struct ufs_hba *hba, void *variant) 1084 { 1085 BUG_ON(!hba); 1086 hba->priv = variant; 1087 } 1088 1089 /** 1090 * ufshcd_get_variant - get variant specific data from the hba 1091 * @hba: per adapter instance 1092 */ 1093 static inline void *ufshcd_get_variant(struct ufs_hba *hba) 1094 { 1095 BUG_ON(!hba); 1096 return hba->priv; 1097 } 1098 1099 #ifdef CONFIG_PM 1100 extern int ufshcd_runtime_suspend(struct device *dev); 1101 extern int ufshcd_runtime_resume(struct device *dev); 1102 #endif 1103 #ifdef CONFIG_PM_SLEEP 1104 extern int ufshcd_system_suspend(struct device *dev); 1105 extern int ufshcd_system_resume(struct device *dev); 1106 #endif 1107 extern int ufshcd_shutdown(struct ufs_hba *hba); 1108 extern int ufshcd_dme_configure_adapt(struct ufs_hba *hba, 1109 int agreed_gear, 1110 int adapt_val); 1111 extern int ufshcd_dme_set_attr(struct ufs_hba *hba, u32 attr_sel, 1112 u8 attr_set, u32 mib_val, u8 peer); 1113 extern int ufshcd_dme_get_attr(struct ufs_hba *hba, u32 attr_sel, 1114 u32 *mib_val, u8 peer); 1115 extern int ufshcd_config_pwr_mode(struct ufs_hba *hba, 1116 struct ufs_pa_layer_attr *desired_pwr_mode); 1117 extern int ufshcd_uic_change_pwr_mode(struct ufs_hba *hba, u8 mode); 1118 1119 /* UIC command interfaces for DME primitives */ 1120 #define DME_LOCAL 0 1121 #define DME_PEER 1 1122 #define ATTR_SET_NOR 0 /* NORMAL */ 1123 #define ATTR_SET_ST 1 /* STATIC */ 1124 1125 static inline int ufshcd_dme_set(struct ufs_hba *hba, u32 attr_sel, 1126 u32 mib_val) 1127 { 1128 return ufshcd_dme_set_attr(hba, attr_sel, ATTR_SET_NOR, 1129 mib_val, DME_LOCAL); 1130 } 1131 1132 static inline int ufshcd_dme_st_set(struct ufs_hba *hba, u32 attr_sel, 1133 u32 mib_val) 1134 { 1135 return ufshcd_dme_set_attr(hba, attr_sel, ATTR_SET_ST, 1136 mib_val, DME_LOCAL); 1137 } 1138 1139 static inline int ufshcd_dme_peer_set(struct ufs_hba *hba, u32 attr_sel, 1140 u32 mib_val) 1141 { 1142 return ufshcd_dme_set_attr(hba, attr_sel, ATTR_SET_NOR, 1143 mib_val, DME_PEER); 1144 } 1145 1146 static inline int ufshcd_dme_peer_st_set(struct ufs_hba *hba, u32 attr_sel, 1147 u32 mib_val) 1148 { 1149 return ufshcd_dme_set_attr(hba, attr_sel, ATTR_SET_ST, 1150 mib_val, DME_PEER); 1151 } 1152 1153 static inline int ufshcd_dme_get(struct ufs_hba *hba, 1154 u32 attr_sel, u32 *mib_val) 1155 { 1156 return ufshcd_dme_get_attr(hba, attr_sel, mib_val, DME_LOCAL); 1157 } 1158 1159 static inline int ufshcd_dme_peer_get(struct ufs_hba *hba, 1160 u32 attr_sel, u32 *mib_val) 1161 { 1162 return ufshcd_dme_get_attr(hba, attr_sel, mib_val, DME_PEER); 1163 } 1164 1165 static inline bool ufshcd_is_hs_mode(struct ufs_pa_layer_attr *pwr_info) 1166 { 1167 return (pwr_info->pwr_rx == FAST_MODE || 1168 pwr_info->pwr_rx == FASTAUTO_MODE) && 1169 (pwr_info->pwr_tx == FAST_MODE || 1170 pwr_info->pwr_tx == FASTAUTO_MODE); 1171 } 1172 1173 static inline int ufshcd_disable_host_tx_lcc(struct ufs_hba *hba) 1174 { 1175 return ufshcd_dme_set(hba, UIC_ARG_MIB(PA_LOCAL_TX_LCC_ENABLE), 0); 1176 } 1177 1178 void ufshcd_auto_hibern8_enable(struct ufs_hba *hba); 1179 void ufshcd_auto_hibern8_update(struct ufs_hba *hba, u32 ahit); 1180 void ufshcd_fixup_dev_quirks(struct ufs_hba *hba, 1181 const struct ufs_dev_quirk *fixups); 1182 #define SD_ASCII_STD true 1183 #define SD_RAW false 1184 int ufshcd_read_string_desc(struct ufs_hba *hba, u8 desc_index, 1185 u8 **buf, bool ascii); 1186 1187 int ufshcd_hold(struct ufs_hba *hba, bool async); 1188 void ufshcd_release(struct ufs_hba *hba); 1189 1190 void ufshcd_clkgate_delay_set(struct device *dev, unsigned long value); 1191 1192 void ufshcd_map_desc_id_to_length(struct ufs_hba *hba, enum desc_idn desc_id, 1193 int *desc_length); 1194 1195 u32 ufshcd_get_local_unipro_ver(struct ufs_hba *hba); 1196 1197 int ufshcd_get_vreg(struct device *dev, struct ufs_vreg *vreg); 1198 1199 int ufshcd_send_uic_cmd(struct ufs_hba *hba, struct uic_command *uic_cmd); 1200 1201 int ufshcd_exec_raw_upiu_cmd(struct ufs_hba *hba, 1202 struct utp_upiu_req *req_upiu, 1203 struct utp_upiu_req *rsp_upiu, 1204 int msgcode, 1205 u8 *desc_buff, int *buff_len, 1206 enum query_opcode desc_op); 1207 1208 int ufshcd_wb_toggle(struct ufs_hba *hba, bool enable); 1209 int ufshcd_wb_toggle_buf_flush(struct ufs_hba *hba, bool enable); 1210 int ufshcd_suspend_prepare(struct device *dev); 1211 int __ufshcd_suspend_prepare(struct device *dev, bool rpm_ok_for_spm); 1212 void ufshcd_resume_complete(struct device *dev); 1213 1214 /* Wrapper functions for safely calling variant operations */ 1215 static inline int ufshcd_vops_init(struct ufs_hba *hba) 1216 { 1217 if (hba->vops && hba->vops->init) 1218 return hba->vops->init(hba); 1219 1220 return 0; 1221 } 1222 1223 static inline int ufshcd_vops_phy_initialization(struct ufs_hba *hba) 1224 { 1225 if (hba->vops && hba->vops->phy_initialization) 1226 return hba->vops->phy_initialization(hba); 1227 1228 return 0; 1229 } 1230 1231 extern const struct ufs_pm_lvl_states ufs_pm_lvl_states[]; 1232 1233 int ufshcd_dump_regs(struct ufs_hba *hba, size_t offset, size_t len, 1234 const char *prefix); 1235 1236 int __ufshcd_write_ee_control(struct ufs_hba *hba, u32 ee_ctrl_mask); 1237 int ufshcd_write_ee_control(struct ufs_hba *hba); 1238 int ufshcd_update_ee_control(struct ufs_hba *hba, u16 *mask, 1239 const u16 *other_mask, u16 set, u16 clr); 1240 1241 #endif /* End of Header */ 1242