1 /* 2 * snd_sst_tokens.h - Intel SST tokens definition 3 * 4 * Copyright (C) 2016 Intel Corp 5 * Author: Shreyas NC <shreyas.nc@intel.com> 6 * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ 7 * 8 * This program is free software; you can redistribute it and/or modify 9 * it under the terms of the GNU General Public License as version 2, as 10 * published by the Free Software Foundation. 11 * 12 * This program is distributed in the hope that it will be useful, but 13 * WITHOUT ANY WARRANTY; without even the implied warranty of 14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU 15 * General Public License for more details. 16 */ 17 #ifndef __SND_SST_TOKENS_H__ 18 #define __SND_SST_TOKENS_H__ 19 20 /** 21 * %SKL_TKN_UUID: Module UUID 22 * 23 * %SKL_TKN_U8_BLOCK_TYPE: Type of the private data block.Can be: 24 * tuples, bytes, short and words 25 * 26 * %SKL_TKN_U8_IN_PIN_TYPE: Input pin type, 27 * homogenous=0, heterogenous=1 28 * 29 * %SKL_TKN_U8_OUT_PIN_TYPE: Output pin type, 30 * homogenous=0, heterogenous=1 31 * %SKL_TKN_U8_DYN_IN_PIN: Configure Input pin dynamically 32 * if true 33 * 34 * %SKL_TKN_U8_DYN_OUT_PIN: Configure Output pin dynamically 35 * if true 36 * 37 * %SKL_TKN_U8_IN_QUEUE_COUNT: Store the number of Input pins 38 * 39 * %SKL_TKN_U8_OUT_QUEUE_COUNT: Store the number of Output pins 40 * 41 * %SKL_TKN_U8_TIME_SLOT: TDM slot number 42 * 43 * %SKL_TKN_U8_CORE_ID: Stores module affinity value.Can take 44 * the values: 45 * SKL_AFFINITY_CORE_0 = 0, 46 * SKL_AFFINITY_CORE_1, 47 * SKL_AFFINITY_CORE_MAX 48 * 49 * %SKL_TKN_U8_MOD_TYPE: Module type value. 50 * 51 * %SKL_TKN_U8_CONN_TYPE: Module connection type can be a FE, 52 * BE or NONE as defined : 53 * SKL_PIPE_CONN_TYPE_NONE = 0, 54 * SKL_PIPE_CONN_TYPE_FE = 1 (HOST_DMA) 55 * SKL_PIPE_CONN_TYPE_BE = 2 (LINK_DMA) 56 * 57 * %SKL_TKN_U8_DEV_TYPE: Type of device to which the module is 58 * connected 59 * Can take the values: 60 * SKL_DEVICE_BT = 0x0, 61 * SKL_DEVICE_DMIC = 0x1, 62 * SKL_DEVICE_I2S = 0x2, 63 * SKL_DEVICE_SLIMBUS = 0x3, 64 * SKL_DEVICE_HDALINK = 0x4, 65 * SKL_DEVICE_HDAHOST = 0x5, 66 * SKL_DEVICE_NONE 67 * 68 * %SKL_TKN_U8_HW_CONN_TYPE: Connection type of the HW to which the 69 * module is connected 70 * SKL_CONN_NONE = 0, 71 * SKL_CONN_SOURCE = 1, 72 * SKL_CONN_SINK = 2 73 * 74 * %SKL_TKN_U16_PIN_INST_ID: Stores the pin instance id 75 * 76 * %SKL_TKN_U16_MOD_INST_ID: Stores the mdule instance id 77 * 78 * %SKL_TKN_U32_MAX_MCPS: Module max mcps value 79 * 80 * %SKL_TKN_U32_MEM_PAGES: Module resource pages 81 * 82 * %SKL_TKN_U32_OBS: Stores Output Buffer size 83 * 84 * %SKL_TKN_U32_IBS: Stores input buffer size 85 * 86 * %SKL_TKN_U32_VBUS_ID: Module VBUS_ID. PDM=0, SSP0=0, 87 * SSP1=1,SSP2=2, 88 * SSP3=3, SSP4=4, 89 * SSP5=5, SSP6=6,INVALID 90 * 91 * %SKL_TKN_U32_PARAMS_FIXUP: Module Params fixup mask 92 * %SKL_TKN_U32_CONVERTER: Module params converter mask 93 * %SKL_TKN_U32_PIPE_ID: Stores the pipe id 94 * 95 * %SKL_TKN_U32_PIPE_CONN_TYPE: Type of the token to which the pipe is 96 * connected to. It can be 97 * SKL_PIPE_CONN_TYPE_NONE = 0, 98 * SKL_PIPE_CONN_TYPE_FE = 1 (HOST_DMA), 99 * SKL_PIPE_CONN_TYPE_BE = 2 (LINK_DMA), 100 * 101 * %SKL_TKN_U32_PIPE_PRIORITY: Pipe priority value 102 * %SKL_TKN_U32_PIPE_MEM_PGS: Pipe resource pages 103 * 104 * %SKL_TKN_U32_DIR_PIN_COUNT: Value for the direction to set input/output 105 * formats and the pin count. 106 * The first 4 bits have the direction 107 * value and the next 4 have 108 * the pin count value. 109 * SKL_DIR_IN = 0, SKL_DIR_OUT = 1. 110 * The input and output formats 111 * share the same set of tokens 112 * with the distinction between input 113 * and output made by reading direction 114 * token. 115 * 116 * %SKL_TKN_U32_FMT_CH: Supported channel count 117 * 118 * %SKL_TKN_U32_FMT_FREQ: Supported frequency/sample rate 119 * 120 * %SKL_TKN_U32_FMT_BIT_DEPTH: Supported container size 121 * 122 * %SKL_TKN_U32_FMT_SAMPLE_SIZE:Number of samples in the container 123 * 124 * %SKL_TKN_U32_FMT_CH_CONFIG: Supported channel configurations for the 125 * input/output. 126 * 127 * %SKL_TKN_U32_FMT_INTERLEAVE: Interleaving style which can be per 128 * channel or per sample. The values can be : 129 * SKL_INTERLEAVING_PER_CHANNEL = 0, 130 * SKL_INTERLEAVING_PER_SAMPLE = 1, 131 * 132 * %SKL_TKN_U32_FMT_SAMPLE_TYPE: 133 * Specifies the sample type. Can take the 134 * values: SKL_SAMPLE_TYPE_INT_MSB = 0, 135 * SKL_SAMPLE_TYPE_INT_LSB = 1, 136 * SKL_SAMPLE_TYPE_INT_SIGNED = 2, 137 * SKL_SAMPLE_TYPE_INT_UNSIGNED = 3, 138 * SKL_SAMPLE_TYPE_FLOAT = 4 139 * 140 * %SKL_TKN_U32_CH_MAP: Channel map values 141 * %SKL_TKN_U32_MOD_SET_PARAMS: It can take these values: 142 * SKL_PARAM_DEFAULT, SKL_PARAM_INIT, 143 * SKL_PARAM_SET, SKL_PARAM_BIND 144 * 145 * %SKL_TKN_U32_MOD_PARAM_ID: ID of the module params 146 * 147 * %SKL_TKN_U32_CAPS_SET_PARAMS: 148 * Set params value 149 * 150 * %SKL_TKN_U32_CAPS_PARAMS_ID: Params ID 151 * 152 * %SKL_TKN_U32_CAPS_SIZE: Caps size 153 * 154 * %SKL_TKN_U32_PROC_DOMAIN: Specify processing domain 155 * 156 * %SKL_TKN_U32_LIB_COUNT: Specifies the number of libraries 157 * 158 * %SKL_TKN_STR_LIB_NAME: Specifies the library name 159 * 160 * %SKL_TKN_U32_PMODE: Specifies the power mode for pipe 161 * 162 * %SKL_TKL_U32_D0I3_CAPS: Specifies the D0i3 capability for module 163 * 164 * module_id and loadable flags dont have tokens as these values will be 165 * read from the DSP FW manifest 166 */ 167 enum SKL_TKNS { 168 SKL_TKN_UUID = 1, 169 SKL_TKN_U8_NUM_BLOCKS, 170 SKL_TKN_U8_BLOCK_TYPE, 171 SKL_TKN_U8_IN_PIN_TYPE, 172 SKL_TKN_U8_OUT_PIN_TYPE, 173 SKL_TKN_U8_DYN_IN_PIN, 174 SKL_TKN_U8_DYN_OUT_PIN, 175 SKL_TKN_U8_IN_QUEUE_COUNT, 176 SKL_TKN_U8_OUT_QUEUE_COUNT, 177 SKL_TKN_U8_TIME_SLOT, 178 SKL_TKN_U8_CORE_ID, 179 SKL_TKN_U8_MOD_TYPE, 180 SKL_TKN_U8_CONN_TYPE, 181 SKL_TKN_U8_DEV_TYPE, 182 SKL_TKN_U8_HW_CONN_TYPE, 183 SKL_TKN_U16_MOD_INST_ID, 184 SKL_TKN_U16_BLOCK_SIZE, 185 SKL_TKN_U32_MAX_MCPS, 186 SKL_TKN_U32_MEM_PAGES, 187 SKL_TKN_U32_OBS, 188 SKL_TKN_U32_IBS, 189 SKL_TKN_U32_VBUS_ID, 190 SKL_TKN_U32_PARAMS_FIXUP, 191 SKL_TKN_U32_CONVERTER, 192 SKL_TKN_U32_PIPE_ID, 193 SKL_TKN_U32_PIPE_CONN_TYPE, 194 SKL_TKN_U32_PIPE_PRIORITY, 195 SKL_TKN_U32_PIPE_MEM_PGS, 196 SKL_TKN_U32_DIR_PIN_COUNT, 197 SKL_TKN_U32_FMT_CH, 198 SKL_TKN_U32_FMT_FREQ, 199 SKL_TKN_U32_FMT_BIT_DEPTH, 200 SKL_TKN_U32_FMT_SAMPLE_SIZE, 201 SKL_TKN_U32_FMT_CH_CONFIG, 202 SKL_TKN_U32_FMT_INTERLEAVE, 203 SKL_TKN_U32_FMT_SAMPLE_TYPE, 204 SKL_TKN_U32_FMT_CH_MAP, 205 SKL_TKN_U32_PIN_MOD_ID, 206 SKL_TKN_U32_PIN_INST_ID, 207 SKL_TKN_U32_MOD_SET_PARAMS, 208 SKL_TKN_U32_MOD_PARAM_ID, 209 SKL_TKN_U32_CAPS_SET_PARAMS, 210 SKL_TKN_U32_CAPS_PARAMS_ID, 211 SKL_TKN_U32_CAPS_SIZE, 212 SKL_TKN_U32_PROC_DOMAIN, 213 SKL_TKN_U32_LIB_COUNT, 214 SKL_TKN_STR_LIB_NAME, 215 SKL_TKN_U32_PMODE, 216 SKL_TKL_U32_D0I3_CAPS, 217 SKL_TKN_MAX = SKL_TKL_U32_D0I3_CAPS, 218 }; 219 220 #endif 221