1e2be04c7SGreg Kroah-Hartman /* SPDX-License-Identifier: GPL-2.0+ WITH Linux-syscall-note */ 2674e95caSDavid Howells #ifndef __SOUND_HDSPM_H 3674e95caSDavid Howells #define __SOUND_HDSPM_H 4674e95caSDavid Howells /* 5674e95caSDavid Howells * Copyright (C) 2003 Winfried Ritsch (IEM) 6674e95caSDavid Howells * based on hdsp.h from Thomas Charbonnel (thomas@undata.org) 7674e95caSDavid Howells */ 8674e95caSDavid Howells 9d06ed0c2STakashi Iwai #ifdef __linux__ 10d06ed0c2STakashi Iwai #include <linux/types.h> 11d06ed0c2STakashi Iwai #endif 12d06ed0c2STakashi Iwai 13674e95caSDavid Howells /* Maximum channels is 64 even on 56Mode you have 64playbacks to matrix */ 14674e95caSDavid Howells #define HDSPM_MAX_CHANNELS 64 15674e95caSDavid Howells 16674e95caSDavid Howells enum hdspm_io_type { 17674e95caSDavid Howells MADI, 18674e95caSDavid Howells MADIface, 19674e95caSDavid Howells AIO, 20674e95caSDavid Howells AES32, 21674e95caSDavid Howells RayDAT 22674e95caSDavid Howells }; 23674e95caSDavid Howells 24674e95caSDavid Howells enum hdspm_speed { 25674e95caSDavid Howells ss, 26674e95caSDavid Howells ds, 27674e95caSDavid Howells qs 28674e95caSDavid Howells }; 29674e95caSDavid Howells 30674e95caSDavid Howells /* -------------------- IOCTL Peak/RMS Meters -------------------- */ 31674e95caSDavid Howells 32674e95caSDavid Howells struct hdspm_peak_rms { 33ffc287c8SMikko Rapeli __u32 input_peaks[64]; 34ffc287c8SMikko Rapeli __u32 playback_peaks[64]; 35ffc287c8SMikko Rapeli __u32 output_peaks[64]; 36674e95caSDavid Howells 37ffc287c8SMikko Rapeli __u64 input_rms[64]; 38ffc287c8SMikko Rapeli __u64 playback_rms[64]; 39ffc287c8SMikko Rapeli __u64 output_rms[64]; 40674e95caSDavid Howells 41ffc287c8SMikko Rapeli __u8 speed; /* enum {ss, ds, qs} */ 42674e95caSDavid Howells int status2; 43674e95caSDavid Howells }; 44674e95caSDavid Howells 45674e95caSDavid Howells #define SNDRV_HDSPM_IOCTL_GET_PEAK_RMS \ 46674e95caSDavid Howells _IOR('H', 0x42, struct hdspm_peak_rms) 47674e95caSDavid Howells 48674e95caSDavid Howells /* ------------ CONFIG block IOCTL ---------------------- */ 49674e95caSDavid Howells 50674e95caSDavid Howells struct hdspm_config { 51674e95caSDavid Howells unsigned char pref_sync_ref; 52674e95caSDavid Howells unsigned char wordclock_sync_check; 53674e95caSDavid Howells unsigned char madi_sync_check; 54674e95caSDavid Howells unsigned int system_sample_rate; 55674e95caSDavid Howells unsigned int autosync_sample_rate; 56674e95caSDavid Howells unsigned char system_clock_mode; 57674e95caSDavid Howells unsigned char clock_source; 58674e95caSDavid Howells unsigned char autosync_ref; 59674e95caSDavid Howells unsigned char line_out; 60674e95caSDavid Howells unsigned int passthru; 61674e95caSDavid Howells unsigned int analog_out; 62674e95caSDavid Howells }; 63674e95caSDavid Howells 64674e95caSDavid Howells #define SNDRV_HDSPM_IOCTL_GET_CONFIG \ 65674e95caSDavid Howells _IOR('H', 0x41, struct hdspm_config) 66674e95caSDavid Howells 67ddcecf6bSTakashi Iwai /* 68674e95caSDavid Howells * If there's a TCO (TimeCode Option) board installed, 69674e95caSDavid Howells * there are further options and status data available. 70674e95caSDavid Howells * The hdspm_ltc structure contains the current SMPTE 71674e95caSDavid Howells * timecode and some status information and can be 72674e95caSDavid Howells * obtained via SNDRV_HDSPM_IOCTL_GET_LTC or in the 73674e95caSDavid Howells * hdspm_status struct. 74ddcecf6bSTakashi Iwai */ 75674e95caSDavid Howells 76674e95caSDavid Howells enum hdspm_ltc_format { 77674e95caSDavid Howells format_invalid, 78674e95caSDavid Howells fps_24, 79674e95caSDavid Howells fps_25, 80674e95caSDavid Howells fps_2997, 81674e95caSDavid Howells fps_30 82674e95caSDavid Howells }; 83674e95caSDavid Howells 84674e95caSDavid Howells enum hdspm_ltc_frame { 85674e95caSDavid Howells frame_invalid, 86674e95caSDavid Howells drop_frame, 87674e95caSDavid Howells full_frame 88674e95caSDavid Howells }; 89674e95caSDavid Howells 90674e95caSDavid Howells enum hdspm_ltc_input_format { 91674e95caSDavid Howells ntsc, 92674e95caSDavid Howells pal, 93674e95caSDavid Howells no_video 94674e95caSDavid Howells }; 95674e95caSDavid Howells 96674e95caSDavid Howells struct hdspm_ltc { 97674e95caSDavid Howells unsigned int ltc; 98674e95caSDavid Howells 99674e95caSDavid Howells enum hdspm_ltc_format format; 100674e95caSDavid Howells enum hdspm_ltc_frame frame; 101674e95caSDavid Howells enum hdspm_ltc_input_format input_format; 102674e95caSDavid Howells }; 103674e95caSDavid Howells 104b43dd416SAdrian Knoth #define SNDRV_HDSPM_IOCTL_GET_LTC _IOR('H', 0x46, struct hdspm_ltc) 105674e95caSDavid Howells 106ddcecf6bSTakashi Iwai /* 107674e95caSDavid Howells * The status data reflects the device's current state 108674e95caSDavid Howells * as determined by the card's configuration and 109674e95caSDavid Howells * connection status. 110ddcecf6bSTakashi Iwai */ 111674e95caSDavid Howells 112674e95caSDavid Howells enum hdspm_sync { 113674e95caSDavid Howells hdspm_sync_no_lock = 0, 114674e95caSDavid Howells hdspm_sync_lock = 1, 115674e95caSDavid Howells hdspm_sync_sync = 2 116674e95caSDavid Howells }; 117674e95caSDavid Howells 118674e95caSDavid Howells enum hdspm_madi_input { 119674e95caSDavid Howells hdspm_input_optical = 0, 120674e95caSDavid Howells hdspm_input_coax = 1 121674e95caSDavid Howells }; 122674e95caSDavid Howells 123674e95caSDavid Howells enum hdspm_madi_channel_format { 124674e95caSDavid Howells hdspm_format_ch_64 = 0, 125674e95caSDavid Howells hdspm_format_ch_56 = 1 126674e95caSDavid Howells }; 127674e95caSDavid Howells 128674e95caSDavid Howells enum hdspm_madi_frame_format { 129674e95caSDavid Howells hdspm_frame_48 = 0, 130674e95caSDavid Howells hdspm_frame_96 = 1 131674e95caSDavid Howells }; 132674e95caSDavid Howells 133674e95caSDavid Howells enum hdspm_syncsource { 134674e95caSDavid Howells syncsource_wc = 0, 135674e95caSDavid Howells syncsource_madi = 1, 136674e95caSDavid Howells syncsource_tco = 2, 137674e95caSDavid Howells syncsource_sync = 3, 138674e95caSDavid Howells syncsource_none = 4 139674e95caSDavid Howells }; 140674e95caSDavid Howells 141674e95caSDavid Howells struct hdspm_status { 142ffc287c8SMikko Rapeli __u8 card_type; /* enum hdspm_io_type */ 143674e95caSDavid Howells enum hdspm_syncsource autosync_source; 144674e95caSDavid Howells 145ffc287c8SMikko Rapeli __u64 card_clock; 146ffc287c8SMikko Rapeli __u32 master_period; 147674e95caSDavid Howells 148674e95caSDavid Howells union { 149674e95caSDavid Howells struct { 150ffc287c8SMikko Rapeli __u8 sync_wc; /* enum hdspm_sync */ 151ffc287c8SMikko Rapeli __u8 sync_madi; /* enum hdspm_sync */ 152ffc287c8SMikko Rapeli __u8 sync_tco; /* enum hdspm_sync */ 153ffc287c8SMikko Rapeli __u8 sync_in; /* enum hdspm_sync */ 154ffc287c8SMikko Rapeli __u8 madi_input; /* enum hdspm_madi_input */ 155ffc287c8SMikko Rapeli __u8 channel_format; /* enum hdspm_madi_channel_format */ 156ffc287c8SMikko Rapeli __u8 frame_format; /* enum hdspm_madi_frame_format */ 157674e95caSDavid Howells } madi; 158674e95caSDavid Howells } card_specific; 159674e95caSDavid Howells }; 160674e95caSDavid Howells 161674e95caSDavid Howells #define SNDRV_HDSPM_IOCTL_GET_STATUS \ 162674e95caSDavid Howells _IOR('H', 0x47, struct hdspm_status) 163674e95caSDavid Howells 164ddcecf6bSTakashi Iwai /* 165674e95caSDavid Howells * Get information about the card and its add-ons. 166ddcecf6bSTakashi Iwai */ 167674e95caSDavid Howells 168674e95caSDavid Howells #define HDSPM_ADDON_TCO 1 169674e95caSDavid Howells 170674e95caSDavid Howells struct hdspm_version { 171ffc287c8SMikko Rapeli __u8 card_type; /* enum hdspm_io_type */ 172674e95caSDavid Howells char cardname[20]; 173674e95caSDavid Howells unsigned int serial; 174674e95caSDavid Howells unsigned short firmware_rev; 175674e95caSDavid Howells int addons; 176674e95caSDavid Howells }; 177674e95caSDavid Howells 178674e95caSDavid Howells #define SNDRV_HDSPM_IOCTL_GET_VERSION _IOR('H', 0x48, struct hdspm_version) 179674e95caSDavid Howells 180674e95caSDavid Howells /* ------------- get Matrix Mixer IOCTL --------------- */ 181674e95caSDavid Howells 182674e95caSDavid Howells /* MADI mixer: 64inputs+64playback in 64outputs = 8192 => *4Byte = 183674e95caSDavid Howells * 32768 Bytes 184674e95caSDavid Howells */ 185674e95caSDavid Howells 186674e95caSDavid Howells /* organisation is 64 channelfader in a continuous memory block */ 187674e95caSDavid Howells /* equivalent to hardware definition, maybe for future feature of mmap of 188674e95caSDavid Howells * them 189674e95caSDavid Howells */ 190674e95caSDavid Howells /* each of 64 outputs has 64 infader and 64 outfader: 191674e95caSDavid Howells Ins to Outs mixer[out].in[in], Outstreams to Outs mixer[out].pb[pb] */ 192674e95caSDavid Howells 193674e95caSDavid Howells #define HDSPM_MIXER_CHANNELS HDSPM_MAX_CHANNELS 194674e95caSDavid Howells 195674e95caSDavid Howells struct hdspm_channelfader { 196674e95caSDavid Howells unsigned int in[HDSPM_MIXER_CHANNELS]; 197674e95caSDavid Howells unsigned int pb[HDSPM_MIXER_CHANNELS]; 198674e95caSDavid Howells }; 199674e95caSDavid Howells 200674e95caSDavid Howells struct hdspm_mixer { 201674e95caSDavid Howells struct hdspm_channelfader ch[HDSPM_MIXER_CHANNELS]; 202674e95caSDavid Howells }; 203674e95caSDavid Howells 204674e95caSDavid Howells struct hdspm_mixer_ioctl { 205674e95caSDavid Howells struct hdspm_mixer *mixer; 206674e95caSDavid Howells }; 207674e95caSDavid Howells 208674e95caSDavid Howells /* use indirect access due to the limit of ioctl bit size */ 209674e95caSDavid Howells #define SNDRV_HDSPM_IOCTL_GET_MIXER _IOR('H', 0x44, struct hdspm_mixer_ioctl) 210674e95caSDavid Howells 211674e95caSDavid Howells #endif 212