1 /* SPDX-License-Identifier: GPL-2.0-or-later WITH Linux-syscall-note */
2 /*
3  * Driver for Broadcom MPI3 Storage Controllers
4  *
5  * Copyright (C) 2017-2022 Broadcom Inc.
6  *  (mailto: mpi3mr-linuxdrv.pdl@broadcom.com)
7  *
8  */
9 
10 #ifndef SCSI_BSG_MPI3MR_H_INCLUDED
11 #define SCSI_BSG_MPI3MR_H_INCLUDED
12 
13 #include <linux/types.h>
14 
15 /* Definitions for BSG commands */
16 #define MPI3MR_IOCTL_VERSION			0x06
17 
18 #define MPI3MR_APP_DEFAULT_TIMEOUT		(60) /*seconds*/
19 
20 #define MPI3MR_BSG_ADPTYPE_UNKNOWN		0
21 #define MPI3MR_BSG_ADPTYPE_AVGFAMILY		1
22 
23 #define MPI3MR_BSG_ADPSTATE_UNKNOWN		0
24 #define MPI3MR_BSG_ADPSTATE_OPERATIONAL		1
25 #define MPI3MR_BSG_ADPSTATE_FAULT		2
26 #define MPI3MR_BSG_ADPSTATE_IN_RESET		3
27 #define MPI3MR_BSG_ADPSTATE_UNRECOVERABLE	4
28 
29 #define MPI3MR_BSG_ADPRESET_UNKNOWN		0
30 #define MPI3MR_BSG_ADPRESET_SOFT		1
31 #define MPI3MR_BSG_ADPRESET_DIAG_FAULT		2
32 
33 #define MPI3MR_BSG_LOGDATA_MAX_ENTRIES		400
34 #define MPI3MR_BSG_LOGDATA_ENTRY_HEADER_SZ	4
35 
36 #define MPI3MR_DRVBSG_OPCODE_UNKNOWN		0
37 #define MPI3MR_DRVBSG_OPCODE_ADPINFO		1
38 #define MPI3MR_DRVBSG_OPCODE_ADPRESET		2
39 #define MPI3MR_DRVBSG_OPCODE_ALLTGTDEVINFO	4
40 #define MPI3MR_DRVBSG_OPCODE_GETCHGCNT		5
41 #define MPI3MR_DRVBSG_OPCODE_LOGDATAENABLE	6
42 #define MPI3MR_DRVBSG_OPCODE_PELENABLE		7
43 #define MPI3MR_DRVBSG_OPCODE_GETLOGDATA		8
44 #define MPI3MR_DRVBSG_OPCODE_QUERY_HDB		9
45 #define MPI3MR_DRVBSG_OPCODE_REPOST_HDB		10
46 #define MPI3MR_DRVBSG_OPCODE_UPLOAD_HDB		11
47 #define MPI3MR_DRVBSG_OPCODE_REFRESH_HDB_TRIGGERS	12
48 
49 
50 #define MPI3MR_BSG_BUFTYPE_UNKNOWN		0
51 #define MPI3MR_BSG_BUFTYPE_RAIDMGMT_CMD		1
52 #define MPI3MR_BSG_BUFTYPE_RAIDMGMT_RESP	2
53 #define MPI3MR_BSG_BUFTYPE_DATA_IN		3
54 #define MPI3MR_BSG_BUFTYPE_DATA_OUT		4
55 #define MPI3MR_BSG_BUFTYPE_MPI_REPLY		5
56 #define MPI3MR_BSG_BUFTYPE_ERR_RESPONSE		6
57 #define MPI3MR_BSG_BUFTYPE_MPI_REQUEST		0xFE
58 
59 #define MPI3MR_BSG_MPI_REPLY_BUFTYPE_UNKNOWN	0
60 #define MPI3MR_BSG_MPI_REPLY_BUFTYPE_STATUS	1
61 #define MPI3MR_BSG_MPI_REPLY_BUFTYPE_ADDRESS	2
62 
63 #define MPI3MR_HDB_BUFTYPE_UNKNOWN		0
64 #define MPI3MR_HDB_BUFTYPE_TRACE		1
65 #define MPI3MR_HDB_BUFTYPE_FIRMWARE		2
66 #define MPI3MR_HDB_BUFTYPE_RESERVED		3
67 
68 #define MPI3MR_HDB_BUFSTATUS_UNKNOWN		0
69 #define MPI3MR_HDB_BUFSTATUS_NOT_ALLOCATED	1
70 #define MPI3MR_HDB_BUFSTATUS_POSTED_UNPAUSED	2
71 #define MPI3MR_HDB_BUFSTATUS_POSTED_PAUSED	3
72 #define MPI3MR_HDB_BUFSTATUS_RELEASED		4
73 
74 #define MPI3MR_HDB_TRIGGER_TYPE_UNKNOWN		0
75 #define MPI3MR_HDB_TRIGGER_TYPE_DIAGFAULT	1
76 #define MPI3MR_HDB_TRIGGER_TYPE_ELEMENT		2
77 #define MPI3MR_HDB_TRIGGER_TYPE_MASTER		3
78 
79 
80 /* Supported BSG commands */
81 enum command {
82 	MPI3MR_DRV_CMD = 1,
83 	MPI3MR_MPT_CMD = 2,
84 };
85 
86 /**
87  * struct mpi3_driver_info_layout - Information about driver
88  *
89  * @information_length: Length of this structure in bytes
90  * @driver_signature: Driver Vendor name
91  * @os_name: Operating System Name
92  * @driver_name: Driver name
93  * @driver_version: Driver version
94  * @driver_release_date: Driver release date
95  * @driver_capabilities: Driver capabilities
96  */
97 struct mpi3_driver_info_layout {
98 	__le32	information_length;
99 	__u8	driver_signature[12];
100 	__u8	os_name[16];
101 	__u8	os_version[12];
102 	__u8	driver_name[20];
103 	__u8	driver_version[32];
104 	__u8	driver_release_date[20];
105 	__le32	driver_capabilities;
106 };
107 
108 /**
109  * struct mpi3mr_bsg_in_adpinfo - Adapter information request
110  * data returned by the driver.
111  *
112  * @adp_type: Adapter type
113  * @rsvd1: Reserved
114  * @pci_dev_id: PCI device ID of the adapter
115  * @pci_dev_hw_rev: PCI revision of the adapter
116  * @pci_subsys_dev_id: PCI subsystem device ID of the adapter
117  * @pci_subsys_ven_id: PCI subsystem vendor ID of the adapter
118  * @pci_dev: PCI device
119  * @pci_func: PCI function
120  * @pci_bus: PCI bus
121  * @rsvd2: Reserved
122  * @pci_seg_id: PCI segment ID
123  * @app_intfc_ver: version of the application interface definition
124  * @rsvd3: Reserved
125  * @rsvd4: Reserved
126  * @rsvd5: Reserved
127  * @driver_info: Driver Information (Version/Name)
128  */
129 struct mpi3mr_bsg_in_adpinfo {
130 	__u32	adp_type;
131 	__u32	rsvd1;
132 	__u32	pci_dev_id;
133 	__u32	pci_dev_hw_rev;
134 	__u32	pci_subsys_dev_id;
135 	__u32	pci_subsys_ven_id;
136 	__u32	pci_dev:5;
137 	__u32	pci_func:3;
138 	__u32	pci_bus:8;
139 	__u16	rsvd2;
140 	__u32	pci_seg_id;
141 	__u32	app_intfc_ver;
142 	__u8	adp_state;
143 	__u8	rsvd3;
144 	__u16	rsvd4;
145 	__u32	rsvd5[2];
146 	struct mpi3_driver_info_layout driver_info;
147 };
148 
149 /**
150  * struct mpi3mr_bsg_adp_reset - Adapter reset request
151  * payload data to the driver.
152  *
153  * @reset_type: Reset type
154  * @rsvd1: Reserved
155  * @rsvd2: Reserved
156  */
157 struct mpi3mr_bsg_adp_reset {
158 	__u8	reset_type;
159 	__u8	rsvd1;
160 	__u16	rsvd2;
161 };
162 
163 /**
164  * struct mpi3mr_change_count - Topology change count
165  * returned by the driver.
166  *
167  * @change_count: Topology change count
168  * @rsvd: Reserved
169  */
170 struct mpi3mr_change_count {
171 	__u16	change_count;
172 	__u16	rsvd;
173 };
174 
175 /**
176  * struct mpi3mr_device_map_info - Target device mapping
177  * information
178  *
179  * @handle: Firmware device handle
180  * @perst_id: Persistent ID assigned by the firmware
181  * @target_id: Target ID assigned by the driver
182  * @bus_id: Bus ID assigned by the driver
183  * @rsvd1: Reserved
184  * @rsvd2: Reserved
185  */
186 struct mpi3mr_device_map_info {
187 	__u16	handle;
188 	__u16	perst_id;
189 	__u32	target_id;
190 	__u8	bus_id;
191 	__u8	rsvd1;
192 	__u16	rsvd2;
193 };
194 
195 /**
196  * struct mpi3mr_all_tgt_info - Target device mapping
197  * information returned by the driver
198  *
199  * @num_devices: The number of devices in driver's inventory
200  * @rsvd1: Reserved
201  * @rsvd2: Reserved
202  * @dmi: Variable length array of mapping information of targets
203  */
204 struct mpi3mr_all_tgt_info {
205 	__u16	num_devices;
206 	__u16	rsvd1;
207 	__u32	rsvd2;
208 	struct mpi3mr_device_map_info dmi[1];
209 };
210 
211 /**
212  * struct mpi3mr_logdata_enable - Number of log data
213  * entries saved by the driver returned as payload data for
214  * enable logdata BSG request by the driver.
215  *
216  * @max_entries: Number of log data entries cached by the driver
217  * @rsvd: Reserved
218  */
219 struct mpi3mr_logdata_enable {
220 	__u16	max_entries;
221 	__u16	rsvd;
222 };
223 
224 /**
225  * struct mpi3mr_bsg_out_pel_enable - PEL enable request payload
226  * data to the driver.
227  *
228  * @pel_locale: PEL locale to the firmware
229  * @pel_class: PEL class to the firmware
230  * @rsvd: Reserved
231  */
232 struct mpi3mr_bsg_out_pel_enable {
233 	__u16	pel_locale;
234 	__u8	pel_class;
235 	__u8	rsvd;
236 };
237 
238 /**
239  * struct mpi3mr_logdata_entry - Log data entry cached by the
240  * driver.
241  *
242  * @valid_entry: Is the entry valid
243  * @rsvd1: Reserved
244  * @rsvd2: Reserved
245  * @data: Variable length Log entry data
246  */
247 struct mpi3mr_logdata_entry {
248 	__u8	valid_entry;
249 	__u8	rsvd1;
250 	__u16	rsvd2;
251 	__u8	data[1]; /* Variable length Array */
252 };
253 
254 /**
255  * struct mpi3mr_bsg_in_log_data - Log data entries saved by
256  * the driver returned as payload data for Get logdata request
257  * by the driver.
258  *
259  * @entry: Variable length Log data entry array
260  */
261 struct mpi3mr_bsg_in_log_data {
262 	struct mpi3mr_logdata_entry entry[1];
263 };
264 
265 /**
266  * struct mpi3mr_hdb_entry - host diag buffer entry.
267  *
268  * @buf_type: Buffer type
269  * @status: Buffer status
270  * @trigger_type: Trigger type
271  * @rsvd1: Reserved
272  * @size: Buffer size
273  * @rsvd2: Reserved
274  * @trigger_data: Trigger specific data
275  * @rsvd3: Reserved
276  * @rsvd4: Reserved
277  */
278 struct mpi3mr_hdb_entry {
279 	__u8	buf_type;
280 	__u8	status;
281 	__u8	trigger_type;
282 	__u8	rsvd1;
283 	__u16	size;
284 	__u16	rsvd2;
285 	__u64	trigger_data;
286 	__u32	rsvd3;
287 	__u32	rsvd4;
288 };
289 
290 
291 /**
292  * struct mpi3mr_bsg_in_hdb_status - This structure contains
293  * return data for the BSG request to retrieve the number of host
294  * diagnostic buffers supported by the driver and their current
295  * status and additional status specific data if any in forms of
296  * multiple hdb entries.
297  *
298  * @num_hdb_types: Number of host diag buffer types supported
299  * @rsvd1: Reserved
300  * @rsvd2: Reserved
301  * @rsvd3: Reserved
302  * @entry: Variable length Diag buffer status entry array
303  */
304 struct mpi3mr_bsg_in_hdb_status {
305 	__u8	num_hdb_types;
306 	__u8	rsvd1;
307 	__u16	rsvd2;
308 	__u32	rsvd3;
309 	struct mpi3mr_hdb_entry entry[1];
310 };
311 
312 /**
313  * struct mpi3mr_bsg_out_repost_hdb - Repost host diagnostic
314  * buffer request payload data to the driver.
315  *
316  * @buf_type: Buffer type
317  * @rsvd1: Reserved
318  * @rsvd2: Reserved
319  */
320 struct mpi3mr_bsg_out_repost_hdb {
321 	__u8	buf_type;
322 	__u8	rsvd1;
323 	__u16	rsvd2;
324 };
325 
326 /**
327  * struct mpi3mr_bsg_out_upload_hdb - Upload host diagnostic
328  * buffer request payload data to the driver.
329  *
330  * @buf_type: Buffer type
331  * @rsvd1: Reserved
332  * @rsvd2: Reserved
333  * @start_offset: Start offset of the buffer from where to copy
334  * @length: Length of the buffer to copy
335  */
336 struct mpi3mr_bsg_out_upload_hdb {
337 	__u8	buf_type;
338 	__u8	rsvd1;
339 	__u16	rsvd2;
340 	__u32	start_offset;
341 	__u32	length;
342 };
343 
344 /**
345  * struct mpi3mr_bsg_out_refresh_hdb_triggers - Refresh host
346  * diagnostic buffer triggers request payload data to the driver.
347  *
348  * @page_type: Page type
349  * @rsvd1: Reserved
350  * @rsvd2: Reserved
351  */
352 struct mpi3mr_bsg_out_refresh_hdb_triggers {
353 	__u8	page_type;
354 	__u8	rsvd1;
355 	__u16	rsvd2;
356 };
357 /**
358  * struct mpi3mr_bsg_drv_cmd -  Generic bsg data
359  * structure for all driver specific requests.
360  *
361  * @mrioc_id: Controller ID
362  * @opcode: Driver specific opcode
363  * @rsvd1: Reserved
364  * @rsvd2: Reserved
365  */
366 struct mpi3mr_bsg_drv_cmd {
367 	__u8	mrioc_id;
368 	__u8	opcode;
369 	__u16	rsvd1;
370 	__u32	rsvd2[4];
371 };
372 /**
373  * struct mpi3mr_bsg_in_reply_buf - MPI reply buffer returned
374  * for MPI Passthrough request .
375  *
376  * @mpi_reply_type: Type of MPI reply
377  * @rsvd1: Reserved
378  * @rsvd2: Reserved
379  * @reply_buf: Variable Length buffer based on mpirep type
380  */
381 struct mpi3mr_bsg_in_reply_buf {
382 	__u8	mpi_reply_type;
383 	__u8	rsvd1;
384 	__u16	rsvd2;
385 	__u8	reply_buf[1];
386 };
387 
388 /**
389  * struct mpi3mr_buf_entry - User buffer descriptor for MPI
390  * Passthrough requests.
391  *
392  * @buf_type: Buffer type
393  * @rsvd1: Reserved
394  * @rsvd2: Reserved
395  * @buf_len: Buffer length
396  */
397 struct mpi3mr_buf_entry {
398 	__u8	buf_type;
399 	__u8	rsvd1;
400 	__u16	rsvd2;
401 	__u32	buf_len;
402 };
403 /**
404  * struct mpi3mr_bsg_buf_entry_list - list of user buffer
405  * descriptor for MPI Passthrough requests.
406  *
407  * @num_of_entries: Number of buffer descriptors
408  * @rsvd1: Reserved
409  * @rsvd2: Reserved
410  * @rsvd3: Reserved
411  * @buf_entry: Variable length array of buffer descriptors
412  */
413 struct mpi3mr_buf_entry_list {
414 	__u8	num_of_entries;
415 	__u8	rsvd1;
416 	__u16	rsvd2;
417 	__u32	rsvd3;
418 	struct mpi3mr_buf_entry buf_entry[1];
419 };
420 /**
421  * struct mpi3mr_bsg_mptcmd -  Generic bsg data
422  * structure for all MPI Passthrough requests .
423  *
424  * @mrioc_id: Controller ID
425  * @rsvd1: Reserved
426  * @timeout: MPI request timeout
427  * @buf_entry_list: Buffer descriptor list
428  */
429 struct mpi3mr_bsg_mptcmd {
430 	__u8	mrioc_id;
431 	__u8	rsvd1;
432 	__u16	timeout;
433 	__u32	rsvd2;
434 	struct mpi3mr_buf_entry_list buf_entry_list;
435 };
436 
437 /**
438  * struct mpi3mr_bsg_packet -  Generic bsg data
439  * structure for all supported requests .
440  *
441  * @cmd_type: represents drvrcmd or mptcmd
442  * @rsvd1: Reserved
443  * @rsvd2: Reserved
444  * @drvrcmd: driver request structure
445  * @mptcmd: mpt request structure
446  */
447 struct mpi3mr_bsg_packet {
448 	__u8	cmd_type;
449 	__u8	rsvd1;
450 	__u16	rsvd2;
451 	__u32	rsvd3;
452 	union {
453 		struct mpi3mr_bsg_drv_cmd drvrcmd;
454 		struct mpi3mr_bsg_mptcmd mptcmd;
455 	} cmd;
456 };
457 
458 
459 /* MPI3: NVMe Encasulation related definitions */
460 #ifndef MPI3_NVME_ENCAP_CMD_MAX
461 #define MPI3_NVME_ENCAP_CMD_MAX               (1)
462 #endif
463 
464 struct mpi3_nvme_encapsulated_request {
465 	__le16	host_tag;
466 	__u8	ioc_use_only02;
467 	__u8	function;
468 	__le16	ioc_use_only04;
469 	__u8	ioc_use_only06;
470 	__u8	msg_flags;
471 	__le16	change_count;
472 	__le16	dev_handle;
473 	__le16	encapsulated_command_length;
474 	__le16	flags;
475 	__le32	data_length;
476 	__le32  reserved14[3];
477 	__le32	command[MPI3_NVME_ENCAP_CMD_MAX];
478 };
479 
480 struct mpi3_nvme_encapsulated_error_reply {
481 	__le16	host_tag;
482 	__u8	ioc_use_only02;
483 	__u8	function;
484 	__le16	ioc_use_only04;
485 	__u8	ioc_use_only06;
486 	__u8	msg_flags;
487 	__le16	ioc_use_only08;
488 	__le16	ioc_status;
489 	__le32	ioc_log_info;
490 	__le32	nvme_completion_entry[4];
491 };
492 
493 #define	MPI3MR_NVME_PRP_SIZE		8 /* PRP size */
494 #define	MPI3MR_NVME_CMD_PRP1_OFFSET	24 /* PRP1 offset in NVMe cmd */
495 #define	MPI3MR_NVME_CMD_PRP2_OFFSET	32 /* PRP2 offset in NVMe cmd */
496 #define	MPI3MR_NVME_CMD_SGL_OFFSET	24 /* SGL offset in NVMe cmd */
497 #define MPI3MR_NVME_DATA_FORMAT_PRP	0
498 #define MPI3MR_NVME_DATA_FORMAT_SGL1	1
499 #define MPI3MR_NVME_DATA_FORMAT_SGL2	2
500 
501 /* MPI3: task management related definitions */
502 struct mpi3_scsi_task_mgmt_request {
503 	__le16	host_tag;
504 	__u8	ioc_use_only02;
505 	__u8	function;
506 	__le16	ioc_use_only04;
507 	__u8	ioc_use_only06;
508 	__u8    msg_flags;
509 	__le16	change_count;
510 	__le16	dev_handle;
511 	__le16	task_host_tag;
512 	__u8	task_type;
513 	__u8	reserved0f;
514 	__le16	task_request_queue_id;
515 	__le16	reserved12;
516 	__le32	reserved14;
517 	__u8	lun[8];
518 };
519 
520 #define MPI3_SCSITASKMGMT_MSGFLAGS_DO_NOT_SEND_TASK_IU      (0x08)
521 #define MPI3_SCSITASKMGMT_TASKTYPE_ABORT_TASK               (0x01)
522 #define MPI3_SCSITASKMGMT_TASKTYPE_ABORT_TASK_SET           (0x02)
523 #define MPI3_SCSITASKMGMT_TASKTYPE_TARGET_RESET             (0x03)
524 #define MPI3_SCSITASKMGMT_TASKTYPE_LOGICAL_UNIT_RESET       (0x05)
525 #define MPI3_SCSITASKMGMT_TASKTYPE_CLEAR_TASK_SET           (0x06)
526 #define MPI3_SCSITASKMGMT_TASKTYPE_QUERY_TASK               (0x07)
527 #define MPI3_SCSITASKMGMT_TASKTYPE_CLEAR_ACA                (0x08)
528 #define MPI3_SCSITASKMGMT_TASKTYPE_QUERY_TASK_SET           (0x09)
529 #define MPI3_SCSITASKMGMT_TASKTYPE_QUERY_ASYNC_EVENT        (0x0a)
530 #define MPI3_SCSITASKMGMT_TASKTYPE_I_T_NEXUS_RESET          (0x0b)
531 struct mpi3_scsi_task_mgmt_reply {
532 	__le16	host_tag;
533 	__u8	ioc_use_only02;
534 	__u8	function;
535 	__le16  ioc_use_only04;
536 	__u8	ioc_use_only06;
537 	__u8	msg_flags;
538 	__le16	ioc_use_only08;
539 	__le16	ioc_status;
540 	__le32	ioc_log_info;
541 	__le32	termination_count;
542 	__le32	response_data;
543 	__le32	reserved18;
544 };
545 
546 #define MPI3_SCSITASKMGMT_RSPCODE_TM_COMPLETE                (0x00)
547 #define MPI3_SCSITASKMGMT_RSPCODE_INVALID_FRAME              (0x02)
548 #define MPI3_SCSITASKMGMT_RSPCODE_TM_FUNCTION_NOT_SUPPORTED  (0x04)
549 #define MPI3_SCSITASKMGMT_RSPCODE_TM_FAILED                  (0x05)
550 #define MPI3_SCSITASKMGMT_RSPCODE_TM_SUCCEEDED               (0x08)
551 #define MPI3_SCSITASKMGMT_RSPCODE_TM_INVALID_LUN             (0x09)
552 #define MPI3_SCSITASKMGMT_RSPCODE_TM_OVERLAPPED_TAG          (0x0a)
553 #define MPI3_SCSITASKMGMT_RSPCODE_IO_QUEUED_ON_IOC           (0x80)
554 #define MPI3_SCSITASKMGMT_RSPCODE_TM_NVME_DENIED             (0x81)
555 
556 /* MPI3: PEL related definitions */
557 #define MPI3_PEL_LOCALE_FLAGS_NON_BLOCKING_BOOT_EVENT   (0x0200)
558 #define MPI3_PEL_LOCALE_FLAGS_BLOCKING_BOOT_EVENT       (0x0100)
559 #define MPI3_PEL_LOCALE_FLAGS_PCIE                      (0x0080)
560 #define MPI3_PEL_LOCALE_FLAGS_CONFIGURATION             (0x0040)
561 #define MPI3_PEL_LOCALE_FLAGS_CONTROLER                 (0x0020)
562 #define MPI3_PEL_LOCALE_FLAGS_SAS                       (0x0010)
563 #define MPI3_PEL_LOCALE_FLAGS_EPACK                     (0x0008)
564 #define MPI3_PEL_LOCALE_FLAGS_ENCLOSURE                 (0x0004)
565 #define MPI3_PEL_LOCALE_FLAGS_PD                        (0x0002)
566 #define MPI3_PEL_LOCALE_FLAGS_VD                        (0x0001)
567 #define MPI3_PEL_CLASS_DEBUG                            (0x00)
568 #define MPI3_PEL_CLASS_PROGRESS                         (0x01)
569 #define MPI3_PEL_CLASS_INFORMATIONAL                    (0x02)
570 #define MPI3_PEL_CLASS_WARNING                          (0x03)
571 #define MPI3_PEL_CLASS_CRITICAL                         (0x04)
572 #define MPI3_PEL_CLASS_FATAL                            (0x05)
573 #define MPI3_PEL_CLASS_FAULT                            (0x06)
574 
575 /* MPI3: Function definitions */
576 #define MPI3_BSG_FUNCTION_MGMT_PASSTHROUGH              (0x0a)
577 #define MPI3_BSG_FUNCTION_SCSI_IO                       (0x20)
578 #define MPI3_BSG_FUNCTION_SCSI_TASK_MGMT                (0x21)
579 #define MPI3_BSG_FUNCTION_SMP_PASSTHROUGH               (0x22)
580 #define MPI3_BSG_FUNCTION_NVME_ENCAPSULATED             (0x24)
581 
582 #endif
583