xref: /openbmc/linux/include/uapi/rdma/mlx4-abi.h (revision e15a5365)
1 /* SPDX-License-Identifier: ((GPL-2.0 WITH Linux-syscall-note) OR Linux-OpenIB) */
2 /*
3  * Copyright (c) 2007 Cisco Systems, Inc. All rights reserved.
4  * Copyright (c) 2007, 2008 Mellanox Technologies. All rights reserved.
5  *
6  * This software is available to you under a choice of one of two
7  * licenses.  You may choose to be licensed under the terms of the GNU
8  * General Public License (GPL) Version 2, available from the file
9  * COPYING in the main directory of this source tree, or the
10  * OpenIB.org BSD license below:
11  *
12  *     Redistribution and use in source and binary forms, with or
13  *     without modification, are permitted provided that the following
14  *     conditions are met:
15  *
16  *      - Redistributions of source code must retain the above
17  *        copyright notice, this list of conditions and the following
18  *        disclaimer.
19  *
20  *      - Redistributions in binary form must reproduce the above
21  *        copyright notice, this list of conditions and the following
22  *        disclaimer in the documentation and/or other materials
23  *        provided with the distribution.
24  *
25  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
26  * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
27  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
28  * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
29  * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
30  * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
31  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
32  * SOFTWARE.
33  */
34 
35 #ifndef MLX4_ABI_USER_H
36 #define MLX4_ABI_USER_H
37 
38 #include <linux/types.h>
39 
40 /*
41  * Increment this value if any changes that break userspace ABI
42  * compatibility are made.
43  */
44 
45 #define MLX4_IB_UVERBS_NO_DEV_CAPS_ABI_VERSION	3
46 #define MLX4_IB_UVERBS_ABI_VERSION		4
47 
48 /*
49  * Make sure that all structs defined in this file remain laid out so
50  * that they pack the same way on 32-bit and 64-bit architectures (to
51  * avoid incompatibility between 32-bit userspace and 64-bit kernels).
52  * In particular do not use pointer types -- pass pointers in __u64
53  * instead.
54  */
55 
56 struct mlx4_ib_alloc_ucontext_resp_v3 {
57 	__u32	qp_tab_size;
58 	__u16	bf_reg_size;
59 	__u16	bf_regs_per_page;
60 };
61 
62 enum {
63 	MLX4_USER_DEV_CAP_LARGE_CQE	= 1L << 0,
64 };
65 
66 struct mlx4_ib_alloc_ucontext_resp {
67 	__u32	dev_caps;
68 	__u32	qp_tab_size;
69 	__u16	bf_reg_size;
70 	__u16	bf_regs_per_page;
71 	__u32	cqe_size;
72 };
73 
74 struct mlx4_ib_alloc_pd_resp {
75 	__u32	pdn;
76 	__u32	reserved;
77 };
78 
79 struct mlx4_ib_create_cq {
80 	__aligned_u64 buf_addr;
81 	__aligned_u64 db_addr;
82 };
83 
84 struct mlx4_ib_create_cq_resp {
85 	__u32	cqn;
86 	__u32	reserved;
87 };
88 
89 struct mlx4_ib_resize_cq {
90 	__aligned_u64 buf_addr;
91 };
92 
93 struct mlx4_ib_create_srq {
94 	__aligned_u64 buf_addr;
95 	__aligned_u64 db_addr;
96 };
97 
98 struct mlx4_ib_create_srq_resp {
99 	__u32	srqn;
100 	__u32	reserved;
101 };
102 
103 struct mlx4_ib_create_qp_rss {
104 	__aligned_u64 rx_hash_fields_mask; /* Use  enum mlx4_ib_rx_hash_fields */
105 	__u8    rx_hash_function; /* Use enum mlx4_ib_rx_hash_function_flags */
106 	__u8    reserved[7];
107 	__u8    rx_hash_key[40];
108 	__u32   comp_mask;
109 	__u32   reserved1;
110 };
111 
112 struct mlx4_ib_create_qp {
113 	__aligned_u64 buf_addr;
114 	__aligned_u64 db_addr;
115 	__u8	log_sq_bb_count;
116 	__u8	log_sq_stride;
117 	__u8	sq_no_prefetch;
118 	__u8	reserved;
119 	__u32	inl_recv_sz;
120 };
121 
122 struct mlx4_ib_create_wq {
123 	__aligned_u64 buf_addr;
124 	__aligned_u64 db_addr;
125 	__u8	log_range_size;
126 	__u8	reserved[3];
127 	__u32   comp_mask;
128 };
129 
130 struct mlx4_ib_modify_wq {
131 	__u32	comp_mask;
132 	__u32	reserved;
133 };
134 
135 struct mlx4_ib_create_rwq_ind_tbl_resp {
136 	__u32	response_length;
137 	__u32	reserved;
138 };
139 
140 /* RX Hash function flags */
141 enum mlx4_ib_rx_hash_function_flags {
142 	MLX4_IB_RX_HASH_FUNC_TOEPLITZ	= 1 << 0,
143 };
144 
145 /*
146  * RX Hash flags, these flags allows to set which incoming packet's field should
147  * participates in RX Hash. Each flag represent certain packet's field,
148  * when the flag is set the field that is represented by the flag will
149  * participate in RX Hash calculation.
150  */
151 enum mlx4_ib_rx_hash_fields {
152 	MLX4_IB_RX_HASH_SRC_IPV4	= 1 << 0,
153 	MLX4_IB_RX_HASH_DST_IPV4	= 1 << 1,
154 	MLX4_IB_RX_HASH_SRC_IPV6	= 1 << 2,
155 	MLX4_IB_RX_HASH_DST_IPV6	= 1 << 3,
156 	MLX4_IB_RX_HASH_SRC_PORT_TCP	= 1 << 4,
157 	MLX4_IB_RX_HASH_DST_PORT_TCP	= 1 << 5,
158 	MLX4_IB_RX_HASH_SRC_PORT_UDP	= 1 << 6,
159 	MLX4_IB_RX_HASH_DST_PORT_UDP	= 1 << 7,
160 	MLX4_IB_RX_HASH_INNER		= 1ULL << 31,
161 };
162 
163 struct mlx4_ib_rss_caps {
164 	__aligned_u64 rx_hash_fields_mask; /* enum mlx4_ib_rx_hash_fields */
165 	__u8 rx_hash_function; /* enum mlx4_ib_rx_hash_function_flags */
166 	__u8 reserved[7];
167 };
168 
169 enum query_device_resp_mask {
170 	MLX4_IB_QUERY_DEV_RESP_MASK_CORE_CLOCK_OFFSET = 1UL << 0,
171 };
172 
173 struct mlx4_ib_tso_caps {
174 	__u32 max_tso; /* Maximum tso payload size in bytes */
175 	/* Corresponding bit will be set if qp type from
176 	 * 'enum ib_qp_type' is supported.
177 	 */
178 	__u32 supported_qpts;
179 };
180 
181 struct mlx4_uverbs_ex_query_device_resp {
182 	__u32			comp_mask;
183 	__u32			response_length;
184 	__aligned_u64		hca_core_clock_offset;
185 	__u32			max_inl_recv_sz;
186 	__u32			reserved;
187 	struct mlx4_ib_rss_caps	rss_caps;
188 	struct mlx4_ib_tso_caps tso_caps;
189 };
190 
191 #endif /* MLX4_ABI_USER_H */
192