1 /* 2 * Copyright © 2014-2018 Broadcom 3 * 4 * Permission is hereby granted, free of charge, to any person obtaining a 5 * copy of this software and associated documentation files (the "Software"), 6 * to deal in the Software without restriction, including without limitation 7 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 8 * and/or sell copies of the Software, and to permit persons to whom the 9 * Software is furnished to do so, subject to the following conditions: 10 * 11 * The above copyright notice and this permission notice (including the next 12 * paragraph) shall be included in all copies or substantial portions of the 13 * Software. 14 * 15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING 20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS 21 * IN THE SOFTWARE. 22 */ 23 24 #ifndef _V3D_DRM_H_ 25 #define _V3D_DRM_H_ 26 27 #include "drm.h" 28 29 #if defined(__cplusplus) 30 extern "C" { 31 #endif 32 33 #define DRM_V3D_SUBMIT_CL 0x00 34 #define DRM_V3D_WAIT_BO 0x01 35 #define DRM_V3D_CREATE_BO 0x02 36 #define DRM_V3D_MMAP_BO 0x03 37 #define DRM_V3D_GET_PARAM 0x04 38 #define DRM_V3D_GET_BO_OFFSET 0x05 39 40 #define DRM_IOCTL_V3D_SUBMIT_CL DRM_IOWR(DRM_COMMAND_BASE + DRM_V3D_SUBMIT_CL, struct drm_v3d_submit_cl) 41 #define DRM_IOCTL_V3D_WAIT_BO DRM_IOWR(DRM_COMMAND_BASE + DRM_V3D_WAIT_BO, struct drm_v3d_wait_bo) 42 #define DRM_IOCTL_V3D_CREATE_BO DRM_IOWR(DRM_COMMAND_BASE + DRM_V3D_CREATE_BO, struct drm_v3d_create_bo) 43 #define DRM_IOCTL_V3D_MMAP_BO DRM_IOWR(DRM_COMMAND_BASE + DRM_V3D_MMAP_BO, struct drm_v3d_mmap_bo) 44 #define DRM_IOCTL_V3D_GET_PARAM DRM_IOWR(DRM_COMMAND_BASE + DRM_V3D_GET_PARAM, struct drm_v3d_get_param) 45 #define DRM_IOCTL_V3D_GET_BO_OFFSET DRM_IOWR(DRM_COMMAND_BASE + DRM_V3D_GET_BO_OFFSET, struct drm_v3d_get_bo_offset) 46 47 /** 48 * struct drm_v3d_submit_cl - ioctl argument for submitting commands to the 3D 49 * engine. 50 * 51 * This asks the kernel to have the GPU execute an optional binner 52 * command list, and a render command list. 53 */ 54 struct drm_v3d_submit_cl { 55 /* Pointer to the binner command list. 56 * 57 * This is the first set of commands executed, which runs the 58 * coordinate shader to determine where primitives land on the screen, 59 * then writes out the state updates and draw calls necessary per tile 60 * to the tile allocation BO. 61 * 62 * This BCL will block on any previous BCL submitted on the 63 * same FD, but not on any RCL or BCLs submitted by other 64 * clients -- that is left up to the submitter to control 65 * using in_sync_bcl if necessary. 66 */ 67 __u32 bcl_start; 68 69 /** End address of the BCL (first byte after the BCL) */ 70 __u32 bcl_end; 71 72 /* Offset of the render command list. 73 * 74 * This is the second set of commands executed, which will either 75 * execute the tiles that have been set up by the BCL, or a fixed set 76 * of tiles (in the case of RCL-only blits). 77 * 78 * This RCL will block on this submit's BCL, and any previous 79 * RCL submitted on the same FD, but not on any RCL or BCLs 80 * submitted by other clients -- that is left up to the 81 * submitter to control using in_sync_rcl if necessary. 82 */ 83 __u32 rcl_start; 84 85 /** End address of the RCL (first byte after the RCL) */ 86 __u32 rcl_end; 87 88 /** An optional sync object to wait on before starting the BCL. */ 89 __u32 in_sync_bcl; 90 /** An optional sync object to wait on before starting the RCL. */ 91 __u32 in_sync_rcl; 92 /** An optional sync object to place the completion fence in. */ 93 __u32 out_sync; 94 95 /* Offset of the tile alloc memory 96 * 97 * This is optional on V3D 3.3 (where the CL can set the value) but 98 * required on V3D 4.1. 99 */ 100 __u32 qma; 101 102 /** Size of the tile alloc memory. */ 103 __u32 qms; 104 105 /** Offset of the tile state data array. */ 106 __u32 qts; 107 108 /* Pointer to a u32 array of the BOs that are referenced by the job. 109 */ 110 __u64 bo_handles; 111 112 /* Number of BO handles passed in (size is that times 4). */ 113 __u32 bo_handle_count; 114 115 /* Pad, must be zero-filled. */ 116 __u32 pad; 117 }; 118 119 /** 120 * struct drm_v3d_wait_bo - ioctl argument for waiting for 121 * completion of the last DRM_V3D_SUBMIT_CL on a BO. 122 * 123 * This is useful for cases where multiple processes might be 124 * rendering to a BO and you want to wait for all rendering to be 125 * completed. 126 */ 127 struct drm_v3d_wait_bo { 128 __u32 handle; 129 __u32 pad; 130 __u64 timeout_ns; 131 }; 132 133 /** 134 * struct drm_v3d_create_bo - ioctl argument for creating V3D BOs. 135 * 136 * There are currently no values for the flags argument, but it may be 137 * used in a future extension. 138 */ 139 struct drm_v3d_create_bo { 140 __u32 size; 141 __u32 flags; 142 /** Returned GEM handle for the BO. */ 143 __u32 handle; 144 /** 145 * Returned offset for the BO in the V3D address space. This offset 146 * is private to the DRM fd and is valid for the lifetime of the GEM 147 * handle. 148 * 149 * This offset value will always be nonzero, since various HW 150 * units treat 0 specially. 151 */ 152 __u32 offset; 153 }; 154 155 /** 156 * struct drm_v3d_mmap_bo - ioctl argument for mapping V3D BOs. 157 * 158 * This doesn't actually perform an mmap. Instead, it returns the 159 * offset you need to use in an mmap on the DRM device node. This 160 * means that tools like valgrind end up knowing about the mapped 161 * memory. 162 * 163 * There are currently no values for the flags argument, but it may be 164 * used in a future extension. 165 */ 166 struct drm_v3d_mmap_bo { 167 /** Handle for the object being mapped. */ 168 __u32 handle; 169 __u32 flags; 170 /** offset into the drm node to use for subsequent mmap call. */ 171 __u64 offset; 172 }; 173 174 enum drm_v3d_param { 175 DRM_V3D_PARAM_V3D_UIFCFG, 176 DRM_V3D_PARAM_V3D_HUB_IDENT1, 177 DRM_V3D_PARAM_V3D_HUB_IDENT2, 178 DRM_V3D_PARAM_V3D_HUB_IDENT3, 179 DRM_V3D_PARAM_V3D_CORE0_IDENT0, 180 DRM_V3D_PARAM_V3D_CORE0_IDENT1, 181 DRM_V3D_PARAM_V3D_CORE0_IDENT2, 182 }; 183 184 struct drm_v3d_get_param { 185 __u32 param; 186 __u32 pad; 187 __u64 value; 188 }; 189 190 /** 191 * Returns the offset for the BO in the V3D address space for this DRM fd. 192 * This is the same value returned by drm_v3d_create_bo, if that was called 193 * from this DRM fd. 194 */ 195 struct drm_v3d_get_bo_offset { 196 __u32 handle; 197 __u32 offset; 198 }; 199 200 #if defined(__cplusplus) 201 } 202 #endif 203 204 #endif /* _V3D_DRM_H_ */ 205