xref: /openbmc/linux/include/uapi/drm/tegra_drm.h (revision b34e08d5)
1 /*
2  * Copyright (c) 2012-2013, NVIDIA CORPORATION.  All rights reserved.
3  *
4  * Permission is hereby granted, free of charge, to any person obtaining a
5  * copy of this software and associated documentation files (the "Software"),
6  * to deal in the Software without restriction, including without limitation
7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8  * and/or sell copies of the Software, and to permit persons to whom the
9  * Software is furnished to do so, subject to the following conditions:
10  *
11  * The above copyright notice and this permission notice shall be included in
12  * all copies or substantial portions of the Software.
13  *
14  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
17  * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20  * OTHER DEALINGS IN THE SOFTWARE.
21  */
22 
23 #ifndef _UAPI_TEGRA_DRM_H_
24 #define _UAPI_TEGRA_DRM_H_
25 
26 #include <drm/drm.h>
27 
28 #define DRM_TEGRA_GEM_CREATE_TILED     (1 << 0)
29 #define DRM_TEGRA_GEM_CREATE_BOTTOM_UP (1 << 1)
30 
31 struct drm_tegra_gem_create {
32 	__u64 size;
33 	__u32 flags;
34 	__u32 handle;
35 };
36 
37 struct drm_tegra_gem_mmap {
38 	__u32 handle;
39 	__u32 offset;
40 };
41 
42 struct drm_tegra_syncpt_read {
43 	__u32 id;
44 	__u32 value;
45 };
46 
47 struct drm_tegra_syncpt_incr {
48 	__u32 id;
49 	__u32 pad;
50 };
51 
52 struct drm_tegra_syncpt_wait {
53 	__u32 id;
54 	__u32 thresh;
55 	__u32 timeout;
56 	__u32 value;
57 };
58 
59 #define DRM_TEGRA_NO_TIMEOUT	(0xffffffff)
60 
61 struct drm_tegra_open_channel {
62 	__u32 client;
63 	__u32 pad;
64 	__u64 context;
65 };
66 
67 struct drm_tegra_close_channel {
68 	__u64 context;
69 };
70 
71 struct drm_tegra_get_syncpt {
72 	__u64 context;
73 	__u32 index;
74 	__u32 id;
75 };
76 
77 struct drm_tegra_get_syncpt_base {
78 	__u64 context;
79 	__u32 syncpt;
80 	__u32 id;
81 };
82 
83 struct drm_tegra_syncpt {
84 	__u32 id;
85 	__u32 incrs;
86 };
87 
88 struct drm_tegra_cmdbuf {
89 	__u32 handle;
90 	__u32 offset;
91 	__u32 words;
92 	__u32 pad;
93 };
94 
95 struct drm_tegra_reloc {
96 	struct {
97 		__u32 handle;
98 		__u32 offset;
99 	} cmdbuf;
100 	struct {
101 		__u32 handle;
102 		__u32 offset;
103 	} target;
104 	__u32 shift;
105 	__u32 pad;
106 };
107 
108 struct drm_tegra_waitchk {
109 	__u32 handle;
110 	__u32 offset;
111 	__u32 syncpt;
112 	__u32 thresh;
113 };
114 
115 struct drm_tegra_submit {
116 	__u64 context;
117 	__u32 num_syncpts;
118 	__u32 num_cmdbufs;
119 	__u32 num_relocs;
120 	__u32 num_waitchks;
121 	__u32 waitchk_mask;
122 	__u32 timeout;
123 	__u32 pad;
124 	__u64 syncpts;
125 	__u64 cmdbufs;
126 	__u64 relocs;
127 	__u64 waitchks;
128 	__u32 fence;		/* Return value */
129 
130 	__u32 reserved[5];	/* future expansion */
131 };
132 
133 #define DRM_TEGRA_GEM_CREATE		0x00
134 #define DRM_TEGRA_GEM_MMAP		0x01
135 #define DRM_TEGRA_SYNCPT_READ		0x02
136 #define DRM_TEGRA_SYNCPT_INCR		0x03
137 #define DRM_TEGRA_SYNCPT_WAIT		0x04
138 #define DRM_TEGRA_OPEN_CHANNEL		0x05
139 #define DRM_TEGRA_CLOSE_CHANNEL		0x06
140 #define DRM_TEGRA_GET_SYNCPT		0x07
141 #define DRM_TEGRA_SUBMIT		0x08
142 #define DRM_TEGRA_GET_SYNCPT_BASE	0x09
143 
144 #define DRM_IOCTL_TEGRA_GEM_CREATE DRM_IOWR(DRM_COMMAND_BASE + DRM_TEGRA_GEM_CREATE, struct drm_tegra_gem_create)
145 #define DRM_IOCTL_TEGRA_GEM_MMAP DRM_IOWR(DRM_COMMAND_BASE + DRM_TEGRA_GEM_MMAP, struct drm_tegra_gem_mmap)
146 #define DRM_IOCTL_TEGRA_SYNCPT_READ DRM_IOWR(DRM_COMMAND_BASE + DRM_TEGRA_SYNCPT_READ, struct drm_tegra_syncpt_read)
147 #define DRM_IOCTL_TEGRA_SYNCPT_INCR DRM_IOWR(DRM_COMMAND_BASE + DRM_TEGRA_SYNCPT_INCR, struct drm_tegra_syncpt_incr)
148 #define DRM_IOCTL_TEGRA_SYNCPT_WAIT DRM_IOWR(DRM_COMMAND_BASE + DRM_TEGRA_SYNCPT_WAIT, struct drm_tegra_syncpt_wait)
149 #define DRM_IOCTL_TEGRA_OPEN_CHANNEL DRM_IOWR(DRM_COMMAND_BASE + DRM_TEGRA_OPEN_CHANNEL, struct drm_tegra_open_channel)
150 #define DRM_IOCTL_TEGRA_CLOSE_CHANNEL DRM_IOWR(DRM_COMMAND_BASE + DRM_TEGRA_CLOSE_CHANNEL, struct drm_tegra_open_channel)
151 #define DRM_IOCTL_TEGRA_GET_SYNCPT DRM_IOWR(DRM_COMMAND_BASE + DRM_TEGRA_GET_SYNCPT, struct drm_tegra_get_syncpt)
152 #define DRM_IOCTL_TEGRA_SUBMIT DRM_IOWR(DRM_COMMAND_BASE + DRM_TEGRA_SUBMIT, struct drm_tegra_submit)
153 #define DRM_IOCTL_TEGRA_GET_SYNCPT_BASE DRM_IOWR(DRM_COMMAND_BASE + DRM_TEGRA_GET_SYNCPT_BASE, struct drm_tegra_get_syncpt_base)
154 
155 #endif
156