xref: /openbmc/linux/include/uapi/drm/drm_mode.h (revision 275876e2)
1 /*
2  * Copyright (c) 2007 Dave Airlie <airlied@linux.ie>
3  * Copyright (c) 2007 Jakob Bornecrantz <wallbraker@gmail.com>
4  * Copyright (c) 2008 Red Hat Inc.
5  * Copyright (c) 2007-2008 Tungsten Graphics, Inc., Cedar Park, TX., USA
6  * Copyright (c) 2007-2008 Intel Corporation
7  *
8  * Permission is hereby granted, free of charge, to any person obtaining a
9  * copy of this software and associated documentation files (the "Software"),
10  * to deal in the Software without restriction, including without limitation
11  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
12  * and/or sell copies of the Software, and to permit persons to whom the
13  * Software is furnished to do so, subject to the following conditions:
14  *
15  * The above copyright notice and this permission notice shall be included in
16  * all copies or substantial portions of the Software.
17  *
18  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
19  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
20  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
21  * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
22  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
23  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
24  * IN THE SOFTWARE.
25  */
26 
27 #ifndef _DRM_MODE_H
28 #define _DRM_MODE_H
29 
30 #include <linux/types.h>
31 
32 #define DRM_DISPLAY_INFO_LEN	32
33 #define DRM_CONNECTOR_NAME_LEN	32
34 #define DRM_DISPLAY_MODE_LEN	32
35 #define DRM_PROP_NAME_LEN	32
36 
37 #define DRM_MODE_TYPE_BUILTIN	(1<<0)
38 #define DRM_MODE_TYPE_CLOCK_C	((1<<1) | DRM_MODE_TYPE_BUILTIN)
39 #define DRM_MODE_TYPE_CRTC_C	((1<<2) | DRM_MODE_TYPE_BUILTIN)
40 #define DRM_MODE_TYPE_PREFERRED	(1<<3)
41 #define DRM_MODE_TYPE_DEFAULT	(1<<4)
42 #define DRM_MODE_TYPE_USERDEF	(1<<5)
43 #define DRM_MODE_TYPE_DRIVER	(1<<6)
44 
45 /* Video mode flags */
46 /* bit compatible with the xorg definitions. */
47 #define DRM_MODE_FLAG_PHSYNC			(1<<0)
48 #define DRM_MODE_FLAG_NHSYNC			(1<<1)
49 #define DRM_MODE_FLAG_PVSYNC			(1<<2)
50 #define DRM_MODE_FLAG_NVSYNC			(1<<3)
51 #define DRM_MODE_FLAG_INTERLACE			(1<<4)
52 #define DRM_MODE_FLAG_DBLSCAN			(1<<5)
53 #define DRM_MODE_FLAG_CSYNC			(1<<6)
54 #define DRM_MODE_FLAG_PCSYNC			(1<<7)
55 #define DRM_MODE_FLAG_NCSYNC			(1<<8)
56 #define DRM_MODE_FLAG_HSKEW			(1<<9) /* hskew provided */
57 #define DRM_MODE_FLAG_BCAST			(1<<10)
58 #define DRM_MODE_FLAG_PIXMUX			(1<<11)
59 #define DRM_MODE_FLAG_DBLCLK			(1<<12)
60 #define DRM_MODE_FLAG_CLKDIV2			(1<<13)
61  /*
62   * When adding a new stereo mode don't forget to adjust DRM_MODE_FLAGS_3D_MAX
63   * (define not exposed to user space).
64   */
65 #define DRM_MODE_FLAG_3D_MASK			(0x1f<<14)
66 #define  DRM_MODE_FLAG_3D_NONE			(0<<14)
67 #define  DRM_MODE_FLAG_3D_FRAME_PACKING		(1<<14)
68 #define  DRM_MODE_FLAG_3D_FIELD_ALTERNATIVE	(2<<14)
69 #define  DRM_MODE_FLAG_3D_LINE_ALTERNATIVE	(3<<14)
70 #define  DRM_MODE_FLAG_3D_SIDE_BY_SIDE_FULL	(4<<14)
71 #define  DRM_MODE_FLAG_3D_L_DEPTH		(5<<14)
72 #define  DRM_MODE_FLAG_3D_L_DEPTH_GFX_GFX_DEPTH	(6<<14)
73 #define  DRM_MODE_FLAG_3D_TOP_AND_BOTTOM	(7<<14)
74 #define  DRM_MODE_FLAG_3D_SIDE_BY_SIDE_HALF	(8<<14)
75 
76 
77 /* DPMS flags */
78 /* bit compatible with the xorg definitions. */
79 #define DRM_MODE_DPMS_ON	0
80 #define DRM_MODE_DPMS_STANDBY	1
81 #define DRM_MODE_DPMS_SUSPEND	2
82 #define DRM_MODE_DPMS_OFF	3
83 
84 /* Scaling mode options */
85 #define DRM_MODE_SCALE_NONE		0 /* Unmodified timing (display or
86 					     software can still scale) */
87 #define DRM_MODE_SCALE_FULLSCREEN	1 /* Full screen, ignore aspect */
88 #define DRM_MODE_SCALE_CENTER		2 /* Centered, no scaling */
89 #define DRM_MODE_SCALE_ASPECT		3 /* Full screen, preserve aspect */
90 
91 /* Picture aspect ratio options */
92 #define DRM_MODE_PICTURE_ASPECT_NONE	0
93 #define DRM_MODE_PICTURE_ASPECT_4_3	1
94 #define DRM_MODE_PICTURE_ASPECT_16_9	2
95 
96 /* Dithering mode options */
97 #define DRM_MODE_DITHERING_OFF	0
98 #define DRM_MODE_DITHERING_ON	1
99 #define DRM_MODE_DITHERING_AUTO 2
100 
101 /* Dirty info options */
102 #define DRM_MODE_DIRTY_OFF      0
103 #define DRM_MODE_DIRTY_ON       1
104 #define DRM_MODE_DIRTY_ANNOTATE 2
105 
106 struct drm_mode_modeinfo {
107 	__u32 clock;
108 	__u16 hdisplay, hsync_start, hsync_end, htotal, hskew;
109 	__u16 vdisplay, vsync_start, vsync_end, vtotal, vscan;
110 
111 	__u32 vrefresh;
112 
113 	__u32 flags;
114 	__u32 type;
115 	char name[DRM_DISPLAY_MODE_LEN];
116 };
117 
118 struct drm_mode_card_res {
119 	__u64 fb_id_ptr;
120 	__u64 crtc_id_ptr;
121 	__u64 connector_id_ptr;
122 	__u64 encoder_id_ptr;
123 	__u32 count_fbs;
124 	__u32 count_crtcs;
125 	__u32 count_connectors;
126 	__u32 count_encoders;
127 	__u32 min_width, max_width;
128 	__u32 min_height, max_height;
129 };
130 
131 struct drm_mode_crtc {
132 	__u64 set_connectors_ptr;
133 	__u32 count_connectors;
134 
135 	__u32 crtc_id; /**< Id */
136 	__u32 fb_id; /**< Id of framebuffer */
137 
138 	__u32 x, y; /**< Position on the frameuffer */
139 
140 	__u32 gamma_size;
141 	__u32 mode_valid;
142 	struct drm_mode_modeinfo mode;
143 };
144 
145 #define DRM_MODE_PRESENT_TOP_FIELD	(1<<0)
146 #define DRM_MODE_PRESENT_BOTTOM_FIELD	(1<<1)
147 
148 /* Planes blend with or override other bits on the CRTC */
149 struct drm_mode_set_plane {
150 	__u32 plane_id;
151 	__u32 crtc_id;
152 	__u32 fb_id; /* fb object contains surface format type */
153 	__u32 flags; /* see above flags */
154 
155 	/* Signed dest location allows it to be partially off screen */
156 	__s32 crtc_x, crtc_y;
157 	__u32 crtc_w, crtc_h;
158 
159 	/* Source values are 16.16 fixed point */
160 	__u32 src_x, src_y;
161 	__u32 src_h, src_w;
162 };
163 
164 struct drm_mode_get_plane {
165 	__u32 plane_id;
166 
167 	__u32 crtc_id;
168 	__u32 fb_id;
169 
170 	__u32 possible_crtcs;
171 	__u32 gamma_size;
172 
173 	__u32 count_format_types;
174 	__u64 format_type_ptr;
175 };
176 
177 struct drm_mode_get_plane_res {
178 	__u64 plane_id_ptr;
179 	__u32 count_planes;
180 };
181 
182 #define DRM_MODE_ENCODER_NONE	0
183 #define DRM_MODE_ENCODER_DAC	1
184 #define DRM_MODE_ENCODER_TMDS	2
185 #define DRM_MODE_ENCODER_LVDS	3
186 #define DRM_MODE_ENCODER_TVDAC	4
187 #define DRM_MODE_ENCODER_VIRTUAL 5
188 #define DRM_MODE_ENCODER_DSI	6
189 #define DRM_MODE_ENCODER_DPMST	7
190 
191 struct drm_mode_get_encoder {
192 	__u32 encoder_id;
193 	__u32 encoder_type;
194 
195 	__u32 crtc_id; /**< Id of crtc */
196 
197 	__u32 possible_crtcs;
198 	__u32 possible_clones;
199 };
200 
201 /* This is for connectors with multiple signal types. */
202 /* Try to match DRM_MODE_CONNECTOR_X as closely as possible. */
203 #define DRM_MODE_SUBCONNECTOR_Automatic	0
204 #define DRM_MODE_SUBCONNECTOR_Unknown	0
205 #define DRM_MODE_SUBCONNECTOR_DVID	3
206 #define DRM_MODE_SUBCONNECTOR_DVIA	4
207 #define DRM_MODE_SUBCONNECTOR_Composite	5
208 #define DRM_MODE_SUBCONNECTOR_SVIDEO	6
209 #define DRM_MODE_SUBCONNECTOR_Component	8
210 #define DRM_MODE_SUBCONNECTOR_SCART	9
211 
212 #define DRM_MODE_CONNECTOR_Unknown	0
213 #define DRM_MODE_CONNECTOR_VGA		1
214 #define DRM_MODE_CONNECTOR_DVII		2
215 #define DRM_MODE_CONNECTOR_DVID		3
216 #define DRM_MODE_CONNECTOR_DVIA		4
217 #define DRM_MODE_CONNECTOR_Composite	5
218 #define DRM_MODE_CONNECTOR_SVIDEO	6
219 #define DRM_MODE_CONNECTOR_LVDS		7
220 #define DRM_MODE_CONNECTOR_Component	8
221 #define DRM_MODE_CONNECTOR_9PinDIN	9
222 #define DRM_MODE_CONNECTOR_DisplayPort	10
223 #define DRM_MODE_CONNECTOR_HDMIA	11
224 #define DRM_MODE_CONNECTOR_HDMIB	12
225 #define DRM_MODE_CONNECTOR_TV		13
226 #define DRM_MODE_CONNECTOR_eDP		14
227 #define DRM_MODE_CONNECTOR_VIRTUAL      15
228 #define DRM_MODE_CONNECTOR_DSI		16
229 
230 struct drm_mode_get_connector {
231 
232 	__u64 encoders_ptr;
233 	__u64 modes_ptr;
234 	__u64 props_ptr;
235 	__u64 prop_values_ptr;
236 
237 	__u32 count_modes;
238 	__u32 count_props;
239 	__u32 count_encoders;
240 
241 	__u32 encoder_id; /**< Current Encoder */
242 	__u32 connector_id; /**< Id */
243 	__u32 connector_type;
244 	__u32 connector_type_id;
245 
246 	__u32 connection;
247 	__u32 mm_width, mm_height; /**< HxW in millimeters */
248 	__u32 subpixel;
249 
250 	__u32 pad;
251 };
252 
253 #define DRM_MODE_PROP_PENDING	(1<<0)
254 #define DRM_MODE_PROP_RANGE	(1<<1)
255 #define DRM_MODE_PROP_IMMUTABLE	(1<<2)
256 #define DRM_MODE_PROP_ENUM	(1<<3) /* enumerated type with text strings */
257 #define DRM_MODE_PROP_BLOB	(1<<4)
258 #define DRM_MODE_PROP_BITMASK	(1<<5) /* bitmask of enumerated types */
259 
260 /* non-extended types: legacy bitmask, one bit per type: */
261 #define DRM_MODE_PROP_LEGACY_TYPE  ( \
262 		DRM_MODE_PROP_RANGE | \
263 		DRM_MODE_PROP_ENUM | \
264 		DRM_MODE_PROP_BLOB | \
265 		DRM_MODE_PROP_BITMASK)
266 
267 /* extended-types: rather than continue to consume a bit per type,
268  * grab a chunk of the bits to use as integer type id.
269  */
270 #define DRM_MODE_PROP_EXTENDED_TYPE	0x0000ffc0
271 #define DRM_MODE_PROP_TYPE(n)		((n) << 6)
272 #define DRM_MODE_PROP_OBJECT		DRM_MODE_PROP_TYPE(1)
273 #define DRM_MODE_PROP_SIGNED_RANGE	DRM_MODE_PROP_TYPE(2)
274 
275 struct drm_mode_property_enum {
276 	__u64 value;
277 	char name[DRM_PROP_NAME_LEN];
278 };
279 
280 struct drm_mode_get_property {
281 	__u64 values_ptr; /* values and blob lengths */
282 	__u64 enum_blob_ptr; /* enum and blob id ptrs */
283 
284 	__u32 prop_id;
285 	__u32 flags;
286 	char name[DRM_PROP_NAME_LEN];
287 
288 	__u32 count_values;
289 	__u32 count_enum_blobs;
290 };
291 
292 struct drm_mode_connector_set_property {
293 	__u64 value;
294 	__u32 prop_id;
295 	__u32 connector_id;
296 };
297 
298 struct drm_mode_obj_get_properties {
299 	__u64 props_ptr;
300 	__u64 prop_values_ptr;
301 	__u32 count_props;
302 	__u32 obj_id;
303 	__u32 obj_type;
304 };
305 
306 struct drm_mode_obj_set_property {
307 	__u64 value;
308 	__u32 prop_id;
309 	__u32 obj_id;
310 	__u32 obj_type;
311 };
312 
313 struct drm_mode_get_blob {
314 	__u32 blob_id;
315 	__u32 length;
316 	__u64 data;
317 };
318 
319 struct drm_mode_fb_cmd {
320 	__u32 fb_id;
321 	__u32 width, height;
322 	__u32 pitch;
323 	__u32 bpp;
324 	__u32 depth;
325 	/* driver specific handle */
326 	__u32 handle;
327 };
328 
329 #define DRM_MODE_FB_INTERLACED	(1<<0) /* for interlaced framebuffers */
330 
331 struct drm_mode_fb_cmd2 {
332 	__u32 fb_id;
333 	__u32 width, height;
334 	__u32 pixel_format; /* fourcc code from drm_fourcc.h */
335 	__u32 flags; /* see above flags */
336 
337 	/*
338 	 * In case of planar formats, this ioctl allows up to 4
339 	 * buffer objects with offets and pitches per plane.
340 	 * The pitch and offset order is dictated by the fourcc,
341 	 * e.g. NV12 (http://fourcc.org/yuv.php#NV12) is described as:
342 	 *
343 	 *   YUV 4:2:0 image with a plane of 8 bit Y samples
344 	 *   followed by an interleaved U/V plane containing
345 	 *   8 bit 2x2 subsampled colour difference samples.
346 	 *
347 	 * So it would consist of Y as offset[0] and UV as
348 	 * offeset[1].  Note that offset[0] will generally
349 	 * be 0.
350 	 */
351 	__u32 handles[4];
352 	__u32 pitches[4]; /* pitch for each plane */
353 	__u32 offsets[4]; /* offset of each plane */
354 };
355 
356 #define DRM_MODE_FB_DIRTY_ANNOTATE_COPY 0x01
357 #define DRM_MODE_FB_DIRTY_ANNOTATE_FILL 0x02
358 #define DRM_MODE_FB_DIRTY_FLAGS         0x03
359 
360 #define DRM_MODE_FB_DIRTY_MAX_CLIPS     256
361 
362 /*
363  * Mark a region of a framebuffer as dirty.
364  *
365  * Some hardware does not automatically update display contents
366  * as a hardware or software draw to a framebuffer. This ioctl
367  * allows userspace to tell the kernel and the hardware what
368  * regions of the framebuffer have changed.
369  *
370  * The kernel or hardware is free to update more then just the
371  * region specified by the clip rects. The kernel or hardware
372  * may also delay and/or coalesce several calls to dirty into a
373  * single update.
374  *
375  * Userspace may annotate the updates, the annotates are a
376  * promise made by the caller that the change is either a copy
377  * of pixels or a fill of a single color in the region specified.
378  *
379  * If the DRM_MODE_FB_DIRTY_ANNOTATE_COPY flag is given then
380  * the number of updated regions are half of num_clips given,
381  * where the clip rects are paired in src and dst. The width and
382  * height of each one of the pairs must match.
383  *
384  * If the DRM_MODE_FB_DIRTY_ANNOTATE_FILL flag is given the caller
385  * promises that the region specified of the clip rects is filled
386  * completely with a single color as given in the color argument.
387  */
388 
389 struct drm_mode_fb_dirty_cmd {
390 	__u32 fb_id;
391 	__u32 flags;
392 	__u32 color;
393 	__u32 num_clips;
394 	__u64 clips_ptr;
395 };
396 
397 struct drm_mode_mode_cmd {
398 	__u32 connector_id;
399 	struct drm_mode_modeinfo mode;
400 };
401 
402 #define DRM_MODE_CURSOR_BO	0x01
403 #define DRM_MODE_CURSOR_MOVE	0x02
404 #define DRM_MODE_CURSOR_FLAGS	0x03
405 
406 /*
407  * depending on the value in flags different members are used.
408  *
409  * CURSOR_BO uses
410  *    crtc_id
411  *    width
412  *    height
413  *    handle - if 0 turns the cursor off
414  *
415  * CURSOR_MOVE uses
416  *    crtc_id
417  *    x
418  *    y
419  */
420 struct drm_mode_cursor {
421 	__u32 flags;
422 	__u32 crtc_id;
423 	__s32 x;
424 	__s32 y;
425 	__u32 width;
426 	__u32 height;
427 	/* driver specific handle */
428 	__u32 handle;
429 };
430 
431 struct drm_mode_cursor2 {
432 	__u32 flags;
433 	__u32 crtc_id;
434 	__s32 x;
435 	__s32 y;
436 	__u32 width;
437 	__u32 height;
438 	/* driver specific handle */
439 	__u32 handle;
440 	__s32 hot_x;
441 	__s32 hot_y;
442 };
443 
444 struct drm_mode_crtc_lut {
445 	__u32 crtc_id;
446 	__u32 gamma_size;
447 
448 	/* pointers to arrays */
449 	__u64 red;
450 	__u64 green;
451 	__u64 blue;
452 };
453 
454 #define DRM_MODE_PAGE_FLIP_EVENT 0x01
455 #define DRM_MODE_PAGE_FLIP_ASYNC 0x02
456 #define DRM_MODE_PAGE_FLIP_FLAGS (DRM_MODE_PAGE_FLIP_EVENT|DRM_MODE_PAGE_FLIP_ASYNC)
457 
458 /*
459  * Request a page flip on the specified crtc.
460  *
461  * This ioctl will ask KMS to schedule a page flip for the specified
462  * crtc.  Once any pending rendering targeting the specified fb (as of
463  * ioctl time) has completed, the crtc will be reprogrammed to display
464  * that fb after the next vertical refresh.  The ioctl returns
465  * immediately, but subsequent rendering to the current fb will block
466  * in the execbuffer ioctl until the page flip happens.  If a page
467  * flip is already pending as the ioctl is called, EBUSY will be
468  * returned.
469  *
470  * Flag DRM_MODE_PAGE_FLIP_EVENT requests that drm sends back a vblank
471  * event (see drm.h: struct drm_event_vblank) when the page flip is
472  * done.  The user_data field passed in with this ioctl will be
473  * returned as the user_data field in the vblank event struct.
474  *
475  * Flag DRM_MODE_PAGE_FLIP_ASYNC requests that the flip happen
476  * 'as soon as possible', meaning that it not delay waiting for vblank.
477  * This may cause tearing on the screen.
478  *
479  * The reserved field must be zero until we figure out something
480  * clever to use it for.
481  */
482 
483 struct drm_mode_crtc_page_flip {
484 	__u32 crtc_id;
485 	__u32 fb_id;
486 	__u32 flags;
487 	__u32 reserved;
488 	__u64 user_data;
489 };
490 
491 /* create a dumb scanout buffer */
492 struct drm_mode_create_dumb {
493 	uint32_t height;
494 	uint32_t width;
495 	uint32_t bpp;
496 	uint32_t flags;
497 	/* handle, pitch, size will be returned */
498 	uint32_t handle;
499 	uint32_t pitch;
500 	uint64_t size;
501 };
502 
503 /* set up for mmap of a dumb scanout buffer */
504 struct drm_mode_map_dumb {
505 	/** Handle for the object being mapped. */
506 	__u32 handle;
507 	__u32 pad;
508 	/**
509 	 * Fake offset to use for subsequent mmap call
510 	 *
511 	 * This is a fixed-size type for 32/64 compatibility.
512 	 */
513 	__u64 offset;
514 };
515 
516 struct drm_mode_destroy_dumb {
517 	uint32_t handle;
518 };
519 
520 #endif
521