1 /* 2 * Copyright (c) 2007 Dave Airlie <airlied@linux.ie> 3 * Copyright (c) 2007 Jakob Bornecrantz <wallbraker@gmail.com> 4 * Copyright (c) 2008 Red Hat Inc. 5 * Copyright (c) 2007-2008 Tungsten Graphics, Inc., Cedar Park, TX., USA 6 * Copyright (c) 2007-2008 Intel Corporation 7 * 8 * Permission is hereby granted, free of charge, to any person obtaining a 9 * copy of this software and associated documentation files (the "Software"), 10 * to deal in the Software without restriction, including without limitation 11 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 12 * and/or sell copies of the Software, and to permit persons to whom the 13 * Software is furnished to do so, subject to the following conditions: 14 * 15 * The above copyright notice and this permission notice shall be included in 16 * all copies or substantial portions of the Software. 17 * 18 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 19 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 20 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE 21 * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 22 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING 23 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS 24 * IN THE SOFTWARE. 25 */ 26 27 #ifndef _DRM_MODE_H 28 #define _DRM_MODE_H 29 30 #include <linux/types.h> 31 32 #define DRM_DISPLAY_INFO_LEN 32 33 #define DRM_CONNECTOR_NAME_LEN 32 34 #define DRM_DISPLAY_MODE_LEN 32 35 #define DRM_PROP_NAME_LEN 32 36 37 #define DRM_MODE_TYPE_BUILTIN (1<<0) 38 #define DRM_MODE_TYPE_CLOCK_C ((1<<1) | DRM_MODE_TYPE_BUILTIN) 39 #define DRM_MODE_TYPE_CRTC_C ((1<<2) | DRM_MODE_TYPE_BUILTIN) 40 #define DRM_MODE_TYPE_PREFERRED (1<<3) 41 #define DRM_MODE_TYPE_DEFAULT (1<<4) 42 #define DRM_MODE_TYPE_USERDEF (1<<5) 43 #define DRM_MODE_TYPE_DRIVER (1<<6) 44 45 /* Video mode flags */ 46 /* bit compatible with the xorg definitions. */ 47 #define DRM_MODE_FLAG_PHSYNC (1<<0) 48 #define DRM_MODE_FLAG_NHSYNC (1<<1) 49 #define DRM_MODE_FLAG_PVSYNC (1<<2) 50 #define DRM_MODE_FLAG_NVSYNC (1<<3) 51 #define DRM_MODE_FLAG_INTERLACE (1<<4) 52 #define DRM_MODE_FLAG_DBLSCAN (1<<5) 53 #define DRM_MODE_FLAG_CSYNC (1<<6) 54 #define DRM_MODE_FLAG_PCSYNC (1<<7) 55 #define DRM_MODE_FLAG_NCSYNC (1<<8) 56 #define DRM_MODE_FLAG_HSKEW (1<<9) /* hskew provided */ 57 #define DRM_MODE_FLAG_BCAST (1<<10) 58 #define DRM_MODE_FLAG_PIXMUX (1<<11) 59 #define DRM_MODE_FLAG_DBLCLK (1<<12) 60 #define DRM_MODE_FLAG_CLKDIV2 (1<<13) 61 /* 62 * When adding a new stereo mode don't forget to adjust DRM_MODE_FLAGS_3D_MAX 63 * (define not exposed to user space). 64 */ 65 #define DRM_MODE_FLAG_3D_MASK (0x1f<<14) 66 #define DRM_MODE_FLAG_3D_NONE (0<<14) 67 #define DRM_MODE_FLAG_3D_FRAME_PACKING (1<<14) 68 #define DRM_MODE_FLAG_3D_FIELD_ALTERNATIVE (2<<14) 69 #define DRM_MODE_FLAG_3D_LINE_ALTERNATIVE (3<<14) 70 #define DRM_MODE_FLAG_3D_SIDE_BY_SIDE_FULL (4<<14) 71 #define DRM_MODE_FLAG_3D_L_DEPTH (5<<14) 72 #define DRM_MODE_FLAG_3D_L_DEPTH_GFX_GFX_DEPTH (6<<14) 73 #define DRM_MODE_FLAG_3D_TOP_AND_BOTTOM (7<<14) 74 #define DRM_MODE_FLAG_3D_SIDE_BY_SIDE_HALF (8<<14) 75 76 77 /* DPMS flags */ 78 /* bit compatible with the xorg definitions. */ 79 #define DRM_MODE_DPMS_ON 0 80 #define DRM_MODE_DPMS_STANDBY 1 81 #define DRM_MODE_DPMS_SUSPEND 2 82 #define DRM_MODE_DPMS_OFF 3 83 84 /* Scaling mode options */ 85 #define DRM_MODE_SCALE_NONE 0 /* Unmodified timing (display or 86 software can still scale) */ 87 #define DRM_MODE_SCALE_FULLSCREEN 1 /* Full screen, ignore aspect */ 88 #define DRM_MODE_SCALE_CENTER 2 /* Centered, no scaling */ 89 #define DRM_MODE_SCALE_ASPECT 3 /* Full screen, preserve aspect */ 90 91 /* Dithering mode options */ 92 #define DRM_MODE_DITHERING_OFF 0 93 #define DRM_MODE_DITHERING_ON 1 94 #define DRM_MODE_DITHERING_AUTO 2 95 96 /* Dirty info options */ 97 #define DRM_MODE_DIRTY_OFF 0 98 #define DRM_MODE_DIRTY_ON 1 99 #define DRM_MODE_DIRTY_ANNOTATE 2 100 101 struct drm_mode_modeinfo { 102 __u32 clock; 103 __u16 hdisplay, hsync_start, hsync_end, htotal, hskew; 104 __u16 vdisplay, vsync_start, vsync_end, vtotal, vscan; 105 106 __u32 vrefresh; 107 108 __u32 flags; 109 __u32 type; 110 char name[DRM_DISPLAY_MODE_LEN]; 111 }; 112 113 struct drm_mode_card_res { 114 __u64 fb_id_ptr; 115 __u64 crtc_id_ptr; 116 __u64 connector_id_ptr; 117 __u64 encoder_id_ptr; 118 __u32 count_fbs; 119 __u32 count_crtcs; 120 __u32 count_connectors; 121 __u32 count_encoders; 122 __u32 min_width, max_width; 123 __u32 min_height, max_height; 124 }; 125 126 struct drm_mode_crtc { 127 __u64 set_connectors_ptr; 128 __u32 count_connectors; 129 130 __u32 crtc_id; /**< Id */ 131 __u32 fb_id; /**< Id of framebuffer */ 132 133 __u32 x, y; /**< Position on the frameuffer */ 134 135 __u32 gamma_size; 136 __u32 mode_valid; 137 struct drm_mode_modeinfo mode; 138 }; 139 140 #define DRM_MODE_PRESENT_TOP_FIELD (1<<0) 141 #define DRM_MODE_PRESENT_BOTTOM_FIELD (1<<1) 142 143 /* Planes blend with or override other bits on the CRTC */ 144 struct drm_mode_set_plane { 145 __u32 plane_id; 146 __u32 crtc_id; 147 __u32 fb_id; /* fb object contains surface format type */ 148 __u32 flags; /* see above flags */ 149 150 /* Signed dest location allows it to be partially off screen */ 151 __s32 crtc_x, crtc_y; 152 __u32 crtc_w, crtc_h; 153 154 /* Source values are 16.16 fixed point */ 155 __u32 src_x, src_y; 156 __u32 src_h, src_w; 157 }; 158 159 struct drm_mode_get_plane { 160 __u32 plane_id; 161 162 __u32 crtc_id; 163 __u32 fb_id; 164 165 __u32 possible_crtcs; 166 __u32 gamma_size; 167 168 __u32 count_format_types; 169 __u64 format_type_ptr; 170 }; 171 172 struct drm_mode_get_plane_res { 173 __u64 plane_id_ptr; 174 __u32 count_planes; 175 }; 176 177 #define DRM_MODE_ENCODER_NONE 0 178 #define DRM_MODE_ENCODER_DAC 1 179 #define DRM_MODE_ENCODER_TMDS 2 180 #define DRM_MODE_ENCODER_LVDS 3 181 #define DRM_MODE_ENCODER_TVDAC 4 182 #define DRM_MODE_ENCODER_VIRTUAL 5 183 #define DRM_MODE_ENCODER_DSI 6 184 #define DRM_MODE_ENCODER_DPMST 7 185 186 struct drm_mode_get_encoder { 187 __u32 encoder_id; 188 __u32 encoder_type; 189 190 __u32 crtc_id; /**< Id of crtc */ 191 192 __u32 possible_crtcs; 193 __u32 possible_clones; 194 }; 195 196 /* This is for connectors with multiple signal types. */ 197 /* Try to match DRM_MODE_CONNECTOR_X as closely as possible. */ 198 #define DRM_MODE_SUBCONNECTOR_Automatic 0 199 #define DRM_MODE_SUBCONNECTOR_Unknown 0 200 #define DRM_MODE_SUBCONNECTOR_DVID 3 201 #define DRM_MODE_SUBCONNECTOR_DVIA 4 202 #define DRM_MODE_SUBCONNECTOR_Composite 5 203 #define DRM_MODE_SUBCONNECTOR_SVIDEO 6 204 #define DRM_MODE_SUBCONNECTOR_Component 8 205 #define DRM_MODE_SUBCONNECTOR_SCART 9 206 207 #define DRM_MODE_CONNECTOR_Unknown 0 208 #define DRM_MODE_CONNECTOR_VGA 1 209 #define DRM_MODE_CONNECTOR_DVII 2 210 #define DRM_MODE_CONNECTOR_DVID 3 211 #define DRM_MODE_CONNECTOR_DVIA 4 212 #define DRM_MODE_CONNECTOR_Composite 5 213 #define DRM_MODE_CONNECTOR_SVIDEO 6 214 #define DRM_MODE_CONNECTOR_LVDS 7 215 #define DRM_MODE_CONNECTOR_Component 8 216 #define DRM_MODE_CONNECTOR_9PinDIN 9 217 #define DRM_MODE_CONNECTOR_DisplayPort 10 218 #define DRM_MODE_CONNECTOR_HDMIA 11 219 #define DRM_MODE_CONNECTOR_HDMIB 12 220 #define DRM_MODE_CONNECTOR_TV 13 221 #define DRM_MODE_CONNECTOR_eDP 14 222 #define DRM_MODE_CONNECTOR_VIRTUAL 15 223 #define DRM_MODE_CONNECTOR_DSI 16 224 225 struct drm_mode_get_connector { 226 227 __u64 encoders_ptr; 228 __u64 modes_ptr; 229 __u64 props_ptr; 230 __u64 prop_values_ptr; 231 232 __u32 count_modes; 233 __u32 count_props; 234 __u32 count_encoders; 235 236 __u32 encoder_id; /**< Current Encoder */ 237 __u32 connector_id; /**< Id */ 238 __u32 connector_type; 239 __u32 connector_type_id; 240 241 __u32 connection; 242 __u32 mm_width, mm_height; /**< HxW in millimeters */ 243 __u32 subpixel; 244 245 __u32 pad; 246 }; 247 248 #define DRM_MODE_PROP_PENDING (1<<0) 249 #define DRM_MODE_PROP_RANGE (1<<1) 250 #define DRM_MODE_PROP_IMMUTABLE (1<<2) 251 #define DRM_MODE_PROP_ENUM (1<<3) /* enumerated type with text strings */ 252 #define DRM_MODE_PROP_BLOB (1<<4) 253 #define DRM_MODE_PROP_BITMASK (1<<5) /* bitmask of enumerated types */ 254 255 /* non-extended types: legacy bitmask, one bit per type: */ 256 #define DRM_MODE_PROP_LEGACY_TYPE ( \ 257 DRM_MODE_PROP_RANGE | \ 258 DRM_MODE_PROP_ENUM | \ 259 DRM_MODE_PROP_BLOB | \ 260 DRM_MODE_PROP_BITMASK) 261 262 /* extended-types: rather than continue to consume a bit per type, 263 * grab a chunk of the bits to use as integer type id. 264 */ 265 #define DRM_MODE_PROP_EXTENDED_TYPE 0x0000ffc0 266 #define DRM_MODE_PROP_TYPE(n) ((n) << 6) 267 #define DRM_MODE_PROP_OBJECT DRM_MODE_PROP_TYPE(1) 268 #define DRM_MODE_PROP_SIGNED_RANGE DRM_MODE_PROP_TYPE(2) 269 270 struct drm_mode_property_enum { 271 __u64 value; 272 char name[DRM_PROP_NAME_LEN]; 273 }; 274 275 struct drm_mode_get_property { 276 __u64 values_ptr; /* values and blob lengths */ 277 __u64 enum_blob_ptr; /* enum and blob id ptrs */ 278 279 __u32 prop_id; 280 __u32 flags; 281 char name[DRM_PROP_NAME_LEN]; 282 283 __u32 count_values; 284 __u32 count_enum_blobs; 285 }; 286 287 struct drm_mode_connector_set_property { 288 __u64 value; 289 __u32 prop_id; 290 __u32 connector_id; 291 }; 292 293 struct drm_mode_obj_get_properties { 294 __u64 props_ptr; 295 __u64 prop_values_ptr; 296 __u32 count_props; 297 __u32 obj_id; 298 __u32 obj_type; 299 }; 300 301 struct drm_mode_obj_set_property { 302 __u64 value; 303 __u32 prop_id; 304 __u32 obj_id; 305 __u32 obj_type; 306 }; 307 308 struct drm_mode_get_blob { 309 __u32 blob_id; 310 __u32 length; 311 __u64 data; 312 }; 313 314 struct drm_mode_fb_cmd { 315 __u32 fb_id; 316 __u32 width, height; 317 __u32 pitch; 318 __u32 bpp; 319 __u32 depth; 320 /* driver specific handle */ 321 __u32 handle; 322 }; 323 324 #define DRM_MODE_FB_INTERLACED (1<<0) /* for interlaced framebuffers */ 325 326 struct drm_mode_fb_cmd2 { 327 __u32 fb_id; 328 __u32 width, height; 329 __u32 pixel_format; /* fourcc code from drm_fourcc.h */ 330 __u32 flags; /* see above flags */ 331 332 /* 333 * In case of planar formats, this ioctl allows up to 4 334 * buffer objects with offets and pitches per plane. 335 * The pitch and offset order is dictated by the fourcc, 336 * e.g. NV12 (http://fourcc.org/yuv.php#NV12) is described as: 337 * 338 * YUV 4:2:0 image with a plane of 8 bit Y samples 339 * followed by an interleaved U/V plane containing 340 * 8 bit 2x2 subsampled colour difference samples. 341 * 342 * So it would consist of Y as offset[0] and UV as 343 * offeset[1]. Note that offset[0] will generally 344 * be 0. 345 */ 346 __u32 handles[4]; 347 __u32 pitches[4]; /* pitch for each plane */ 348 __u32 offsets[4]; /* offset of each plane */ 349 }; 350 351 #define DRM_MODE_FB_DIRTY_ANNOTATE_COPY 0x01 352 #define DRM_MODE_FB_DIRTY_ANNOTATE_FILL 0x02 353 #define DRM_MODE_FB_DIRTY_FLAGS 0x03 354 355 #define DRM_MODE_FB_DIRTY_MAX_CLIPS 256 356 357 /* 358 * Mark a region of a framebuffer as dirty. 359 * 360 * Some hardware does not automatically update display contents 361 * as a hardware or software draw to a framebuffer. This ioctl 362 * allows userspace to tell the kernel and the hardware what 363 * regions of the framebuffer have changed. 364 * 365 * The kernel or hardware is free to update more then just the 366 * region specified by the clip rects. The kernel or hardware 367 * may also delay and/or coalesce several calls to dirty into a 368 * single update. 369 * 370 * Userspace may annotate the updates, the annotates are a 371 * promise made by the caller that the change is either a copy 372 * of pixels or a fill of a single color in the region specified. 373 * 374 * If the DRM_MODE_FB_DIRTY_ANNOTATE_COPY flag is given then 375 * the number of updated regions are half of num_clips given, 376 * where the clip rects are paired in src and dst. The width and 377 * height of each one of the pairs must match. 378 * 379 * If the DRM_MODE_FB_DIRTY_ANNOTATE_FILL flag is given the caller 380 * promises that the region specified of the clip rects is filled 381 * completely with a single color as given in the color argument. 382 */ 383 384 struct drm_mode_fb_dirty_cmd { 385 __u32 fb_id; 386 __u32 flags; 387 __u32 color; 388 __u32 num_clips; 389 __u64 clips_ptr; 390 }; 391 392 struct drm_mode_mode_cmd { 393 __u32 connector_id; 394 struct drm_mode_modeinfo mode; 395 }; 396 397 #define DRM_MODE_CURSOR_BO 0x01 398 #define DRM_MODE_CURSOR_MOVE 0x02 399 #define DRM_MODE_CURSOR_FLAGS 0x03 400 401 /* 402 * depending on the value in flags different members are used. 403 * 404 * CURSOR_BO uses 405 * crtc_id 406 * width 407 * height 408 * handle - if 0 turns the cursor off 409 * 410 * CURSOR_MOVE uses 411 * crtc_id 412 * x 413 * y 414 */ 415 struct drm_mode_cursor { 416 __u32 flags; 417 __u32 crtc_id; 418 __s32 x; 419 __s32 y; 420 __u32 width; 421 __u32 height; 422 /* driver specific handle */ 423 __u32 handle; 424 }; 425 426 struct drm_mode_cursor2 { 427 __u32 flags; 428 __u32 crtc_id; 429 __s32 x; 430 __s32 y; 431 __u32 width; 432 __u32 height; 433 /* driver specific handle */ 434 __u32 handle; 435 __s32 hot_x; 436 __s32 hot_y; 437 }; 438 439 struct drm_mode_crtc_lut { 440 __u32 crtc_id; 441 __u32 gamma_size; 442 443 /* pointers to arrays */ 444 __u64 red; 445 __u64 green; 446 __u64 blue; 447 }; 448 449 #define DRM_MODE_PAGE_FLIP_EVENT 0x01 450 #define DRM_MODE_PAGE_FLIP_ASYNC 0x02 451 #define DRM_MODE_PAGE_FLIP_FLAGS (DRM_MODE_PAGE_FLIP_EVENT|DRM_MODE_PAGE_FLIP_ASYNC) 452 453 /* 454 * Request a page flip on the specified crtc. 455 * 456 * This ioctl will ask KMS to schedule a page flip for the specified 457 * crtc. Once any pending rendering targeting the specified fb (as of 458 * ioctl time) has completed, the crtc will be reprogrammed to display 459 * that fb after the next vertical refresh. The ioctl returns 460 * immediately, but subsequent rendering to the current fb will block 461 * in the execbuffer ioctl until the page flip happens. If a page 462 * flip is already pending as the ioctl is called, EBUSY will be 463 * returned. 464 * 465 * Flag DRM_MODE_PAGE_FLIP_EVENT requests that drm sends back a vblank 466 * event (see drm.h: struct drm_event_vblank) when the page flip is 467 * done. The user_data field passed in with this ioctl will be 468 * returned as the user_data field in the vblank event struct. 469 * 470 * Flag DRM_MODE_PAGE_FLIP_ASYNC requests that the flip happen 471 * 'as soon as possible', meaning that it not delay waiting for vblank. 472 * This may cause tearing on the screen. 473 * 474 * The reserved field must be zero until we figure out something 475 * clever to use it for. 476 */ 477 478 struct drm_mode_crtc_page_flip { 479 __u32 crtc_id; 480 __u32 fb_id; 481 __u32 flags; 482 __u32 reserved; 483 __u64 user_data; 484 }; 485 486 /* create a dumb scanout buffer */ 487 struct drm_mode_create_dumb { 488 uint32_t height; 489 uint32_t width; 490 uint32_t bpp; 491 uint32_t flags; 492 /* handle, pitch, size will be returned */ 493 uint32_t handle; 494 uint32_t pitch; 495 uint64_t size; 496 }; 497 498 /* set up for mmap of a dumb scanout buffer */ 499 struct drm_mode_map_dumb { 500 /** Handle for the object being mapped. */ 501 __u32 handle; 502 __u32 pad; 503 /** 504 * Fake offset to use for subsequent mmap call 505 * 506 * This is a fixed-size type for 32/64 compatibility. 507 */ 508 __u64 offset; 509 }; 510 511 struct drm_mode_destroy_dumb { 512 uint32_t handle; 513 }; 514 515 #endif 516