1 /* 2 * Copyright 2011 Intel Corporation 3 * 4 * Permission is hereby granted, free of charge, to any person obtaining a 5 * copy of this software and associated documentation files (the "Software"), 6 * to deal in the Software without restriction, including without limitation 7 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 8 * and/or sell copies of the Software, and to permit persons to whom the 9 * Software is furnished to do so, subject to the following conditions: 10 * 11 * The above copyright notice and this permission notice (including the next 12 * paragraph) shall be included in all copies or substantial portions of the 13 * Software. 14 * 15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 18 * VA LINUX SYSTEMS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR 19 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, 20 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 21 * OTHER DEALINGS IN THE SOFTWARE. 22 */ 23 24 #ifndef DRM_FOURCC_H 25 #define DRM_FOURCC_H 26 27 #include "drm.h" 28 29 #if defined(__cplusplus) 30 extern "C" { 31 #endif 32 33 #define fourcc_code(a, b, c, d) ((__u32)(a) | ((__u32)(b) << 8) | \ 34 ((__u32)(c) << 16) | ((__u32)(d) << 24)) 35 36 #define DRM_FORMAT_BIG_ENDIAN (1<<31) /* format is big endian instead of little endian */ 37 38 /* color index */ 39 #define DRM_FORMAT_C8 fourcc_code('C', '8', ' ', ' ') /* [7:0] C */ 40 41 /* 8 bpp Red */ 42 #define DRM_FORMAT_R8 fourcc_code('R', '8', ' ', ' ') /* [7:0] R */ 43 44 /* 16 bpp Red */ 45 #define DRM_FORMAT_R16 fourcc_code('R', '1', '6', ' ') /* [15:0] R little endian */ 46 47 /* 16 bpp RG */ 48 #define DRM_FORMAT_RG88 fourcc_code('R', 'G', '8', '8') /* [15:0] R:G 8:8 little endian */ 49 #define DRM_FORMAT_GR88 fourcc_code('G', 'R', '8', '8') /* [15:0] G:R 8:8 little endian */ 50 51 /* 32 bpp RG */ 52 #define DRM_FORMAT_RG1616 fourcc_code('R', 'G', '3', '2') /* [31:0] R:G 16:16 little endian */ 53 #define DRM_FORMAT_GR1616 fourcc_code('G', 'R', '3', '2') /* [31:0] G:R 16:16 little endian */ 54 55 /* 8 bpp RGB */ 56 #define DRM_FORMAT_RGB332 fourcc_code('R', 'G', 'B', '8') /* [7:0] R:G:B 3:3:2 */ 57 #define DRM_FORMAT_BGR233 fourcc_code('B', 'G', 'R', '8') /* [7:0] B:G:R 2:3:3 */ 58 59 /* 16 bpp RGB */ 60 #define DRM_FORMAT_XRGB4444 fourcc_code('X', 'R', '1', '2') /* [15:0] x:R:G:B 4:4:4:4 little endian */ 61 #define DRM_FORMAT_XBGR4444 fourcc_code('X', 'B', '1', '2') /* [15:0] x:B:G:R 4:4:4:4 little endian */ 62 #define DRM_FORMAT_RGBX4444 fourcc_code('R', 'X', '1', '2') /* [15:0] R:G:B:x 4:4:4:4 little endian */ 63 #define DRM_FORMAT_BGRX4444 fourcc_code('B', 'X', '1', '2') /* [15:0] B:G:R:x 4:4:4:4 little endian */ 64 65 #define DRM_FORMAT_ARGB4444 fourcc_code('A', 'R', '1', '2') /* [15:0] A:R:G:B 4:4:4:4 little endian */ 66 #define DRM_FORMAT_ABGR4444 fourcc_code('A', 'B', '1', '2') /* [15:0] A:B:G:R 4:4:4:4 little endian */ 67 #define DRM_FORMAT_RGBA4444 fourcc_code('R', 'A', '1', '2') /* [15:0] R:G:B:A 4:4:4:4 little endian */ 68 #define DRM_FORMAT_BGRA4444 fourcc_code('B', 'A', '1', '2') /* [15:0] B:G:R:A 4:4:4:4 little endian */ 69 70 #define DRM_FORMAT_XRGB1555 fourcc_code('X', 'R', '1', '5') /* [15:0] x:R:G:B 1:5:5:5 little endian */ 71 #define DRM_FORMAT_XBGR1555 fourcc_code('X', 'B', '1', '5') /* [15:0] x:B:G:R 1:5:5:5 little endian */ 72 #define DRM_FORMAT_RGBX5551 fourcc_code('R', 'X', '1', '5') /* [15:0] R:G:B:x 5:5:5:1 little endian */ 73 #define DRM_FORMAT_BGRX5551 fourcc_code('B', 'X', '1', '5') /* [15:0] B:G:R:x 5:5:5:1 little endian */ 74 75 #define DRM_FORMAT_ARGB1555 fourcc_code('A', 'R', '1', '5') /* [15:0] A:R:G:B 1:5:5:5 little endian */ 76 #define DRM_FORMAT_ABGR1555 fourcc_code('A', 'B', '1', '5') /* [15:0] A:B:G:R 1:5:5:5 little endian */ 77 #define DRM_FORMAT_RGBA5551 fourcc_code('R', 'A', '1', '5') /* [15:0] R:G:B:A 5:5:5:1 little endian */ 78 #define DRM_FORMAT_BGRA5551 fourcc_code('B', 'A', '1', '5') /* [15:0] B:G:R:A 5:5:5:1 little endian */ 79 80 #define DRM_FORMAT_RGB565 fourcc_code('R', 'G', '1', '6') /* [15:0] R:G:B 5:6:5 little endian */ 81 #define DRM_FORMAT_BGR565 fourcc_code('B', 'G', '1', '6') /* [15:0] B:G:R 5:6:5 little endian */ 82 83 /* 24 bpp RGB */ 84 #define DRM_FORMAT_RGB888 fourcc_code('R', 'G', '2', '4') /* [23:0] R:G:B little endian */ 85 #define DRM_FORMAT_BGR888 fourcc_code('B', 'G', '2', '4') /* [23:0] B:G:R little endian */ 86 87 /* 32 bpp RGB */ 88 #define DRM_FORMAT_XRGB8888 fourcc_code('X', 'R', '2', '4') /* [31:0] x:R:G:B 8:8:8:8 little endian */ 89 #define DRM_FORMAT_XBGR8888 fourcc_code('X', 'B', '2', '4') /* [31:0] x:B:G:R 8:8:8:8 little endian */ 90 #define DRM_FORMAT_RGBX8888 fourcc_code('R', 'X', '2', '4') /* [31:0] R:G:B:x 8:8:8:8 little endian */ 91 #define DRM_FORMAT_BGRX8888 fourcc_code('B', 'X', '2', '4') /* [31:0] B:G:R:x 8:8:8:8 little endian */ 92 93 #define DRM_FORMAT_ARGB8888 fourcc_code('A', 'R', '2', '4') /* [31:0] A:R:G:B 8:8:8:8 little endian */ 94 #define DRM_FORMAT_ABGR8888 fourcc_code('A', 'B', '2', '4') /* [31:0] A:B:G:R 8:8:8:8 little endian */ 95 #define DRM_FORMAT_RGBA8888 fourcc_code('R', 'A', '2', '4') /* [31:0] R:G:B:A 8:8:8:8 little endian */ 96 #define DRM_FORMAT_BGRA8888 fourcc_code('B', 'A', '2', '4') /* [31:0] B:G:R:A 8:8:8:8 little endian */ 97 98 #define DRM_FORMAT_XRGB2101010 fourcc_code('X', 'R', '3', '0') /* [31:0] x:R:G:B 2:10:10:10 little endian */ 99 #define DRM_FORMAT_XBGR2101010 fourcc_code('X', 'B', '3', '0') /* [31:0] x:B:G:R 2:10:10:10 little endian */ 100 #define DRM_FORMAT_RGBX1010102 fourcc_code('R', 'X', '3', '0') /* [31:0] R:G:B:x 10:10:10:2 little endian */ 101 #define DRM_FORMAT_BGRX1010102 fourcc_code('B', 'X', '3', '0') /* [31:0] B:G:R:x 10:10:10:2 little endian */ 102 103 #define DRM_FORMAT_ARGB2101010 fourcc_code('A', 'R', '3', '0') /* [31:0] A:R:G:B 2:10:10:10 little endian */ 104 #define DRM_FORMAT_ABGR2101010 fourcc_code('A', 'B', '3', '0') /* [31:0] A:B:G:R 2:10:10:10 little endian */ 105 #define DRM_FORMAT_RGBA1010102 fourcc_code('R', 'A', '3', '0') /* [31:0] R:G:B:A 10:10:10:2 little endian */ 106 #define DRM_FORMAT_BGRA1010102 fourcc_code('B', 'A', '3', '0') /* [31:0] B:G:R:A 10:10:10:2 little endian */ 107 108 /* packed YCbCr */ 109 #define DRM_FORMAT_YUYV fourcc_code('Y', 'U', 'Y', 'V') /* [31:0] Cr0:Y1:Cb0:Y0 8:8:8:8 little endian */ 110 #define DRM_FORMAT_YVYU fourcc_code('Y', 'V', 'Y', 'U') /* [31:0] Cb0:Y1:Cr0:Y0 8:8:8:8 little endian */ 111 #define DRM_FORMAT_UYVY fourcc_code('U', 'Y', 'V', 'Y') /* [31:0] Y1:Cr0:Y0:Cb0 8:8:8:8 little endian */ 112 #define DRM_FORMAT_VYUY fourcc_code('V', 'Y', 'U', 'Y') /* [31:0] Y1:Cb0:Y0:Cr0 8:8:8:8 little endian */ 113 114 #define DRM_FORMAT_AYUV fourcc_code('A', 'Y', 'U', 'V') /* [31:0] A:Y:Cb:Cr 8:8:8:8 little endian */ 115 116 /* 117 * 2 plane YCbCr 118 * index 0 = Y plane, [7:0] Y 119 * index 1 = Cr:Cb plane, [15:0] Cr:Cb little endian 120 * or 121 * index 1 = Cb:Cr plane, [15:0] Cb:Cr little endian 122 */ 123 #define DRM_FORMAT_NV12 fourcc_code('N', 'V', '1', '2') /* 2x2 subsampled Cr:Cb plane */ 124 #define DRM_FORMAT_NV21 fourcc_code('N', 'V', '2', '1') /* 2x2 subsampled Cb:Cr plane */ 125 #define DRM_FORMAT_NV16 fourcc_code('N', 'V', '1', '6') /* 2x1 subsampled Cr:Cb plane */ 126 #define DRM_FORMAT_NV61 fourcc_code('N', 'V', '6', '1') /* 2x1 subsampled Cb:Cr plane */ 127 #define DRM_FORMAT_NV24 fourcc_code('N', 'V', '2', '4') /* non-subsampled Cr:Cb plane */ 128 #define DRM_FORMAT_NV42 fourcc_code('N', 'V', '4', '2') /* non-subsampled Cb:Cr plane */ 129 130 /* 131 * 3 plane YCbCr 132 * index 0: Y plane, [7:0] Y 133 * index 1: Cb plane, [7:0] Cb 134 * index 2: Cr plane, [7:0] Cr 135 * or 136 * index 1: Cr plane, [7:0] Cr 137 * index 2: Cb plane, [7:0] Cb 138 */ 139 #define DRM_FORMAT_YUV410 fourcc_code('Y', 'U', 'V', '9') /* 4x4 subsampled Cb (1) and Cr (2) planes */ 140 #define DRM_FORMAT_YVU410 fourcc_code('Y', 'V', 'U', '9') /* 4x4 subsampled Cr (1) and Cb (2) planes */ 141 #define DRM_FORMAT_YUV411 fourcc_code('Y', 'U', '1', '1') /* 4x1 subsampled Cb (1) and Cr (2) planes */ 142 #define DRM_FORMAT_YVU411 fourcc_code('Y', 'V', '1', '1') /* 4x1 subsampled Cr (1) and Cb (2) planes */ 143 #define DRM_FORMAT_YUV420 fourcc_code('Y', 'U', '1', '2') /* 2x2 subsampled Cb (1) and Cr (2) planes */ 144 #define DRM_FORMAT_YVU420 fourcc_code('Y', 'V', '1', '2') /* 2x2 subsampled Cr (1) and Cb (2) planes */ 145 #define DRM_FORMAT_YUV422 fourcc_code('Y', 'U', '1', '6') /* 2x1 subsampled Cb (1) and Cr (2) planes */ 146 #define DRM_FORMAT_YVU422 fourcc_code('Y', 'V', '1', '6') /* 2x1 subsampled Cr (1) and Cb (2) planes */ 147 #define DRM_FORMAT_YUV444 fourcc_code('Y', 'U', '2', '4') /* non-subsampled Cb (1) and Cr (2) planes */ 148 #define DRM_FORMAT_YVU444 fourcc_code('Y', 'V', '2', '4') /* non-subsampled Cr (1) and Cb (2) planes */ 149 150 151 /* 152 * Format Modifiers: 153 * 154 * Format modifiers describe, typically, a re-ordering or modification 155 * of the data in a plane of an FB. This can be used to express tiled/ 156 * swizzled formats, or compression, or a combination of the two. 157 * 158 * The upper 8 bits of the format modifier are a vendor-id as assigned 159 * below. The lower 56 bits are assigned as vendor sees fit. 160 */ 161 162 /* Vendor Ids: */ 163 #define DRM_FORMAT_MOD_NONE 0 164 #define DRM_FORMAT_MOD_VENDOR_NONE 0 165 #define DRM_FORMAT_MOD_VENDOR_INTEL 0x01 166 #define DRM_FORMAT_MOD_VENDOR_AMD 0x02 167 #define DRM_FORMAT_MOD_VENDOR_NV 0x03 168 #define DRM_FORMAT_MOD_VENDOR_SAMSUNG 0x04 169 #define DRM_FORMAT_MOD_VENDOR_QCOM 0x05 170 #define DRM_FORMAT_MOD_VENDOR_VIVANTE 0x06 171 /* add more to the end as needed */ 172 173 #define fourcc_mod_code(vendor, val) \ 174 ((((__u64)DRM_FORMAT_MOD_VENDOR_## vendor) << 56) | (val & 0x00ffffffffffffffULL)) 175 176 /* 177 * Format Modifier tokens: 178 * 179 * When adding a new token please document the layout with a code comment, 180 * similar to the fourcc codes above. drm_fourcc.h is considered the 181 * authoritative source for all of these. 182 */ 183 184 /* 185 * Linear Layout 186 * 187 * Just plain linear layout. Note that this is different from no specifying any 188 * modifier (e.g. not setting DRM_MODE_FB_MODIFIERS in the DRM_ADDFB2 ioctl), 189 * which tells the driver to also take driver-internal information into account 190 * and so might actually result in a tiled framebuffer. 191 */ 192 #define DRM_FORMAT_MOD_LINEAR fourcc_mod_code(NONE, 0) 193 194 /* Intel framebuffer modifiers */ 195 196 /* 197 * Intel X-tiling layout 198 * 199 * This is a tiled layout using 4Kb tiles (except on gen2 where the tiles 2Kb) 200 * in row-major layout. Within the tile bytes are laid out row-major, with 201 * a platform-dependent stride. On top of that the memory can apply 202 * platform-depending swizzling of some higher address bits into bit6. 203 * 204 * This format is highly platforms specific and not useful for cross-driver 205 * sharing. It exists since on a given platform it does uniquely identify the 206 * layout in a simple way for i915-specific userspace. 207 */ 208 #define I915_FORMAT_MOD_X_TILED fourcc_mod_code(INTEL, 1) 209 210 /* 211 * Intel Y-tiling layout 212 * 213 * This is a tiled layout using 4Kb tiles (except on gen2 where the tiles 2Kb) 214 * in row-major layout. Within the tile bytes are laid out in OWORD (16 bytes) 215 * chunks column-major, with a platform-dependent height. On top of that the 216 * memory can apply platform-depending swizzling of some higher address bits 217 * into bit6. 218 * 219 * This format is highly platforms specific and not useful for cross-driver 220 * sharing. It exists since on a given platform it does uniquely identify the 221 * layout in a simple way for i915-specific userspace. 222 */ 223 #define I915_FORMAT_MOD_Y_TILED fourcc_mod_code(INTEL, 2) 224 225 /* 226 * Intel Yf-tiling layout 227 * 228 * This is a tiled layout using 4Kb tiles in row-major layout. 229 * Within the tile pixels are laid out in 16 256 byte units / sub-tiles which 230 * are arranged in four groups (two wide, two high) with column-major layout. 231 * Each group therefore consits out of four 256 byte units, which are also laid 232 * out as 2x2 column-major. 233 * 256 byte units are made out of four 64 byte blocks of pixels, producing 234 * either a square block or a 2:1 unit. 235 * 64 byte blocks of pixels contain four pixel rows of 16 bytes, where the width 236 * in pixel depends on the pixel depth. 237 */ 238 #define I915_FORMAT_MOD_Yf_TILED fourcc_mod_code(INTEL, 3) 239 240 /* 241 * Tiled, NV12MT, grouped in 64 (pixels) x 32 (lines) -sized macroblocks 242 * 243 * Macroblocks are laid in a Z-shape, and each pixel data is following the 244 * standard NV12 style. 245 * As for NV12, an image is the result of two frame buffers: one for Y, 246 * one for the interleaved Cb/Cr components (1/2 the height of the Y buffer). 247 * Alignment requirements are (for each buffer): 248 * - multiple of 128 pixels for the width 249 * - multiple of 32 pixels for the height 250 * 251 * For more information: see https://linuxtv.org/downloads/v4l-dvb-apis/re32.html 252 */ 253 #define DRM_FORMAT_MOD_SAMSUNG_64_32_TILE fourcc_mod_code(SAMSUNG, 1) 254 255 /* Vivante framebuffer modifiers */ 256 257 /* 258 * Vivante 4x4 tiling layout 259 * 260 * This is a simple tiled layout using tiles of 4x4 pixels in a row-major 261 * layout. 262 */ 263 #define DRM_FORMAT_MOD_VIVANTE_TILED fourcc_mod_code(VIVANTE, 1) 264 265 /* 266 * Vivante 64x64 super-tiling layout 267 * 268 * This is a tiled layout using 64x64 pixel super-tiles, where each super-tile 269 * contains 8x4 groups of 2x4 tiles of 4x4 pixels (like above) each, all in row- 270 * major layout. 271 * 272 * For more information: see 273 * https://github.com/etnaviv/etna_viv/blob/master/doc/hardware.md#texture-tiling 274 */ 275 #define DRM_FORMAT_MOD_VIVANTE_SUPER_TILED fourcc_mod_code(VIVANTE, 2) 276 277 /* 278 * Vivante 4x4 tiling layout for dual-pipe 279 * 280 * Same as the 4x4 tiling layout, except every second 4x4 pixel tile starts at a 281 * different base address. Offsets from the base addresses are therefore halved 282 * compared to the non-split tiled layout. 283 */ 284 #define DRM_FORMAT_MOD_VIVANTE_SPLIT_TILED fourcc_mod_code(VIVANTE, 3) 285 286 /* 287 * Vivante 64x64 super-tiling layout for dual-pipe 288 * 289 * Same as the 64x64 super-tiling layout, except every second 4x4 pixel tile 290 * starts at a different base address. Offsets from the base addresses are 291 * therefore halved compared to the non-split super-tiled layout. 292 */ 293 #define DRM_FORMAT_MOD_VIVANTE_SPLIT_SUPER_TILED fourcc_mod_code(VIVANTE, 4) 294 295 #if defined(__cplusplus) 296 } 297 #endif 298 299 #endif /* DRM_FOURCC_H */ 300