1d2912cb1SThomas Gleixner /* SPDX-License-Identifier: GPL-2.0-only */ 2b6877a47SMark Brown /* 3b6877a47SMark Brown * wm8960.h -- WM8960 Soc Audio driver platform data 4b6877a47SMark Brown */ 5b6877a47SMark Brown 6b6877a47SMark Brown #ifndef _WM8960_PDATA_H 7b6877a47SMark Brown #define _WM8960_PDATA_H 8b6877a47SMark Brown 9b6877a47SMark Brown #define WM8960_DRES_400R 0 10b6877a47SMark Brown #define WM8960_DRES_200R 1 11b6877a47SMark Brown #define WM8960_DRES_600R 2 12b6877a47SMark Brown #define WM8960_DRES_150R 3 13b6877a47SMark Brown #define WM8960_DRES_MAX 3 14b6877a47SMark Brown 15b6877a47SMark Brown struct wm8960_data { 16913d7b4cSMark Brown bool capless; /* Headphone outputs configured in capless mode */ 17913d7b4cSMark Brown 1837061631SMark Brown bool shared_lrclk; /* DAC and ADC LRCLKs are wired together */ 19c9015a17SShengjiu Wang 20c9015a17SShengjiu Wang /* 21c9015a17SShengjiu Wang * Setup for headphone detection 22c9015a17SShengjiu Wang * 23c9015a17SShengjiu Wang * hp_cfg[0]: HPSEL[1:0] of R48 (Additional Control 4) 24c9015a17SShengjiu Wang * hp_cfg[1]: {HPSWEN:HPSWPOL} of R24 (Additional Control 2). 25c9015a17SShengjiu Wang * hp_cfg[2]: {TOCLKSEL:TOEN} of R23 (Additional Control 1). 26c9015a17SShengjiu Wang */ 27c9015a17SShengjiu Wang u32 hp_cfg[3]; 28c9015a17SShengjiu Wang 29c9015a17SShengjiu Wang /* 30c9015a17SShengjiu Wang * Setup for gpio configuration 31c9015a17SShengjiu Wang * 32c9015a17SShengjiu Wang * gpio_cfg[0]: ALRCGPIO of R9 (Audio interface) 33c9015a17SShengjiu Wang * gpio_cfg[1]: {GPIOPOL:GPIOSEL[2:0]} of R48 (Additional Control 4). 34c9015a17SShengjiu Wang */ 35c9015a17SShengjiu Wang u32 gpio_cfg[2]; 36b6877a47SMark Brown }; 37b6877a47SMark Brown 38b6877a47SMark Brown #endif 39