1*bdd229abSDerek Fang /* SPDX-License-Identifier: GPL-2.0-only */ 2*bdd229abSDerek Fang /* 3*bdd229abSDerek Fang * linux/sound/rt5682s.h -- Platform data for RT5682I-VS 4*bdd229abSDerek Fang * 5*bdd229abSDerek Fang * Copyright 2021 Realtek Microelectronics 6*bdd229abSDerek Fang */ 7*bdd229abSDerek Fang 8*bdd229abSDerek Fang #ifndef __LINUX_SND_RT5682S_H 9*bdd229abSDerek Fang #define __LINUX_SND_RT5682S_H 10*bdd229abSDerek Fang 11*bdd229abSDerek Fang enum rt5682s_dmic1_data_pin { 12*bdd229abSDerek Fang RT5682S_DMIC1_DATA_NULL, 13*bdd229abSDerek Fang RT5682S_DMIC1_DATA_GPIO2, 14*bdd229abSDerek Fang RT5682S_DMIC1_DATA_GPIO5, 15*bdd229abSDerek Fang }; 16*bdd229abSDerek Fang 17*bdd229abSDerek Fang enum rt5682s_dmic1_clk_pin { 18*bdd229abSDerek Fang RT5682S_DMIC1_CLK_NULL, 19*bdd229abSDerek Fang RT5682S_DMIC1_CLK_GPIO1, 20*bdd229abSDerek Fang RT5682S_DMIC1_CLK_GPIO3, 21*bdd229abSDerek Fang }; 22*bdd229abSDerek Fang 23*bdd229abSDerek Fang enum rt5682s_jd_src { 24*bdd229abSDerek Fang RT5682S_JD_NULL, 25*bdd229abSDerek Fang RT5682S_JD1, 26*bdd229abSDerek Fang }; 27*bdd229abSDerek Fang 28*bdd229abSDerek Fang enum rt5682s_dai_clks { 29*bdd229abSDerek Fang RT5682S_DAI_WCLK_IDX, 30*bdd229abSDerek Fang RT5682S_DAI_BCLK_IDX, 31*bdd229abSDerek Fang RT5682S_DAI_NUM_CLKS, 32*bdd229abSDerek Fang }; 33*bdd229abSDerek Fang 34*bdd229abSDerek Fang struct rt5682s_platform_data { 35*bdd229abSDerek Fang 36*bdd229abSDerek Fang int ldo1_en; /* GPIO for LDO1_EN */ 37*bdd229abSDerek Fang 38*bdd229abSDerek Fang enum rt5682s_dmic1_data_pin dmic1_data_pin; 39*bdd229abSDerek Fang enum rt5682s_dmic1_clk_pin dmic1_clk_pin; 40*bdd229abSDerek Fang enum rt5682s_jd_src jd_src; 41*bdd229abSDerek Fang unsigned int dmic_clk_rate; 42*bdd229abSDerek Fang unsigned int dmic_delay; 43*bdd229abSDerek Fang bool dmic_clk_driving_high; 44*bdd229abSDerek Fang 45*bdd229abSDerek Fang const char *dai_clk_names[RT5682S_DAI_NUM_CLKS]; 46*bdd229abSDerek Fang }; 47*bdd229abSDerek Fang 48*bdd229abSDerek Fang #endif 49